1 /*
2 * UAE - The Un*x Amiga Emulator
3 *
4 * memory management
5 *
6 * Copyright 1995 Bernd Schmidt
7 */
8
9 #ifndef UAE_MEMORY_H
10 #define UAE_MEMORY_H
11
12 #ifdef FSUAE // NL
13 #include "config.h"
14 #include "uae/types.h"
15 #include <stddef.h>
16 #endif
17
18 extern void memory_reset (void);
19 extern void a1000_reset (void);
20
21 #ifdef JIT
22 extern int special_mem;
23 #endif
24
25 #define S_READ 1
26 #define S_WRITE 2
27
28 bool init_shm (void);
29 void free_shm (void);
30 bool preinit_shm (void);
31 extern bool canbang;
32 extern bool jit_direct_compatible_memory;
33
34 #define Z3BASE_UAE 0x10000000
35 #define Z3BASE_REAL 0x40000000
36
37 #ifdef ADDRESS_SPACE_24BIT
38 #define MEMORY_BANKS 256
39 #define MEMORY_RANGE_MASK ((1<<24)-1)
40 #else
41 #define MEMORY_BANKS 65536
42 #define MEMORY_RANGE_MASK (~0)
43 #endif
44
45 typedef uae_u32 (REGPARAM3 *mem_get_func)(uaecptr) REGPARAM;
46 typedef void (REGPARAM3 *mem_put_func)(uaecptr, uae_u32) REGPARAM;
47 typedef uae_u8 *(REGPARAM3 *xlate_func)(uaecptr) REGPARAM;
48 typedef int (REGPARAM3 *check_func)(uaecptr, uae_u32) REGPARAM;
49
50 extern uae_u32 max_z3fastmem;
51
52 extern uae_u32 wait_cpu_cycle_read (uaecptr addr, int mode);
53 extern void wait_cpu_cycle_write (uaecptr addr, int mode, uae_u32 v);
54 extern uae_u32 wait_cpu_cycle_read_ce020 (uaecptr addr, int mode);
55 extern void wait_cpu_cycle_write_ce020 (uaecptr addr, int mode, uae_u32 v);
56
57 #undef DIRECT_MEMFUNCS_SUCCESSFUL
58 #include "machdep/maccess.h"
59
60 #define chipmem_start_addr 0x00000000
61 #define bogomem_start_addr 0x00C00000
62 #define cardmem_start_addr 0x00E00000
63 #define kickmem_start_addr 0x00F80000
64
65 #define ROM_SIZE_512 524288
66 #define ROM_SIZE_256 262144
67 #define ROM_SIZE_128 131072
68
69 extern bool ersatzkickfile;
70 extern bool cloanto_rom, kickstart_rom;
71 extern uae_u16 kickstart_version;
72 extern int uae_boot_rom_type;
73 extern int uae_boot_rom_size;
74 extern uaecptr rtarea_base;
75
76 extern uae_u8* baseaddr[];
77
78 enum
79 {
80 ABFLAG_UNK = 0, ABFLAG_RAM = 1, ABFLAG_ROM = 2, ABFLAG_ROMIN = 4, ABFLAG_IO = 8,
81 ABFLAG_NONE = 16, ABFLAG_SAFE = 32, ABFLAG_INDIRECT = 64, ABFLAG_NOALLOC = 128,
82 ABFLAG_RTG = 256, ABFLAG_THREADSAFE = 512, ABFLAG_DIRECTMAP = 1024,
83 ABFLAG_CHIPRAM = 2048, ABFLAG_CIA = 4096, ABFLAG_PPCIOSPACE = 8192
84 };
85 typedef struct {
86 /* These ones should be self-explanatory... */
87 mem_get_func lget, wget, bget;
88 mem_put_func lput, wput, bput;
89 /* Use xlateaddr to translate an Amiga address to a uae_u8 * that can
90 * be used to address memory without calling the wget/wput functions.
91 * This doesn't work for all memory banks, so this function may call
92 * abort(). */
93 xlate_func xlateaddr;
94 /* To prevent calls to abort(), use check before calling xlateaddr.
95 * It checks not only that the memory bank can do xlateaddr, but also
96 * that the pointer points to an area of at least the specified size.
97 * This is used for example to translate bitplane pointers in custom.c */
98 check_func check;
99 /* For those banks that refer to real memory, we can save the whole trouble
100 of going through function calls, and instead simply grab the memory
101 ourselves. This holds the memory address where the start of memory is
102 for this particular bank. */
103 uae_u8 *baseaddr;
104 const TCHAR *label;
105 const TCHAR *name;
106 /* for instruction opcode/operand fetches */
107 mem_get_func lgeti, wgeti;
108 int flags;
109 int jit_read_flag, jit_write_flag;
110 struct addrbank_sub *sub_banks;
111 uae_u32 mask;
112 uae_u32 startmask;
113 uae_u32 start;
114 uae_u32 allocated;
115 } addrbank;
116
117 #define MEMORY_MIN_SUBBANK 1024
118 struct addrbank_sub
119 {
120 addrbank *bank;
121 uae_u32 offset;
122 uae_u32 suboffset;
123 uae_u32 mask;
124 uae_u32 maskval;
125 };
126
127 #define CE_MEMBANK_FAST32 0
128 #define CE_MEMBANK_CHIP16 1
129 #define CE_MEMBANK_CHIP32 2
130 #define CE_MEMBANK_CIA 3
131 #define CE_MEMBANK_FAST16 4
132 extern uae_u8 ce_banktype[65536], ce_cachable[65536];
133
134 #define MEMORY_LGET(name) \
135 static uae_u32 REGPARAM3 name ## _lget (uaecptr) REGPARAM; \
136 static uae_u32 REGPARAM2 name ## _lget (uaecptr addr) \
137 { \
138 uae_u8 *m; \
139 addr -= name ## _bank.start & name ## _bank.mask; \
140 addr &= name ## _bank.mask; \
141 m = name ## _bank.baseaddr + addr; \
142 return do_get_mem_long ((uae_u32 *)m); \
143 }
144 #define MEMORY_WGET(name) \
145 static uae_u32 REGPARAM3 name ## _wget (uaecptr) REGPARAM; \
146 static uae_u32 REGPARAM2 name ## _wget (uaecptr addr) \
147 { \
148 uae_u8 *m; \
149 addr -= name ## _bank.start & name ## _bank.mask; \
150 addr &= name ## _bank.mask; \
151 m = name ## _bank.baseaddr + addr; \
152 return do_get_mem_word ((uae_u16 *)m); \
153 }
154 #define MEMORY_BGET(name) \
155 static uae_u32 REGPARAM3 name ## _bget (uaecptr) REGPARAM; \
156 static uae_u32 REGPARAM2 name ## _bget (uaecptr addr) \
157 { \
158 addr -= name ## _bank.start & name ## _bank.mask; \
159 addr &= name ## _bank.mask; \
160 return name ## _bank.baseaddr[addr]; \
161 }
162 #define MEMORY_LPUT(name) \
163 static void REGPARAM3 name ## _lput (uaecptr, uae_u32) REGPARAM; \
164 static void REGPARAM2 name ## _lput (uaecptr addr, uae_u32 l) \
165 { \
166 uae_u8 *m; \
167 addr -= name ## _bank.start & name ## _bank.mask; \
168 addr &= name ## _bank.mask; \
169 m = name ## _bank.baseaddr + addr; \
170 do_put_mem_long ((uae_u32 *)m, l); \
171 }
172 #define MEMORY_WPUT(name) \
173 static void REGPARAM3 name ## _wput (uaecptr, uae_u32) REGPARAM; \
174 static void REGPARAM2 name ## _wput (uaecptr addr, uae_u32 w) \
175 { \
176 uae_u8 *m; \
177 addr -= name ## _bank.start & name ## _bank.mask; \
178 addr &= name ## _bank.mask; \
179 m = name ## _bank.baseaddr + addr; \
180 do_put_mem_word ((uae_u16 *)m, w); \
181 }
182 #define MEMORY_BPUT(name) \
183 static void REGPARAM3 name ## _bput (uaecptr, uae_u32) REGPARAM; \
184 static void REGPARAM2 name ## _bput (uaecptr addr, uae_u32 b) \
185 { \
186 addr -= name ## _bank.start & name ## _bank.mask; \
187 addr &= name ## _bank.mask; \
188 name ## _bank.baseaddr[addr] = b; \
189 }
190 #define MEMORY_CHECK(name) \
191 static int REGPARAM3 name ## _check (uaecptr addr, uae_u32 size) REGPARAM; \
192 static int REGPARAM2 name ## _check (uaecptr addr, uae_u32 size) \
193 { \
194 addr -= name ## _bank.start & name ## _bank.mask; \
195 addr &= name ## _bank.mask; \
196 return (addr + size) <= name ## _bank.allocated; \
197 }
198 #define MEMORY_XLATE(name) \
199 static uae_u8 *REGPARAM3 name ## _xlate (uaecptr addr) REGPARAM; \
200 static uae_u8 *REGPARAM2 name ## _xlate (uaecptr addr) \
201 { \
202 addr -= name ## _bank.start & name ## _bank.mask; \
203 addr &= name ## _bank.mask; \
204 return name ## _bank.baseaddr + addr; \
205 }
206
207 #define DECLARE_MEMORY_FUNCTIONS(name) \
208 static uae_u32 REGPARAM3 NOWARN_UNUSED(name ## _lget) (uaecptr) REGPARAM; \
209 static uae_u32 REGPARAM3 NOWARN_UNUSED(name ## _lgeti) (uaecptr) REGPARAM; \
210 static uae_u32 REGPARAM3 NOWARN_UNUSED(name ## _wget) (uaecptr) REGPARAM; \
211 static uae_u32 REGPARAM3 NOWARN_UNUSED(name ## _wgeti) (uaecptr) REGPARAM; \
212 static uae_u32 REGPARAM3 NOWARN_UNUSED(name ## _bget) (uaecptr) REGPARAM; \
213 static void REGPARAM3 NOWARN_UNUSED(name ## _lput) (uaecptr, uae_u32) REGPARAM; \
214 static void REGPARAM3 NOWARN_UNUSED(name ## _wput) (uaecptr, uae_u32) REGPARAM; \
215 static void REGPARAM3 NOWARN_UNUSED(name ## _bput) (uaecptr, uae_u32) REGPARAM; \
216 static int REGPARAM3 NOWARN_UNUSED(name ## _check) (uaecptr addr, uae_u32 size) REGPARAM; \
217 static uae_u8 *REGPARAM3 NOWARN_UNUSED(name ## _xlate) (uaecptr addr) REGPARAM;
218
219 #define DECLARE_MEMORY_FUNCTIONS_WITH_SUFFIX(name, suffix) \
220 static uae_u32 REGPARAM3 NOWARN_UNUSED(name ## _lget_ ## suffix) (uaecptr) REGPARAM; \
221 static uae_u32 REGPARAM3 NOWARN_UNUSED(name ## _lgeti_ ## suffix) (uaecptr) REGPARAM; \
222 static uae_u32 REGPARAM3 NOWARN_UNUSED(name ## _wget_ ## suffix) (uaecptr) REGPARAM; \
223 static uae_u32 REGPARAM3 NOWARN_UNUSED(name ## _wgeti_ ## suffix) (uaecptr) REGPARAM; \
224 static uae_u32 REGPARAM3 NOWARN_UNUSED(name ## _bget_ ## suffix) (uaecptr) REGPARAM; \
225 static void REGPARAM3 NOWARN_UNUSED(name ## _lput_ ## suffix) (uaecptr, uae_u32) REGPARAM; \
226 static void REGPARAM3 NOWARN_UNUSED(name ## _wput_ ## suffix) (uaecptr, uae_u32) REGPARAM; \
227 static void REGPARAM3 NOWARN_UNUSED(name ## _bput_ ## suffix) (uaecptr, uae_u32) REGPARAM; \
228 static int REGPARAM3 NOWARN_UNUSED(name ## _check_ ## suffix) (uaecptr addr, uae_u32 size) REGPARAM; \
229 static uae_u8 *REGPARAM3 NOWARN_UNUSED(name ## _xlate_ ## suffix) (uaecptr addr) REGPARAM;
230
231 #define MEMORY_FUNCTIONS(name) \
232 MEMORY_LGET(name); \
233 MEMORY_WGET(name); \
234 MEMORY_BGET(name); \
235 MEMORY_LPUT(name); \
236 MEMORY_WPUT(name); \
237 MEMORY_BPUT(name); \
238 MEMORY_CHECK(name); \
239 MEMORY_XLATE(name);
240
241 extern addrbank chipmem_bank;
242 extern addrbank chipmem_agnus_bank;
243 extern addrbank chipmem_bank_ce2;
244 extern addrbank kickmem_bank;
245 extern addrbank custom_bank;
246 extern addrbank clock_bank;
247 extern addrbank cia_bank;
248 extern addrbank rtarea_bank;
249 extern addrbank filesys_bank;
250 extern addrbank uaeboard_bank;
251 extern addrbank expamem_bank;
252 extern addrbank expamem_null, expamem_none;
253 extern addrbank fastmem_bank;
254 extern addrbank fastmem_nojit_bank;
255 extern addrbank fastmem2_bank;
256 extern addrbank fastmem2_nojit_bank;
257 extern addrbank gfxmem_bank;
258 extern addrbank gayle_bank;
259 extern addrbank gayle2_bank;
260 extern addrbank mbres_bank;
261 extern addrbank akiko_bank;
262 extern addrbank cdtvcr_bank;
263 extern addrbank cardmem_bank;
264 extern addrbank bogomem_bank;
265 extern addrbank z3fastmem_bank;
266 extern addrbank z3fastmem2_bank;
267 extern addrbank z3chipmem_bank;
268 extern addrbank mem25bit_bank;
269 extern addrbank a3000lmem_bank;
270 extern addrbank a3000hmem_bank;
271 extern addrbank extendedkickmem_bank;
272 extern addrbank extendedkickmem2_bank;
273 extern addrbank custmem1_bank;
274 extern addrbank custmem2_bank;
275
276 extern void rtarea_init (void);
277 extern void rtarea_init_mem (void);
278 extern void rtarea_setup (void);
279 extern void expamem_init (void);
280 extern void expamem_reset (void);
281 extern void expamem_next (addrbank *mapped, addrbank *next);
282 extern void expamem_shutup (addrbank *mapped);
283 extern bool expamem_z3hack(struct uae_prefs*);
284 extern void set_expamem_z3_hack_override(bool);
285 extern uaecptr expamem_z3_pointer, expamem_z2_pointer;
286 extern uae_u32 expamem_z3_size, expamem_z2_size;
287
288 extern uae_u32 last_custom_value1;
289
290 /* Default memory access functions */
291
292 extern void dummy_put (uaecptr addr, int size, uae_u32 val);
293 extern uae_u32 dummy_get (uaecptr addr, int size, bool inst, uae_u32 defvalue);
294 extern uae_u32 dummy_get_safe(uaecptr addr, int size, bool inst, uae_u32 defvalue);
295
296 extern int REGPARAM3 default_check(uaecptr addr, uae_u32 size) REGPARAM;
297 extern uae_u8 *REGPARAM3 default_xlate(uaecptr addr) REGPARAM;
298 /* 680x0 opcode fetches */
299 extern uae_u32 REGPARAM3 dummy_lgeti (uaecptr addr) REGPARAM;
300 extern uae_u32 REGPARAM3 dummy_wgeti (uaecptr addr) REGPARAM;
301
302 /* sub bank support */
303 extern uae_u32 REGPARAM3 sub_bank_lget (uaecptr) REGPARAM;
304 extern uae_u32 REGPARAM3 sub_bank_wget(uaecptr) REGPARAM;
305 extern uae_u32 REGPARAM3 sub_bank_bget(uaecptr) REGPARAM;
306 extern void REGPARAM3 sub_bank_lput(uaecptr, uae_u32) REGPARAM;
307 extern void REGPARAM3 sub_bank_wput(uaecptr, uae_u32) REGPARAM;
308 extern void REGPARAM3 sub_bank_bput(uaecptr, uae_u32) REGPARAM;
309 extern uae_u32 REGPARAM3 sub_bank_lgeti(uaecptr) REGPARAM;
310 extern uae_u32 REGPARAM3 sub_bank_wgeti(uaecptr) REGPARAM;
311 extern int REGPARAM3 sub_bank_check(uaecptr addr, uae_u32 size) REGPARAM;
312 extern uae_u8 *REGPARAM3 sub_bank_xlate(uaecptr addr) REGPARAM;
313 extern addrbank *get_sub_bank(uaecptr *addr);
314
315 #define bankindex(addr) (((uaecptr)(addr)) >> 16)
316
317 extern addrbank *mem_banks[MEMORY_BANKS];
318
319 #ifdef JIT
320 extern uae_u8 *baseaddr[MEMORY_BANKS];
321 #endif
322
323 #define get_mem_bank(addr) (*mem_banks[bankindex(addr)])
324 extern addrbank *get_mem_bank_real(uaecptr);
325
326 #ifdef JIT
327 #define put_mem_bank(addr, b, realstart) do { \
328 (mem_banks[bankindex(addr)] = (b)); \
329 if ((b)->baseaddr) \
330 baseaddr[bankindex(addr)] = (b)->baseaddr - (realstart); \
331 else \
332 baseaddr[bankindex(addr)] = (uae_u8*)(((uae_u8*)b)+1); \
333 } while (0)
334 #else
335 #define put_mem_bank(addr, b, realstart) \
336 (mem_banks[bankindex(addr)] = (b));
337 #endif
338
339 extern void memory_init (void);
340 extern void memory_cleanup (void);
341 extern void map_banks (addrbank *bank, int first, int count, int realsize);
342 extern void map_banks_z2(addrbank *bank, int first, int count);
343 extern void map_banks_z3(addrbank *bank, int first, int count);
344 extern bool validate_banks_z2(addrbank *bank, int start, int size);
345 extern bool validate_banks_z3(addrbank *bank, int start, int size);
346 extern void map_banks_quick (addrbank *bank, int first, int count, int realsize);
347 extern void map_banks_nojitdirect (addrbank *bank, int first, int count, int realsize);
348 extern void map_banks_cond (addrbank *bank, int first, int count, int realsize);
349 extern void map_overlay (int chip);
350 extern void memory_hardreset (int);
351 extern void memory_clear (void);
352 extern void free_fastmemory (int);
353 extern void set_roms_modified (void);
354 extern void reload_roms(void);
355
356 #define longget(addr) (call_mem_get_func(get_mem_bank(addr).lget, addr))
357 #define wordget(addr) (call_mem_get_func(get_mem_bank(addr).wget, addr))
358 #define byteget(addr) (call_mem_get_func(get_mem_bank(addr).bget, addr))
359 #define longgeti(addr) (call_mem_get_func(get_mem_bank(addr).lgeti, addr))
360 #define wordgeti(addr) (call_mem_get_func(get_mem_bank(addr).wgeti, addr))
361 #define longput(addr,l) (call_mem_put_func(get_mem_bank(addr).lput, addr, l))
362 #define wordput(addr,w) (call_mem_put_func(get_mem_bank(addr).wput, addr, w))
363 #define byteput(addr,b) (call_mem_put_func(get_mem_bank(addr).bput, addr, b))
364
get_long(uaecptr addr)365 STATIC_INLINE uae_u32 get_long (uaecptr addr)
366 {
367 return longget (addr);
368 }
get_word(uaecptr addr)369 STATIC_INLINE uae_u32 get_word (uaecptr addr)
370 {
371 return wordget (addr);
372 }
get_byte(uaecptr addr)373 STATIC_INLINE uae_u32 get_byte (uaecptr addr)
374 {
375 return byteget (addr);
376 }
get_longi(uaecptr addr)377 STATIC_INLINE uae_u32 get_longi(uaecptr addr)
378 {
379 return longgeti (addr);
380 }
get_wordi(uaecptr addr)381 STATIC_INLINE uae_u32 get_wordi(uaecptr addr)
382 {
383 return wordgeti (addr);
384 }
385
get_long_jit(uaecptr addr)386 STATIC_INLINE uae_u32 get_long_jit(uaecptr addr)
387 {
388 addrbank *bank = &get_mem_bank(addr);
389 #ifdef JIT
390 special_mem |= bank->jit_read_flag;
391 #endif
392 return bank->lget(addr);
393 }
get_word_jit(uaecptr addr)394 STATIC_INLINE uae_u32 get_word_jit(uaecptr addr)
395 {
396 addrbank *bank = &get_mem_bank(addr);
397 #ifdef JIT
398 special_mem |= bank->jit_read_flag;
399 #endif
400 return bank->wget(addr);
401 }
get_byte_jit(uaecptr addr)402 STATIC_INLINE uae_u32 get_byte_jit(uaecptr addr)
403 {
404 addrbank *bank = &get_mem_bank(addr);
405 #ifdef JIT
406 special_mem |= bank->jit_read_flag;
407 #endif
408 return bank->bget(addr);
409 }
get_longi_jit(uaecptr addr)410 STATIC_INLINE uae_u32 get_longi_jit(uaecptr addr)
411 {
412 addrbank *bank = &get_mem_bank(addr);
413 #ifdef JIT
414 special_mem |= bank->jit_read_flag;
415 #endif
416 return bank->lgeti(addr);
417 }
get_wordi_jit(uaecptr addr)418 STATIC_INLINE uae_u32 get_wordi_jit(uaecptr addr)
419 {
420 addrbank *bank = &get_mem_bank(addr);
421 #ifdef JIT
422 special_mem |= bank->jit_read_flag;
423 #endif
424 return bank->wgeti(addr);
425 }
426
427 /*
428 * Read a host pointer from addr
429 */
430 #if SIZEOF_VOID_P == 4
431 # define get_pointer(addr) ((void *)get_long (addr))
432 #else
433 # if SIZEOF_VOID_P == 8
get_pointer(uaecptr addr)434 STATIC_INLINE void *get_pointer (uaecptr addr)
435 {
436 const unsigned int n = SIZEOF_VOID_P / 4;
437 union {
438 void *ptr;
439 uae_u32 longs[SIZEOF_VOID_P / 4];
440 } p;
441 unsigned int i;
442
443 for (i = 0; i < n; i++) {
444 #ifdef WORDS_BIGENDIAN
445 p.longs[i] = get_long (addr + i * 4);
446 #else
447 p.longs[n - 1 - i] = get_long (addr + i * 4);
448 #endif
449 }
450 return p.ptr;
451 }
452 # else
453 # error "Unknown or unsupported pointer size."
454 # endif
455 #endif
456
put_long(uaecptr addr,uae_u32 l)457 STATIC_INLINE void put_long (uaecptr addr, uae_u32 l)
458 {
459 longput(addr, l);
460 }
put_word(uaecptr addr,uae_u32 w)461 STATIC_INLINE void put_word (uaecptr addr, uae_u32 w)
462 {
463 wordput(addr, w);
464 }
put_byte(uaecptr addr,uae_u32 b)465 STATIC_INLINE void put_byte (uaecptr addr, uae_u32 b)
466 {
467 byteput(addr, b);
468 }
469
put_long_jit(uaecptr addr,uae_u32 l)470 STATIC_INLINE void put_long_jit(uaecptr addr, uae_u32 l)
471 {
472 addrbank *bank = &get_mem_bank(addr);
473 #ifdef JIT
474 special_mem |= bank->jit_write_flag;
475 #endif
476 bank->lput(addr, l);
477 }
put_word_jit(uaecptr addr,uae_u32 l)478 STATIC_INLINE void put_word_jit(uaecptr addr, uae_u32 l)
479 {
480 addrbank *bank = &get_mem_bank(addr);
481 #ifdef JIT
482 special_mem |= bank->jit_write_flag;
483 #endif
484 bank->wput(addr, l);
485 }
put_byte_jit(uaecptr addr,uae_u32 l)486 STATIC_INLINE void put_byte_jit(uaecptr addr, uae_u32 l)
487 {
488 addrbank *bank = &get_mem_bank(addr);
489 #ifdef JIT
490 special_mem |= bank->jit_write_flag;
491 #endif
492 bank->bput(addr, l);
493 }
494
495 extern void put_long_slow (uaecptr addr, uae_u32 v);
496 extern void put_word_slow (uaecptr addr, uae_u32 v);
497 extern void put_byte_slow (uaecptr addr, uae_u32 v);
498 extern uae_u32 get_long_slow (uaecptr addr);
499 extern uae_u32 get_word_slow (uaecptr addr);
500 extern uae_u32 get_byte_slow (uaecptr addr);
501
502
503 /*
504 * Store host pointer v at addr
505 */
506 #if SIZEOF_VOID_P == 4
507 # define put_pointer(addr, p) (put_long ((addr), (uae_u32)(p)))
508 #else
509 # if SIZEOF_VOID_P == 8
put_pointer(uaecptr addr,void * v)510 STATIC_INLINE void put_pointer (uaecptr addr, void *v)
511 {
512 const unsigned int n = SIZEOF_VOID_P / 4;
513 union {
514 void *ptr;
515 uae_u32 longs[SIZEOF_VOID_P / 4];
516 } p;
517 unsigned int i;
518
519 p.ptr = v;
520
521 for (i = 0; i < n; i++) {
522 #ifdef WORDS_BIGENDIAN
523 put_long (addr + i * 4, p.longs[i]);
524 #else
525 put_long (addr + i * 4, p.longs[n - 1 - i]);
526 #endif
527 }
528 }
529 # endif
530 #endif
531
get_real_address(uaecptr addr)532 STATIC_INLINE uae_u8 *get_real_address (uaecptr addr)
533 {
534 return get_mem_bank (addr).xlateaddr(addr);
535 }
536
valid_address(uaecptr addr,uae_u32 size)537 STATIC_INLINE int valid_address (uaecptr addr, uae_u32 size)
538 {
539 return get_mem_bank (addr).check(addr, size);
540 }
541
542 extern int addr_valid (const TCHAR*, uaecptr,uae_u32);
543
544 /* For faster access in custom chip emulation. */
545 extern void REGPARAM3 chipmem_lput (uaecptr, uae_u32) REGPARAM;
546 extern void REGPARAM3 chipmem_wput (uaecptr, uae_u32) REGPARAM;
547 extern void REGPARAM3 chipmem_bput (uaecptr, uae_u32) REGPARAM;
548
549 extern uae_u32 REGPARAM3 chipmem_agnus_wget (uaecptr) REGPARAM;
550 extern void REGPARAM3 chipmem_agnus_wput (uaecptr, uae_u32) REGPARAM;
551
552 extern addrbank dummy_bank;
553
554 /* 68020+ Chip RAM DMA contention emulation */
555 extern void REGPARAM3 chipmem_bput_c2 (uaecptr, uae_u32) REGPARAM;
556
557 extern uae_u32 (REGPARAM3 *chipmem_lget_indirect)(uaecptr) REGPARAM;
558 extern uae_u32 (REGPARAM3 *chipmem_wget_indirect)(uaecptr) REGPARAM;
559 extern uae_u32 (REGPARAM3 *chipmem_bget_indirect)(uaecptr) REGPARAM;
560 extern void (REGPARAM3 *chipmem_lput_indirect)(uaecptr, uae_u32) REGPARAM;
561 extern void (REGPARAM3 *chipmem_wput_indirect)(uaecptr, uae_u32) REGPARAM;
562 extern void (REGPARAM3 *chipmem_bput_indirect)(uaecptr, uae_u32) REGPARAM;
563 extern int (REGPARAM3 *chipmem_check_indirect)(uaecptr, uae_u32) REGPARAM;
564 extern uae_u8 *(REGPARAM3 *chipmem_xlate_indirect)(uaecptr) REGPARAM;
565
566 #ifdef NATMEM_OFFSET
567
568 typedef struct shmpiece_reg {
569 uae_u8 *native_address;
570 int id;
571 uae_u32 size;
572 const TCHAR *name;
573 struct shmpiece_reg *next;
574 struct shmpiece_reg *prev;
575 } shmpiece;
576
577 extern shmpiece *shm_start;
578
579 extern uae_u8* natmem_offset;
580 extern uae_u8 *natmem_reserved;
581 extern uae_u32 natmem_reserved_size;
582
583 #endif
584
585 extern bool mapped_malloc (addrbank*);
586 extern void mapped_free (addrbank*);
587 extern void clearexec (void);
588 extern void mapkick (void);
589 extern void a3000_fakekick (int);
590
591 extern uaecptr strcpyha_safe (uaecptr dst, const uae_char *src);
592 extern uae_char *strcpyah_safe (uae_char *dst, uaecptr src, int maxsize);
593 extern void memcpyha_safe (uaecptr dst, const uae_u8 *src, int size);
594 extern void memcpyha (uaecptr dst, const uae_u8 *src, int size);
595 extern void memcpyah_safe (uae_u8 *dst, uaecptr src, int size);
596 extern void memcpyah (uae_u8 *dst, uaecptr src, int size);
597
598 extern uae_s32 getz2size (struct uae_prefs *p);
599 uae_u32 getz2endaddr (void);
600
601 #define UAE_MEMORY_REGIONS_MAX 64
602 #define UAE_MEMORY_REGION_NAME_LENGTH 64
603
604 #define UAE_MEMORY_REGION_RAM (1 << 0)
605 #define UAE_MEMORY_REGION_ALIAS (1 << 1)
606 #define UAE_MEMORY_REGION_MIRROR (1 << 2)
607
608 #ifdef FSUAE // NL
609 int uae_get_memory_checksum(void *data, int size);
610 #endif
611
612 /* Get a list of memory regions in the Amiga address space */
613
614 typedef struct UaeMemoryRegion {
615 uaecptr start;
616 uae_u32 size;
617 TCHAR name[UAE_MEMORY_REGION_NAME_LENGTH];
618 TCHAR rom_name[UAE_MEMORY_REGION_NAME_LENGTH];
619 uaecptr alias;
620 int flags;
621 uae_u8 *memory;
622 } UaeMemoryRegion;
623
624 typedef struct UaeMemoryMap {
625 UaeMemoryRegion regions[UAE_MEMORY_REGIONS_MAX];
626 int num_regions;
627 } UaeMemoryMap;
628
629 void uae_memory_map(UaeMemoryMap *map);
630
631 #endif /* UAE_MEMORY_H */
632