1 /* the ordering of these includes is important - stdio can have inline 2 functions - so can mem68k.h - and registers.h must appear before them */ 3 4 #include "generator.h" 5 #include "registers.h" 6 7 #include <stdio.h> 8 9 #include "cpu68k.h" 10 #include "mem68k.h" 11 #include "reg68k.h" 12 13 #define DATAREG(a) (regs.regs[a]) 14 #define ADDRREG(a) (regs.regs[8+(a)]) 15 #define PC (regs.pc) 16 #define SR (regs.sr.sr_int) 17 #define SP (regs.sp) 18 #define STOP (regs.stop) 19 #define TFLAG (regs.sr.sr_struct.t) 20 #define SFLAG (regs.sr.sr_struct.s) 21 #define XFLAG (regs.sr.sr_struct.x) 22 #define NFLAG (regs.sr.sr_struct.n) 23 #define ZFLAG (regs.sr.sr_struct.z) 24 #define VFLAG (regs.sr.sr_struct.v) 25 #define CFLAG (regs.sr.sr_struct.c) 26 idxval_dst(t_ipc * ipc)27static __inline__ sint32 idxval_dst(t_ipc *ipc) { 28 switch( ((ipc->dst>>27) & 1) | ((ipc->dst>>30) & 2) ) { 29 case 0: /* data, word */ 30 return ((sint16)DATAREG((ipc->dst>>28)&7))+((((sint32)(ipc->dst<<8)))>>8); 31 case 1: /* data, long */ 32 return ((sint32)DATAREG((ipc->dst>>28)&7))+((((sint32)(ipc->dst<<8)))>>8); 33 case 2: /* addr, word */ 34 return ((sint16)ADDRREG((ipc->dst>>28)&7))+((((sint32)(ipc->dst<<8)))>>8); 35 case 3: /* addr, long */ 36 return ((sint32)ADDRREG((ipc->dst>>28)&7))+((((sint32)(ipc->dst<<8)))>>8); 37 } 38 return 0; 39 } 40 idxval_src(t_ipc * ipc)41static __inline__ sint32 idxval_src(t_ipc *ipc) { 42 switch( ((ipc->src>>27) & 1) | ((ipc->src>>30) & 2) ) { 43 case 0: /* data, word */ 44 return ((sint16)DATAREG((ipc->src>>28)&7))+((((sint32)(ipc->src<<8)))>>8); 45 case 1: /* data, long */ 46 return ((sint32)DATAREG((ipc->src>>28)&7))+((((sint32)(ipc->src<<8)))>>8); 47 case 2: /* addr, word */ 48 return ((sint16)ADDRREG((ipc->src>>28)&7))+((((sint32)(ipc->src<<8)))>>8); 49 case 3: /* addr, long */ 50 return ((sint32)ADDRREG((ipc->src>>28)&7))+((((sint32)(ipc->src<<8)))>>8); 51 } 52 return 0; 53 } 54