1 // AsmJit - Machine code generation for C++
2 //
3 // * Official AsmJit Home Page: https://asmjit.com
4 // * Official Github Repository: https://github.com/asmjit/asmjit
5 //
6 // Copyright (c) 2008-2020 The AsmJit Authors
7 //
8 // This software is provided 'as-is', without any express or implied
9 // warranty. In no event will the authors be held liable for any damages
10 // arising from the use of this software.
11 //
12 // Permission is granted to anyone to use this software for any purpose,
13 // including commercial applications, and to alter it and redistribute it
14 // freely, subject to the following restrictions:
15 //
16 // 1. The origin of this software must not be misrepresented; you must not
17 // claim that you wrote the original software. If you use this software
18 // in a product, an acknowledgment in the product documentation would be
19 // appreciated but is not required.
20 // 2. Altered source versions must be plainly marked as such, and must not be
21 // misrepresented as being the original software.
22 // 3. This notice may not be removed or altered from any source distribution.
23
24 #ifndef ASMJIT_X86_X86FEATURES_H_INCLUDED
25 #define ASMJIT_X86_X86FEATURES_H_INCLUDED
26
27 #include "../core/features.h"
28
ASMJIT_BEGIN_SUB_NAMESPACE(x86)29 ASMJIT_BEGIN_SUB_NAMESPACE(x86)
30
31 //! \addtogroup asmjit_x86
32 //! \{
33
34 // ============================================================================
35 // [asmjit::x86::Features]
36 // ============================================================================
37
38 //! CPU features (X86).
39 class Features : public BaseFeatures {
40 public:
41 //! CPU feature ID.
42 enum Id : uint32_t {
43 // @EnumValuesBegin{"enum": "x86::Features::Id"}@
44
45 kNone = 0, //!< No feature (never set, used internally).
46
47 kMT, //!< CPU has multi-threading capabilities.
48 kNX, //!< CPU has Not-Execute-Bit aka DEP (data-execution prevention).
49
50 k3DNOW, //!< CPU has 3DNOW (3DNOW base instructions) [AMD].
51 k3DNOW2, //!< CPU has 3DNOW2 (enhanced 3DNOW) [AMD].
52 kADX, //!< CPU has ADX (multi-precision add-carry instruction extensions).
53 kAESNI, //!< CPU has AESNI (AES encode/decode instructions).
54 kALTMOVCR8, //!< CPU has LOCK MOV R<->CR0 (supports `MOV R<->CR8` via `LOCK MOV R<->CR0` in 32-bit mode) [AMD].
55 kAVX, //!< CPU has AVX (advanced vector extensions).
56 kAVX2, //!< CPU has AVX2 (advanced vector extensions 2).
57 kAVX512_4FMAPS, //!< CPU has AVX512_FMAPS (FMA packed single).
58 kAVX512_4VNNIW, //!< CPU has AVX512_VNNIW (vector NN instructions word variable precision).
59 kAVX512_BF16, //!< CPU has AVX512_BF16 (BFLOAT16 support instruction).
60 kAVX512_BITALG, //!< CPU has AVX512_BITALG (VPOPCNT[B|W], VPSHUFBITQMB).
61 kAVX512_BW, //!< CPU has AVX512_BW (packed BYTE|WORD).
62 kAVX512_CDI, //!< CPU has AVX512_CDI (conflict detection).
63 kAVX512_DQ, //!< CPU has AVX512_DQ (packed DWORD|QWORD).
64 kAVX512_ERI, //!< CPU has AVX512_ERI (exponential and reciprocal).
65 kAVX512_F, //!< CPU has AVX512_F (AVX512 foundation).
66 kAVX512_IFMA, //!< CPU has AVX512_IFMA (integer fused-multiply-add using 52-bit precision).
67 kAVX512_PFI, //!< CPU has AVX512_PFI (prefetch instructions).
68 kAVX512_VBMI, //!< CPU has AVX512_VBMI (vector byte manipulation).
69 kAVX512_VBMI2, //!< CPU has AVX512_VBMI2 (vector byte manipulation 2).
70 kAVX512_VL, //!< CPU has AVX512_VL (vector length extensions).
71 kAVX512_VNNI, //!< CPU has AVX512_VNNI (vector neural network instructions).
72 kAVX512_VP2INTERSECT, //!< CPU has AVX512_VP2INTERSECT
73 kAVX512_VPOPCNTDQ, //!< CPU has AVX512_VPOPCNTDQ (VPOPCNT[D|Q] instructions).
74 kBMI, //!< CPU has BMI (bit manipulation instructions #1).
75 kBMI2, //!< CPU has BMI2 (bit manipulation instructions #2).
76 kCLDEMOTE, //!< CPU has CLDEMOTE (cache line demote).
77 kCLFLUSH, //!< CPU has CLFUSH (Cache Line flush).
78 kCLFLUSHOPT, //!< CPU has CLFUSHOPT (Cache Line flush - optimized).
79 kCLWB, //!< CPU has CLWB.
80 kCLZERO, //!< CPU has CLZERO.
81 kCMOV, //!< CPU has CMOV (CMOV and FCMOV instructions).
82 kCMPXCHG16B, //!< CPU has CMPXCHG16B (compare-exchange 16 bytes) [X86_64].
83 kCMPXCHG8B, //!< CPU has CMPXCHG8B (compare-exchange 8 bytes).
84 kENCLV, //!< CPU has ENCLV.
85 kENQCMD, //!< CPU has ENQCMD (enqueue stores).
86 kERMS, //!< CPU has ERMS (enhanced REP MOVSB/STOSB).
87 kF16C, //!< CPU has F16C.
88 kFMA, //!< CPU has FMA (fused-multiply-add 3 operand form).
89 kFMA4, //!< CPU has FMA4 (fused-multiply-add 4 operand form).
90 kFPU, //!< CPU has FPU (FPU support).
91 kFSGSBASE, //!< CPU has FSGSBASE.
92 kFXSR, //!< CPU has FXSR (FXSAVE/FXRSTOR instructions).
93 kFXSROPT, //!< CPU has FXSROTP (FXSAVE/FXRSTOR is optimized).
94 kGEODE, //!< CPU has GEODE extensions (3DNOW additions).
95 kGFNI, //!< CPU has GFNI (Galois field instructions).
96 kHLE, //!< CPU has HLE.
97 kI486, //!< CPU has I486 features (I486+ support).
98 kLAHFSAHF, //!< CPU has LAHF/SAHF (LAHF/SAHF in 64-bit mode) [X86_64].
99 kLWP, //!< CPU has LWP (lightweight profiling) [AMD].
100 kLZCNT, //!< CPU has LZCNT (LZCNT instruction).
101 kMMX, //!< CPU has MMX (MMX base instructions).
102 kMMX2, //!< CPU has MMX2 (MMX extensions or MMX2).
103 kMONITOR, //!< CPU has MONITOR (MONITOR/MWAIT instructions).
104 kMONITORX, //!< CPU has MONITORX (MONITORX/MWAITX instructions).
105 kMOVBE, //!< CPU has MOVBE (move with byte-order swap).
106 kMOVDIR64B, //!< CPU has MOVDIR64B (move 64 bytes as direct store).
107 kMOVDIRI, //!< CPU has MOVDIRI (move dword/qword as direct store).
108 kMPX, //!< CPU has MPX (memory protection extensions).
109 kMSR, //!< CPU has MSR (RDMSR/WRMSR instructions).
110 kMSSE, //!< CPU has MSSE (misaligned SSE support).
111 kOSXSAVE, //!< CPU has OSXSAVE (XSAVE enabled by OS).
112 kPCLMULQDQ, //!< CPU has PCLMULQDQ (packed carry-less multiplication).
113 kPCOMMIT, //!< CPU has PCOMMIT (PCOMMIT instruction).
114 kPCONFIG, //!< CPU has PCONFIG (PCONFIG instruction).
115 kPOPCNT, //!< CPU has POPCNT (POPCNT instruction).
116 kPREFETCHW, //!< CPU has PREFETCHW.
117 kPREFETCHWT1, //!< CPU has PREFETCHWT1.
118 kRDPID, //!< CPU has RDPID.
119 kRDRAND, //!< CPU has RDRAND.
120 kRDSEED, //!< CPU has RDSEED.
121 kRDTSC, //!< CPU has RDTSC.
122 kRDTSCP, //!< CPU has RDTSCP.
123 kRTM, //!< CPU has RTM.
124 kSHA, //!< CPU has SHA (SHA-1 and SHA-256 instructions).
125 kSKINIT, //!< CPU has SKINIT (SKINIT/STGI instructions) [AMD].
126 kSMAP, //!< CPU has SMAP (supervisor-mode access prevention).
127 kSMEP, //!< CPU has SMEP (supervisor-mode execution prevention).
128 kSMX, //!< CPU has SMX (safer mode extensions).
129 kSSE, //!< CPU has SSE.
130 kSSE2, //!< CPU has SSE2.
131 kSSE3, //!< CPU has SSE3.
132 kSSE4_1, //!< CPU has SSE4.1.
133 kSSE4_2, //!< CPU has SSE4.2.
134 kSSE4A, //!< CPU has SSE4A [AMD].
135 kSSSE3, //!< CPU has SSSE3.
136 kSVM, //!< CPU has SVM (virtualization) [AMD].
137 kTBM, //!< CPU has TBM (trailing bit manipulation) [AMD].
138 kTSX, //!< CPU has TSX.
139 kVAES, //!< CPU has VAES (vector AES 256|512 bit support).
140 kVMX, //!< CPU has VMX (virtualization) [INTEL].
141 kVPCLMULQDQ, //!< CPU has VPCLMULQDQ (vector PCLMULQDQ 256|512-bit support).
142 kWAITPKG, //!< CPU has WAITPKG (UMONITOR, UMWAIT, TPAUSE).
143 kWBNOINVD, //!< CPU has WBNOINVD.
144 kXOP, //!< CPU has XOP (XOP instructions) [AMD].
145 kXSAVE, //!< CPU has XSAVE.
146 kXSAVEC, //!< CPU has XSAVEC.
147 kXSAVEOPT, //!< CPU has XSAVEOPT.
148 kXSAVES, //!< CPU has XSAVES.
149
150 // @EnumValuesEnd@
151
152 kCount //!< Count of X86 CPU features.
153 };
154
155 //! \name Construction / Destruction
156 //! \{
157
158 inline Features() noexcept
159 : BaseFeatures() {}
160 inline Features(const Features& other) noexcept
161 : BaseFeatures(other) {}
162
163 //! \}
164
165 //! \name Overloaded Operators
166 //! \{
167
168 inline Features& operator=(const Features& other) noexcept = default;
169
170 //! \}
171
172 //! \name Accessors
173 //! \{
174
175 #define ASMJIT_X86_FEATURE(FEATURE) \
176 inline bool has##FEATURE() const noexcept { return has(k##FEATURE); }
177
178 ASMJIT_X86_FEATURE(MT)
179 ASMJIT_X86_FEATURE(NX)
180
181 ASMJIT_X86_FEATURE(3DNOW)
182 ASMJIT_X86_FEATURE(3DNOW2)
183 ASMJIT_X86_FEATURE(ADX)
184 ASMJIT_X86_FEATURE(AESNI)
185 ASMJIT_X86_FEATURE(ALTMOVCR8)
186 ASMJIT_X86_FEATURE(AVX)
187 ASMJIT_X86_FEATURE(AVX2)
188 ASMJIT_X86_FEATURE(AVX512_4FMAPS)
189 ASMJIT_X86_FEATURE(AVX512_4VNNIW)
190 ASMJIT_X86_FEATURE(AVX512_BF16)
191 ASMJIT_X86_FEATURE(AVX512_BITALG)
192 ASMJIT_X86_FEATURE(AVX512_BW)
193 ASMJIT_X86_FEATURE(AVX512_CDI)
194 ASMJIT_X86_FEATURE(AVX512_DQ)
195 ASMJIT_X86_FEATURE(AVX512_ERI)
196 ASMJIT_X86_FEATURE(AVX512_F)
197 ASMJIT_X86_FEATURE(AVX512_IFMA)
198 ASMJIT_X86_FEATURE(AVX512_PFI)
199 ASMJIT_X86_FEATURE(AVX512_VBMI)
200 ASMJIT_X86_FEATURE(AVX512_VBMI2)
201 ASMJIT_X86_FEATURE(AVX512_VL)
202 ASMJIT_X86_FEATURE(AVX512_VNNI)
203 ASMJIT_X86_FEATURE(AVX512_VP2INTERSECT)
204 ASMJIT_X86_FEATURE(AVX512_VPOPCNTDQ)
205 ASMJIT_X86_FEATURE(BMI)
206 ASMJIT_X86_FEATURE(BMI2)
207 ASMJIT_X86_FEATURE(CLDEMOTE)
208 ASMJIT_X86_FEATURE(CLFLUSH)
209 ASMJIT_X86_FEATURE(CLFLUSHOPT)
210 ASMJIT_X86_FEATURE(CLWB)
211 ASMJIT_X86_FEATURE(CLZERO)
212 ASMJIT_X86_FEATURE(CMOV)
213 ASMJIT_X86_FEATURE(CMPXCHG16B)
214 ASMJIT_X86_FEATURE(CMPXCHG8B)
215 ASMJIT_X86_FEATURE(ENCLV)
216 ASMJIT_X86_FEATURE(ENQCMD)
217 ASMJIT_X86_FEATURE(ERMS)
218 ASMJIT_X86_FEATURE(F16C)
219 ASMJIT_X86_FEATURE(FMA)
220 ASMJIT_X86_FEATURE(FMA4)
221 ASMJIT_X86_FEATURE(FPU)
222 ASMJIT_X86_FEATURE(FSGSBASE)
223 ASMJIT_X86_FEATURE(FXSR)
224 ASMJIT_X86_FEATURE(FXSROPT)
225 ASMJIT_X86_FEATURE(GEODE)
226 ASMJIT_X86_FEATURE(GFNI)
227 ASMJIT_X86_FEATURE(HLE)
228 ASMJIT_X86_FEATURE(I486)
229 ASMJIT_X86_FEATURE(LAHFSAHF)
230 ASMJIT_X86_FEATURE(LWP)
231 ASMJIT_X86_FEATURE(LZCNT)
232 ASMJIT_X86_FEATURE(MMX)
233 ASMJIT_X86_FEATURE(MMX2)
234 ASMJIT_X86_FEATURE(MONITOR)
235 ASMJIT_X86_FEATURE(MONITORX)
236 ASMJIT_X86_FEATURE(MOVBE)
237 ASMJIT_X86_FEATURE(MOVDIR64B)
238 ASMJIT_X86_FEATURE(MOVDIRI)
239 ASMJIT_X86_FEATURE(MPX)
240 ASMJIT_X86_FEATURE(MSR)
241 ASMJIT_X86_FEATURE(MSSE)
242 ASMJIT_X86_FEATURE(OSXSAVE)
243 ASMJIT_X86_FEATURE(PCLMULQDQ)
244 ASMJIT_X86_FEATURE(PCOMMIT)
245 ASMJIT_X86_FEATURE(PCONFIG)
246 ASMJIT_X86_FEATURE(POPCNT)
247 ASMJIT_X86_FEATURE(PREFETCHW)
248 ASMJIT_X86_FEATURE(PREFETCHWT1)
249 ASMJIT_X86_FEATURE(RDPID)
250 ASMJIT_X86_FEATURE(RDRAND)
251 ASMJIT_X86_FEATURE(RDSEED)
252 ASMJIT_X86_FEATURE(RDTSC)
253 ASMJIT_X86_FEATURE(RDTSCP)
254 ASMJIT_X86_FEATURE(RTM)
255 ASMJIT_X86_FEATURE(SHA)
256 ASMJIT_X86_FEATURE(SKINIT)
257 ASMJIT_X86_FEATURE(SMAP)
258 ASMJIT_X86_FEATURE(SMEP)
259 ASMJIT_X86_FEATURE(SMX)
260 ASMJIT_X86_FEATURE(SSE)
261 ASMJIT_X86_FEATURE(SSE2)
262 ASMJIT_X86_FEATURE(SSE3)
263 ASMJIT_X86_FEATURE(SSSE3)
264 ASMJIT_X86_FEATURE(SSE4A)
265 ASMJIT_X86_FEATURE(SSE4_1)
266 ASMJIT_X86_FEATURE(SSE4_2)
267 ASMJIT_X86_FEATURE(SVM)
268 ASMJIT_X86_FEATURE(TBM)
269 ASMJIT_X86_FEATURE(TSX)
270 ASMJIT_X86_FEATURE(XSAVE)
271 ASMJIT_X86_FEATURE(XSAVEC)
272 ASMJIT_X86_FEATURE(XSAVEOPT)
273 ASMJIT_X86_FEATURE(XSAVES)
274 ASMJIT_X86_FEATURE(VAES)
275 ASMJIT_X86_FEATURE(VMX)
276 ASMJIT_X86_FEATURE(VPCLMULQDQ)
277 ASMJIT_X86_FEATURE(WAITPKG)
278 ASMJIT_X86_FEATURE(WBNOINVD)
279 ASMJIT_X86_FEATURE(XOP)
280
281 #undef ASMJIT_X86_FEATURE
282
283 //! \}
284 };
285
286 //! \}
287
288 ASMJIT_END_SUB_NAMESPACE
289
290 #endif // ASMJIT_X86_X86FEATURES_H_INCLUDED
291