1 // license:BSD-3-Clause
2 // copyright-holders:Wilbert Pol
3 /**********************************************************************
4 
5     PC-style floppy disk controller emulation
6 
7     TODO:
8         - check how the drive select from DOR register, and the drive select
9         from the fdc are related !!!!
10         - if all drives do not have a disk in them, and the fdc is reset, is a int generated?
11         (if yes, indicates drives are ready without discs, if no indicates no drives are ready)
12         - status register a, status register b
13 
14 **********************************************************************/
15 
16 #include "emu.h"
17 #include "machine/pc_fdc.h"
18 #include "imagedev/floppy.h"
19 
20 //#define LOG_GENERAL   (1U << 0) //defined in logmacro.h already
21 
22 //#define VERBOSE (LOG_GENERAL)
23 //#define LOG_OUTPUT_STREAM std::cout
24 
25 #include "logmacro.h"
26 
27 
28 DEFINE_DEVICE_TYPE(PC_FDC_XT, pc_fdc_xt_device, "pc_fdc_xt", "PC FDC (XT)")
29 
30 // The schematics show address decoding is minimal
map(address_map & map)31 void pc_fdc_xt_device::map(address_map &map)
32 {
33 	map(0x0, 0x0).r(fdc, FUNC(upd765a_device::msr_r)).w(FUNC(pc_fdc_xt_device::dor_w));
34 	map(0x1, 0x1).r(fdc, FUNC(upd765a_device::fifo_r)).w(FUNC(pc_fdc_xt_device::dor_fifo_w));
35 	map(0x2, 0x2).w(FUNC(pc_fdc_xt_device::dor_w));
36 	map(0x3, 0x3).w(FUNC(pc_fdc_xt_device::dor_w));
37 	map(0x4, 0x5).m(fdc, FUNC(upd765a_device::map));
38 }
39 
40 
pc_fdc_family_device(const machine_config & mconfig,device_type type,const char * tag,device_t * owner,uint32_t clock)41 pc_fdc_family_device::pc_fdc_family_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
42 	device_t(mconfig, type, tag, owner, clock), fdc(*this, "upd765"),
43 	intrq_cb(*this),
44 	drq_cb(*this)
45 {
46 }
47 
tc_w(bool state)48 void pc_fdc_family_device::tc_w(bool state)
49 {
50 	fdc->tc_w(state);
51 }
52 
dma_r()53 uint8_t pc_fdc_family_device::dma_r()
54 {
55 	return fdc->dma_r();
56 }
57 
dma_w(uint8_t data)58 void pc_fdc_family_device::dma_w(uint8_t data)
59 {
60 	fdc->dma_w(data);
61 }
62 
device_add_mconfig(machine_config & config)63 void pc_fdc_family_device::device_add_mconfig(machine_config &config)
64 {
65 	UPD765A(config, fdc, 8'000'000, false, false);
66 	fdc->intrq_wr_callback().set(FUNC(pc_fdc_family_device::irq_w));
67 	fdc->drq_wr_callback().set(FUNC(pc_fdc_family_device::drq_w));
68 }
69 
device_start()70 void pc_fdc_family_device::device_start()
71 {
72 	intrq_cb.resolve();
73 	drq_cb.resolve();
74 
75 	for(int i=0; i<4; i++) {
76 		char name[2] = {static_cast<char>('0'+i), 0};
77 		floppy_connector *conn = subdevice<floppy_connector>(name);
78 		floppy[i] = conn ? conn->get_device() : nullptr;
79 	}
80 
81 	irq = drq = false;
82 	fdc_irq = fdc_drq = false;
83 	dor = 0x00;
84 }
85 
device_reset()86 void pc_fdc_family_device::device_reset()
87 {
88 }
89 
90 // Bits 0-1 select one of the 4 drives, but only if the associated
91 // motor bit is on
92 
93 // Bit 2 is tied to the upd765 reset line
94 
95 // Bit 3 enables the irq and drq lines
96 
97 // Bit 4-7 control the drive motors
98 
dor_w(uint8_t data)99 void pc_fdc_family_device::dor_w(uint8_t data)
100 {
101 	LOG("dor = %02x\n", data);
102 	uint8_t pdor = dor;
103 	dor = data;
104 
105 	for(int i=0; i<4; i++)
106 		if(floppy[i])
107 			floppy[i]->mon_w(!(dor & (0x10 << i)));
108 
109 	int fid = dor & 3;
110 	if(dor & (0x10 << fid))
111 		fdc->set_floppy(floppy[fid]);
112 	else
113 		fdc->set_floppy(nullptr);
114 
115 	check_irq();
116 	check_drq();
117 	if((pdor^dor) & 4)
118 		fdc->reset();
119 }
120 
dor_r()121 uint8_t pc_fdc_family_device::dor_r()
122 {
123 	return dor;
124 }
125 
ccr_w(uint8_t data)126 void pc_fdc_family_device::ccr_w(uint8_t data)
127 {
128 	static const int rates[4] = { 500000, 300000, 250000, 1000000 };
129 	LOG("ccr = %02x\n", data);
130 	fdc->set_rate(rates[data & 3]);
131 }
132 
dor_fifo_w(uint8_t data)133 void pc_fdc_xt_device::dor_fifo_w(uint8_t data)
134 {
135 	fdc->fifo_w(data);
136 	dor_w(data);
137 }
138 
irq_w(int state)139 void pc_fdc_family_device::irq_w(int state)
140 {
141 	fdc_irq = state;
142 	check_irq();
143 }
144 
drq_w(int state)145 void pc_fdc_family_device::drq_w(int state)
146 {
147 	fdc_drq = state;
148 	check_drq();
149 }
150 
check_irq()151 void pc_fdc_family_device::check_irq()
152 {
153 	bool pirq = irq;
154 	irq = fdc_irq && (dor & 4) && (dor & 8);
155 	if(irq != pirq && !intrq_cb.isnull()) {
156 		LOG("pc_irq = %d\n", irq);
157 		intrq_cb(irq);
158 	}
159 }
160 
check_drq()161 void pc_fdc_family_device::check_drq()
162 {
163 	bool pdrq = drq;
164 	drq = fdc_drq && (dor & 4) && (dor & 8);
165 	if(drq != pdrq && !drq_cb.isnull())
166 		drq_cb(drq);
167 }
168 
pc_fdc_xt_device(const machine_config & mconfig,const char * tag,device_t * owner,uint32_t clock)169 pc_fdc_xt_device::pc_fdc_xt_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : pc_fdc_family_device(mconfig, PC_FDC_XT, tag, owner, clock)
170 {
171 }
172