1 // license:GPL-2.0+
2 // copyright-holders:Jarek Burczynski,Ernesto Corvi
3
4 #include "emu.h"
5 #include "ym2151.h"
6 #include <algorithm>
7
8 DEFINE_DEVICE_TYPE(YM2151, ym2151_device, "ym2151", "Yamaha YM2151 OPM")
9 DEFINE_DEVICE_TYPE(YM2164, ym2164_device, "ym2164", "Yamaha YM2164 OPP")
10 DEFINE_DEVICE_TYPE(YM2414, ym2414_device, "ym2414", "Yamaha YM2414 OPZ")
11
12
13 #define FREQ_SH 16 /* 16.16 fixed point (frequency calculations) */
14 #define EG_SH 16 /* 16.16 fixed point (envelope generator timing) */
15 #define LFO_SH 10 /* 22.10 fixed point (LFO calculations) */
16 #define TIMER_SH 16 /* 16.16 fixed point (timers calculations) */
17
18 #define FREQ_MASK ((1<<FREQ_SH)-1)
19
20 #define ENV_BITS 10
21 #define ENV_LEN (1<<ENV_BITS)
22 #define ENV_STEP (128.0/ENV_LEN)
23
24 #define MAX_ATT_INDEX (ENV_LEN-1) /* 1023 */
25 #define MIN_ATT_INDEX (0) /* 0 */
26
27 #define EG_ATT 4
28 #define EG_DEC 3
29 #define EG_SUS 2
30 #define EG_REL 1
31 #define EG_OFF 0
32
33
34 #define ENV_QUIET (TL_TAB_LEN>>3)
35
36
37 const uint8_t ym2151_device::eg_inc[19*RATE_STEPS] = {
38 /*cycle:0 1 2 3 4 5 6 7*/
39
40 /* 0 */ 0,1, 0,1, 0,1, 0,1, /* rates 00..11 0 (increment by 0 or 1) */
41 /* 1 */ 0,1, 0,1, 1,1, 0,1, /* rates 00..11 1 */
42 /* 2 */ 0,1, 1,1, 0,1, 1,1, /* rates 00..11 2 */
43 /* 3 */ 0,1, 1,1, 1,1, 1,1, /* rates 00..11 3 */
44
45 /* 4 */ 1,1, 1,1, 1,1, 1,1, /* rate 12 0 (increment by 1) */
46 /* 5 */ 1,1, 1,2, 1,1, 1,2, /* rate 12 1 */
47 /* 6 */ 1,2, 1,2, 1,2, 1,2, /* rate 12 2 */
48 /* 7 */ 1,2, 2,2, 1,2, 2,2, /* rate 12 3 */
49
50 /* 8 */ 2,2, 2,2, 2,2, 2,2, /* rate 13 0 (increment by 2) */
51 /* 9 */ 2,2, 2,4, 2,2, 2,4, /* rate 13 1 */
52 /*10 */ 2,4, 2,4, 2,4, 2,4, /* rate 13 2 */
53 /*11 */ 2,4, 4,4, 2,4, 4,4, /* rate 13 3 */
54
55 /*12 */ 4,4, 4,4, 4,4, 4,4, /* rate 14 0 (increment by 4) */
56 /*13 */ 4,4, 4,8, 4,4, 4,8, /* rate 14 1 */
57 /*14 */ 4,8, 4,8, 4,8, 4,8, /* rate 14 2 */
58 /*15 */ 4,8, 8,8, 4,8, 8,8, /* rate 14 3 */
59
60 /*16 */ 8,8, 8,8, 8,8, 8,8, /* rates 15 0, 15 1, 15 2, 15 3 (increment by 8) */
61 /*17 */ 16,16,16,16,16,16,16,16, /* rates 15 2, 15 3 for attack */
62 /*18 */ 0,0, 0,0, 0,0, 0,0, /* infinity rates for attack and decay(s) */
63 };
64
65
66 #define O(a) (a*RATE_STEPS)
67
68 /*note that there is no O(17) in this table - it's directly in the code */
69 const uint8_t ym2151_device::eg_rate_select[32+64+32] = { /* Envelope Generator rates (32 + 64 rates + 32 RKS) */
70 /* 32 dummy (infinite time) rates */
71 O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
72 O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
73 O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
74 O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
75
76 /* rates 00-11 */
77 O( 0),O( 1),O( 2),O( 3),
78 O( 0),O( 1),O( 2),O( 3),
79 O( 0),O( 1),O( 2),O( 3),
80 O( 0),O( 1),O( 2),O( 3),
81 O( 0),O( 1),O( 2),O( 3),
82 O( 0),O( 1),O( 2),O( 3),
83 O( 0),O( 1),O( 2),O( 3),
84 O( 0),O( 1),O( 2),O( 3),
85 O( 0),O( 1),O( 2),O( 3),
86 O( 0),O( 1),O( 2),O( 3),
87 O( 0),O( 1),O( 2),O( 3),
88 O( 0),O( 1),O( 2),O( 3),
89
90 /* rate 12 */
91 O( 4),O( 5),O( 6),O( 7),
92
93 /* rate 13 */
94 O( 8),O( 9),O(10),O(11),
95
96 /* rate 14 */
97 O(12),O(13),O(14),O(15),
98
99 /* rate 15 */
100 O(16),O(16),O(16),O(16),
101
102 /* 32 dummy rates (same as 15 3) */
103 O(16),O(16),O(16),O(16),O(16),O(16),O(16),O(16),
104 O(16),O(16),O(16),O(16),O(16),O(16),O(16),O(16),
105 O(16),O(16),O(16),O(16),O(16),O(16),O(16),O(16),
106 O(16),O(16),O(16),O(16),O(16),O(16),O(16),O(16)
107 };
108 #undef O
109
110 /*rate 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15*/
111 /*shift 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0, 0, 0, 0 */
112 /*mask 2047, 1023, 511, 255, 127, 63, 31, 15, 7, 3, 1, 0, 0, 0, 0, 0 */
113
114 #define O(a) (a*1)
115 const uint8_t ym2151_device::eg_rate_shift[32+64+32] = { /* Envelope Generator counter shifts (32 + 64 rates + 32 RKS) */
116 /* 32 infinite time rates */
117 O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
118 O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
119 O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
120 O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
121
122 /* rates 00-11 */
123 O(11),O(11),O(11),O(11),
124 O(10),O(10),O(10),O(10),
125 O( 9),O( 9),O( 9),O( 9),
126 O( 8),O( 8),O( 8),O( 8),
127 O( 7),O( 7),O( 7),O( 7),
128 O( 6),O( 6),O( 6),O( 6),
129 O( 5),O( 5),O( 5),O( 5),
130 O( 4),O( 4),O( 4),O( 4),
131 O( 3),O( 3),O( 3),O( 3),
132 O( 2),O( 2),O( 2),O( 2),
133 O( 1),O( 1),O( 1),O( 1),
134 O( 0),O( 0),O( 0),O( 0),
135
136 /* rate 12 */
137 O( 0),O( 0),O( 0),O( 0),
138
139 /* rate 13 */
140 O( 0),O( 0),O( 0),O( 0),
141
142 /* rate 14 */
143 O( 0),O( 0),O( 0),O( 0),
144
145 /* rate 15 */
146 O( 0),O( 0),O( 0),O( 0),
147
148 /* 32 dummy rates (same as 15 3) */
149 O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
150 O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
151 O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
152 O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0)
153 };
154 #undef O
155
156 /* DT2 defines offset in cents from base note
157 *
158 * This table defines offset in frequency-deltas table.
159 * User's Manual page 22
160 *
161 * Values below were calculated using formula: value = orig.val / 1.5625
162 *
163 * DT2=0 DT2=1 DT2=2 DT2=3
164 * 0 600 781 950
165 */
166 const uint32_t ym2151_device::dt2_tab[4] = { 0, 384, 500, 608 };
167
168 /* DT1 defines offset in Hertz from base note
169 * This table is converted while initialization...
170 * Detune table shown in YM2151 User's Manual is wrong (verified on the real chip)
171 */
172
173 const uint8_t ym2151_device::dt1_tab[4*32] = { /* 4*32 DT1 values */
174 /* DT1=0 */
175 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
176 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
177
178 /* DT1=1 */
179 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2,
180 2, 3, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 8, 8, 8, 8,
181
182 /* DT1=2 */
183 1, 1, 1, 1, 2, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5,
184 5, 6, 6, 7, 8, 8, 9,10,11,12,13,14,16,16,16,16,
185
186 /* DT1=3 */
187 2, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7,
188 8, 8, 9,10,11,12,13,14,16,17,19,20,22,22,22,22
189 };
190
191 const uint16_t ym2151_device::phaseinc_rom[768] = {
192 1299,1300,1301,1302,1303,1304,1305,1306,1308,1309,1310,1311,1313,1314,1315,1316,
193 1318,1319,1320,1321,1322,1323,1324,1325,1327,1328,1329,1330,1332,1333,1334,1335,
194 1337,1338,1339,1340,1341,1342,1343,1344,1346,1347,1348,1349,1351,1352,1353,1354,
195 1356,1357,1358,1359,1361,1362,1363,1364,1366,1367,1368,1369,1371,1372,1373,1374,
196 1376,1377,1378,1379,1381,1382,1383,1384,1386,1387,1388,1389,1391,1392,1393,1394,
197 1396,1397,1398,1399,1401,1402,1403,1404,1406,1407,1408,1409,1411,1412,1413,1414,
198 1416,1417,1418,1419,1421,1422,1423,1424,1426,1427,1429,1430,1431,1432,1434,1435,
199 1437,1438,1439,1440,1442,1443,1444,1445,1447,1448,1449,1450,1452,1453,1454,1455,
200 1458,1459,1460,1461,1463,1464,1465,1466,1468,1469,1471,1472,1473,1474,1476,1477,
201 1479,1480,1481,1482,1484,1485,1486,1487,1489,1490,1492,1493,1494,1495,1497,1498,
202 1501,1502,1503,1504,1506,1507,1509,1510,1512,1513,1514,1515,1517,1518,1520,1521,
203 1523,1524,1525,1526,1528,1529,1531,1532,1534,1535,1536,1537,1539,1540,1542,1543,
204 1545,1546,1547,1548,1550,1551,1553,1554,1556,1557,1558,1559,1561,1562,1564,1565,
205 1567,1568,1569,1570,1572,1573,1575,1576,1578,1579,1580,1581,1583,1584,1586,1587,
206 1590,1591,1592,1593,1595,1596,1598,1599,1601,1602,1604,1605,1607,1608,1609,1610,
207 1613,1614,1615,1616,1618,1619,1621,1622,1624,1625,1627,1628,1630,1631,1632,1633,
208 1637,1638,1639,1640,1642,1643,1645,1646,1648,1649,1651,1652,1654,1655,1656,1657,
209 1660,1661,1663,1664,1666,1667,1669,1670,1672,1673,1675,1676,1678,1679,1681,1682,
210 1685,1686,1688,1689,1691,1692,1694,1695,1697,1698,1700,1701,1703,1704,1706,1707,
211 1709,1710,1712,1713,1715,1716,1718,1719,1721,1722,1724,1725,1727,1728,1730,1731,
212 1734,1735,1737,1738,1740,1741,1743,1744,1746,1748,1749,1751,1752,1754,1755,1757,
213 1759,1760,1762,1763,1765,1766,1768,1769,1771,1773,1774,1776,1777,1779,1780,1782,
214 1785,1786,1788,1789,1791,1793,1794,1796,1798,1799,1801,1802,1804,1806,1807,1809,
215 1811,1812,1814,1815,1817,1819,1820,1822,1824,1825,1827,1828,1830,1832,1833,1835,
216 1837,1838,1840,1841,1843,1845,1846,1848,1850,1851,1853,1854,1856,1858,1859,1861,
217 1864,1865,1867,1868,1870,1872,1873,1875,1877,1879,1880,1882,1884,1885,1887,1888,
218 1891,1892,1894,1895,1897,1899,1900,1902,1904,1906,1907,1909,1911,1912,1914,1915,
219 1918,1919,1921,1923,1925,1926,1928,1930,1932,1933,1935,1937,1939,1940,1942,1944,
220 1946,1947,1949,1951,1953,1954,1956,1958,1960,1961,1963,1965,1967,1968,1970,1972,
221 1975,1976,1978,1980,1982,1983,1985,1987,1989,1990,1992,1994,1996,1997,1999,2001,
222 2003,2004,2006,2008,2010,2011,2013,2015,2017,2019,2021,2022,2024,2026,2028,2029,
223 2032,2033,2035,2037,2039,2041,2043,2044,2047,2048,2050,2052,2054,2056,2058,2059,
224 2062,2063,2065,2067,2069,2071,2073,2074,2077,2078,2080,2082,2084,2086,2088,2089,
225 2092,2093,2095,2097,2099,2101,2103,2104,2107,2108,2110,2112,2114,2116,2118,2119,
226 2122,2123,2125,2127,2129,2131,2133,2134,2137,2139,2141,2142,2145,2146,2148,2150,
227 2153,2154,2156,2158,2160,2162,2164,2165,2168,2170,2172,2173,2176,2177,2179,2181,
228 2185,2186,2188,2190,2192,2194,2196,2197,2200,2202,2204,2205,2208,2209,2211,2213,
229 2216,2218,2220,2222,2223,2226,2227,2230,2232,2234,2236,2238,2239,2242,2243,2246,
230 2249,2251,2253,2255,2256,2259,2260,2263,2265,2267,2269,2271,2272,2275,2276,2279,
231 2281,2283,2285,2287,2288,2291,2292,2295,2297,2299,2301,2303,2304,2307,2308,2311,
232 2315,2317,2319,2321,2322,2325,2326,2329,2331,2333,2335,2337,2338,2341,2342,2345,
233 2348,2350,2352,2354,2355,2358,2359,2362,2364,2366,2368,2370,2371,2374,2375,2378,
234 2382,2384,2386,2388,2389,2392,2393,2396,2398,2400,2402,2404,2407,2410,2411,2414,
235 2417,2419,2421,2423,2424,2427,2428,2431,2433,2435,2437,2439,2442,2445,2446,2449,
236 2452,2454,2456,2458,2459,2462,2463,2466,2468,2470,2472,2474,2477,2480,2481,2484,
237 2488,2490,2492,2494,2495,2498,2499,2502,2504,2506,2508,2510,2513,2516,2517,2520,
238 2524,2526,2528,2530,2531,2534,2535,2538,2540,2542,2544,2546,2549,2552,2553,2556,
239 2561,2563,2565,2567,2568,2571,2572,2575,2577,2579,2581,2583,2586,2589,2590,2593
240 };
241
242
243 /*
244 Noise LFO waveform.
245
246 Here are just 256 samples out of much longer data.
247
248 It does NOT repeat every 256 samples on real chip and I wasnt able to find
249 the point where it repeats (even in strings as long as 131072 samples).
250
251 I only put it here because its better than nothing and perhaps
252 someone might be able to figure out the real algorithm.
253
254
255 Note that (due to the way the LFO output is calculated) it is quite
256 possible that two values: 0x80 and 0x00 might be wrong in this table.
257 To be exact:
258 some 0x80 could be 0x81 as well as some 0x00 could be 0x01.
259 */
260
261 const uint8_t ym2151_device::lfo_noise_waveform[256] = {
262 0xFF,0xEE,0xD3,0x80,0x58,0xDA,0x7F,0x94,0x9E,0xE3,0xFA,0x00,0x4D,0xFA,0xFF,0x6A,
263 0x7A,0xDE,0x49,0xF6,0x00,0x33,0xBB,0x63,0x91,0x60,0x51,0xFF,0x00,0xD8,0x7F,0xDE,
264 0xDC,0x73,0x21,0x85,0xB2,0x9C,0x5D,0x24,0xCD,0x91,0x9E,0x76,0x7F,0x20,0xFB,0xF3,
265 0x00,0xA6,0x3E,0x42,0x27,0x69,0xAE,0x33,0x45,0x44,0x11,0x41,0x72,0x73,0xDF,0xA2,
266
267 0x32,0xBD,0x7E,0xA8,0x13,0xEB,0xD3,0x15,0xDD,0xFB,0xC9,0x9D,0x61,0x2F,0xBE,0x9D,
268 0x23,0x65,0x51,0x6A,0x84,0xF9,0xC9,0xD7,0x23,0xBF,0x65,0x19,0xDC,0x03,0xF3,0x24,
269 0x33,0xB6,0x1E,0x57,0x5C,0xAC,0x25,0x89,0x4D,0xC5,0x9C,0x99,0x15,0x07,0xCF,0xBA,
270 0xC5,0x9B,0x15,0x4D,0x8D,0x2A,0x1E,0x1F,0xEA,0x2B,0x2F,0x64,0xA9,0x50,0x3D,0xAB,
271
272 0x50,0x77,0xE9,0xC0,0xAC,0x6D,0x3F,0xCA,0xCF,0x71,0x7D,0x80,0xA6,0xFD,0xFF,0xB5,
273 0xBD,0x6F,0x24,0x7B,0x00,0x99,0x5D,0xB1,0x48,0xB0,0x28,0x7F,0x80,0xEC,0xBF,0x6F,
274 0x6E,0x39,0x90,0x42,0xD9,0x4E,0x2E,0x12,0x66,0xC8,0xCF,0x3B,0x3F,0x10,0x7D,0x79,
275 0x00,0xD3,0x1F,0x21,0x93,0x34,0xD7,0x19,0x22,0xA2,0x08,0x20,0xB9,0xB9,0xEF,0x51,
276
277 0x99,0xDE,0xBF,0xD4,0x09,0x75,0xE9,0x8A,0xEE,0xFD,0xE4,0x4E,0x30,0x17,0xDF,0xCE,
278 0x11,0xB2,0x28,0x35,0xC2,0x7C,0x64,0xEB,0x91,0x5F,0x32,0x0C,0x6E,0x00,0xF9,0x92,
279 0x19,0xDB,0x8F,0xAB,0xAE,0xD6,0x12,0xC4,0x26,0x62,0xCE,0xCC,0x0A,0x03,0xE7,0xDD,
280 0xE2,0x4D,0x8A,0xA6,0x46,0x95,0x0F,0x8F,0xF5,0x15,0x97,0x32,0xD4,0x28,0x1E,0x55
281 };
282
283
284
285
286
init_tables()287 void ym2151_device::init_tables()
288 {
289 for (int x=0; x<TL_RES_LEN; x++)
290 {
291 double m = floor(1<<16) / pow(2, (x+1) * (ENV_STEP/4.0) / 8.0);
292
293 /* we never reach (1<<16) here due to the (x+1) */
294 /* result fits within 16 bits at maximum */
295
296 int n = (int)m; /* 16 bits here */
297 n >>= 4; /* 12 bits here */
298 if (n&1) /* round to closest */
299 n = (n>>1)+1;
300 else
301 n = n>>1;
302 /* 11 bits here (rounded) */
303 n <<= 2; /* 13 bits here (as in real chip) */
304 tl_tab[ x*2 + 0 ] = n;
305 tl_tab[ x*2 + 1 ] = -tl_tab[ x*2 + 0 ];
306
307 for (int i=1; i<13; i++)
308 {
309 tl_tab[ x*2+0 + i*2*TL_RES_LEN ] = tl_tab[ x*2+0 ]>>i;
310 tl_tab[ x*2+1 + i*2*TL_RES_LEN ] = -tl_tab[ x*2+0 + i*2*TL_RES_LEN ];
311 }
312 }
313
314 for (int i=0; i<SIN_LEN; i++)
315 {
316 /* non-standard sinus */
317 double m = sin( ((i*2)+1) * M_PI / SIN_LEN ); /* verified on the real chip */
318
319 /* we never reach zero here due to ((i*2)+1) */
320
321 /* convert to 'decibels' */
322 double o = 8*log(1.0/fabs(m))/log(2.0);
323
324 o = o / (ENV_STEP/4);
325
326 int n = (int)(2.0*o);
327 if (n&1) /* round to closest */
328 n = (n>>1)+1;
329 else
330 n = n>>1;
331
332 sin_tab[ i ] = n*2 + (m>=0.0? 0: 1 );
333 }
334
335 /* calculate d1l_tab table */
336 for (int i=0; i<16; i++)
337 {
338 d1l_tab[i] = (i!=15 ? i : i+16) * (4.0/ENV_STEP); /* every 3 'dB' except for all bits = 1 = 45+48 'dB' */
339 }
340
341 /* this loop calculates Hertz values for notes from c-0 to b-7 */
342 /* including 64 'cents' (100/64 that is 1.5625 of real cent) per note */
343 /* i*100/64/1200 is equal to i/768 */
344
345 /* real chip works with 10 bits fixed point values (10.10) */
346
347 for (int i=0; i<768; i++)
348 {
349 /* octave 2 - reference octave */
350 freq[ 768+2*768+i ] = (phaseinc_rom[i] << (FREQ_SH - 10)) & 0xffffffc0; /* adjust to X.10 fixed point */
351 /* octave 0 and octave 1 */
352 for (int j=0; j<2; j++)
353 {
354 freq[768 + j*768 + i] = (freq[ 768+2*768+i ] >> (2-j) ) & 0xffffffc0; /* adjust to X.10 fixed point */
355 }
356 /* octave 3 to 7 */
357 for (int j=3; j<8; j++)
358 {
359 freq[768 + j*768 + i] = freq[ 768+2*768+i ] << (j-2);
360 }
361 }
362
363 /* octave -1 (all equal to: oct 0, _KC_00_, _KF_00_) */
364 for (int i=0; i<768; i++)
365 {
366 freq[ 0*768 + i ] = freq[1*768+0];
367 }
368
369 /* octave 8 and 9 (all equal to: oct 7, _KC_14_, _KF_63_) */
370 for (int j=8; j<10; j++)
371 {
372 for (int i=0; i<768; i++)
373 {
374 freq[768+ j*768 + i ] = freq[768 + 8*768 -1];
375 }
376 }
377
378 for (int j=0; j<4; j++)
379 {
380 for (int i=0; i<32; i++)
381 {
382 /*calculate phase increment, positive and negative values*/
383 dt1_freq[ (j+0)*32 + i ] = ( dt1_tab[j*32+i] * SIN_LEN) >> (20 - FREQ_SH);
384 dt1_freq[ (j+4)*32 + i ] = -dt1_freq[ (j+0)*32 + i ];
385 }
386 }
387 }
388
calculate_timers()389 void ym2151_device::calculate_timers()
390 {
391 /* calculate timers' deltas */
392 for (int i=0; i<1024; i++)
393 {
394 /* ASG 980324: changed to compute both tim_A_tab and timer_A_time */
395 timer_A_time[i] = clocks_to_attotime(64 * (1024 - i));
396 }
397 for (int i=0; i<256; i++)
398 {
399 /* ASG 980324: changed to compute both tim_B_tab and timer_B_time */
400 timer_B_time[i] = clocks_to_attotime(1024 * (256 - i));
401 }
402 }
403
calculate_timers()404 void ym2164_device::calculate_timers()
405 {
406 /* calculate timers' deltas */
407 for (int i=0; i<1024; i++)
408 {
409 /* ASG 980324: changed to compute both tim_A_tab and timer_A_time */
410 timer_A_time[i] = clocks_to_attotime(64 * (1024 - i));
411 }
412 for (int i=0; i<256; i++)
413 {
414 /* ASG 980324: changed to compute both tim_B_tab and timer_B_time */
415 timer_B_time[i] = clocks_to_attotime(2048 * (256 - i));
416 }
417 }
418
key_on(uint32_t key_set,uint32_t eg_cnt)419 void ym2151_device::YM2151Operator::key_on(uint32_t key_set, uint32_t eg_cnt)
420 {
421 if (!key)
422 {
423 phase = 0; /* clear phase */
424 state = EG_ATT; /* KEY ON = attack */
425 volume += (~volume * (eg_inc[eg_sel_ar + ((eg_cnt >> eg_sh_ar)&7)])) >> 4;
426 if (volume <= MIN_ATT_INDEX)
427 {
428 volume = MIN_ATT_INDEX;
429 state = EG_DEC;
430 }
431 }
432 key |= key_set;
433 }
434
435
key_off(uint32_t key_set)436 void ym2151_device::YM2151Operator::key_off(uint32_t key_set)
437 {
438 if (key)
439 {
440 key &= ~key_set;
441 if (!key)
442 {
443 if (state > EG_REL)
444 state = EG_REL; /* KEY OFF = release */
445 }
446 }
447 }
448
envelope_KONKOFF(YM2151Operator * op,int v)449 void ym2151_device::envelope_KONKOFF(YM2151Operator * op, int v)
450 {
451 // m1, m2, c1, c2
452 static uint8_t masks[4] = { 0x08, 0x20, 0x10, 0x40 };
453 for(int i=0; i != 4; i++)
454 if (v & masks[i]) /* M1 */
455 op[i].key_on(1, eg_cnt);
456 else
457 op[i].key_off(1);
458 }
459
460
set_connect(YM2151Operator * om1,int cha,int v)461 void ym2151_device::set_connect(YM2151Operator *om1, int cha, int v)
462 {
463 YM2151Operator *om2 = om1+1;
464 YM2151Operator *oc1 = om1+2;
465
466 /* set connect algorithm */
467
468 /* MEM is simply one sample delay */
469
470 switch( v&7 )
471 {
472 case 0:
473 /* M1---C1---MEM---M2---C2---OUT */
474 om1->connect = &c1;
475 oc1->connect = &mem;
476 om2->connect = &c2;
477 om1->mem_connect = &m2;
478 break;
479
480 case 1:
481 /* M1------+-MEM---M2---C2---OUT */
482 /* C1-+ */
483 om1->connect = &mem;
484 oc1->connect = &mem;
485 om2->connect = &c2;
486 om1->mem_connect = &m2;
487 break;
488
489 case 2:
490 /* M1-----------------+-C2---OUT */
491 /* C1---MEM---M2-+ */
492 om1->connect = &c2;
493 oc1->connect = &mem;
494 om2->connect = &c2;
495 om1->mem_connect = &m2;
496 break;
497
498 case 3:
499 /* M1---C1---MEM------+-C2---OUT */
500 /* M2-+ */
501 om1->connect = &c1;
502 oc1->connect = &mem;
503 om2->connect = &c2;
504 om1->mem_connect = &c2;
505 break;
506
507 case 4:
508 /* M1---C1-+-OUT */
509 /* M2---C2-+ */
510 /* MEM: not used */
511 om1->connect = &c1;
512 oc1->connect = &chanout[cha];
513 om2->connect = &c2;
514 om1->mem_connect = &mem; /* store it anywhere where it will not be used */
515 break;
516
517 case 5:
518 /* +----C1----+ */
519 /* M1-+-MEM---M2-+-OUT */
520 /* +----C2----+ */
521 om1->connect = nullptr; /* special mark */
522 oc1->connect = &chanout[cha];
523 om2->connect = &chanout[cha];
524 om1->mem_connect = &m2;
525 break;
526
527 case 6:
528 /* M1---C1-+ */
529 /* M2-+-OUT */
530 /* C2-+ */
531 /* MEM: not used */
532 om1->connect = &c1;
533 oc1->connect = &chanout[cha];
534 om2->connect = &chanout[cha];
535 om1->mem_connect = &mem; /* store it anywhere where it will not be used */
536 break;
537
538 case 7:
539 /* M1-+ */
540 /* C1-+-OUT */
541 /* M2-+ */
542 /* C2-+ */
543 /* MEM: not used*/
544 om1->connect = &chanout[cha];
545 oc1->connect = &chanout[cha];
546 om2->connect = &chanout[cha];
547 om1->mem_connect = &mem; /* store it anywhere where it will not be used */
548 break;
549 }
550 }
551
552
refresh_EG(YM2151Operator * op)553 void ym2151_device::refresh_EG(YM2151Operator * op)
554 {
555 uint32_t kc;
556 uint32_t v;
557
558 kc = op->kc;
559
560 /* v = 32 + 2*RATE + RKS = max 126 */
561
562 v = kc >> op->ks;
563 if ((op->ar+v) < 32+62)
564 {
565 op->eg_sh_ar = eg_rate_shift [op->ar + v ];
566 op->eg_sel_ar = eg_rate_select[op->ar + v ];
567 }
568 else
569 {
570 op->eg_sh_ar = 0;
571 op->eg_sel_ar = 17*RATE_STEPS;
572 }
573 op->eg_sh_d1r = eg_rate_shift [op->d1r + v];
574 op->eg_sel_d1r= eg_rate_select[op->d1r + v];
575 op->eg_sh_d2r = eg_rate_shift [op->d2r + v];
576 op->eg_sel_d2r= eg_rate_select[op->d2r + v];
577 op->eg_sh_rr = eg_rate_shift [op->rr + v];
578 op->eg_sel_rr = eg_rate_select[op->rr + v];
579
580
581 op+=1;
582
583 v = kc >> op->ks;
584 if ((op->ar+v) < 32+62)
585 {
586 op->eg_sh_ar = eg_rate_shift [op->ar + v ];
587 op->eg_sel_ar = eg_rate_select[op->ar + v ];
588 }
589 else
590 {
591 op->eg_sh_ar = 0;
592 op->eg_sel_ar = 17*RATE_STEPS;
593 }
594 op->eg_sh_d1r = eg_rate_shift [op->d1r + v];
595 op->eg_sel_d1r= eg_rate_select[op->d1r + v];
596 op->eg_sh_d2r = eg_rate_shift [op->d2r + v];
597 op->eg_sel_d2r= eg_rate_select[op->d2r + v];
598 op->eg_sh_rr = eg_rate_shift [op->rr + v];
599 op->eg_sel_rr = eg_rate_select[op->rr + v];
600
601 op+=1;
602
603 v = kc >> op->ks;
604 if ((op->ar+v) < 32+62)
605 {
606 op->eg_sh_ar = eg_rate_shift [op->ar + v ];
607 op->eg_sel_ar = eg_rate_select[op->ar + v ];
608 }
609 else
610 {
611 op->eg_sh_ar = 0;
612 op->eg_sel_ar = 17*RATE_STEPS;
613 }
614 op->eg_sh_d1r = eg_rate_shift [op->d1r + v];
615 op->eg_sel_d1r= eg_rate_select[op->d1r + v];
616 op->eg_sh_d2r = eg_rate_shift [op->d2r + v];
617 op->eg_sel_d2r= eg_rate_select[op->d2r + v];
618 op->eg_sh_rr = eg_rate_shift [op->rr + v];
619 op->eg_sel_rr = eg_rate_select[op->rr + v];
620
621 op+=1;
622
623 v = kc >> op->ks;
624 if ((op->ar+v) < 32+62)
625 {
626 op->eg_sh_ar = eg_rate_shift [op->ar + v ];
627 op->eg_sel_ar = eg_rate_select[op->ar + v ];
628 }
629 else
630 {
631 op->eg_sh_ar = 0;
632 op->eg_sel_ar = 17*RATE_STEPS;
633 }
634 op->eg_sh_d1r = eg_rate_shift [op->d1r + v];
635 op->eg_sel_d1r= eg_rate_select[op->d1r + v];
636 op->eg_sh_d2r = eg_rate_shift [op->d2r + v];
637 op->eg_sel_d2r= eg_rate_select[op->d2r + v];
638 op->eg_sh_rr = eg_rate_shift [op->rr + v];
639 op->eg_sel_rr = eg_rate_select[op->rr + v];
640 }
641
642
643 /* write a register on YM2151 chip number 'n' */
write_reg(int r,int v)644 void ym2151_device::write_reg(int r, int v)
645 {
646 YM2151Operator *op = &oper[ (r&0x07)*4+((r&0x18)>>3) ];
647
648 /* adjust bus to 8 bits */
649 r &= 0xff;
650 v &= 0xff;
651
652 #if 0
653 /* There is no info on what YM2151 really does when busy flag is set */
654 if ( status & 0x80 ) return;
655 timer_set ( attotime::from_hz(clock()) * 64, chip, 0, timer_callback_chip_busy);
656 status |= 0x80; /* set busy flag for 64 chip clock cycles */
657 #endif
658
659 switch(r & 0xe0)
660 {
661 case 0x00:
662 switch(r){
663 case 0x01: /* LFO reset(bit 1), Test Register (other bits) */
664 test = v;
665 if (v&2) lfo_phase = 0;
666 break;
667
668 case 0x08:
669 envelope_KONKOFF(&oper[ (v&7)*4 ], v );
670 break;
671
672 case 0x0f: /* noise mode enable, noise period */
673 noise = v;
674 noise_f = std::max<u32>(2, 32 - (v & 0x1f)); /* rate 30 and 31 are the same */
675 break;
676
677 case 0x10: /* timer A hi */
678 timer_A_index = (timer_A_index & 0x003) | (v<<2);
679 break;
680
681 case 0x11: /* timer A low */
682 timer_A_index = (timer_A_index & 0x3fc) | (v & 3);
683 break;
684
685 case 0x12: /* timer B */
686 timer_B_index = v;
687 break;
688
689 case 0x14: /* CSM, irq flag reset, irq enable, timer start/stop */
690
691 irq_enable = v; /* bit 3-timer B, bit 2-timer A, bit 7 - CSM */
692
693 if (v&0x10) /* reset timer A irq flag */
694 {
695 status &= ~1;
696 timer_A_irq_off->adjust(attotime::zero);
697 }
698
699 if (v&0x20) /* reset timer B irq flag */
700 {
701 status &= ~2;
702 timer_B_irq_off->adjust(attotime::zero);
703 }
704
705 if (v&0x02)
706 { /* load and start timer B */
707 /* ASG 980324: added a real timer */
708 /* start timer _only_ if it wasn't already started (it will reload time value next round) */
709 if (!timer_B->enable(true))
710 {
711 timer_B->adjust(timer_B_time[ timer_B_index ]);
712 timer_B_index_old = timer_B_index;
713 }
714 }
715 else
716 { /* stop timer B */
717 timer_B->enable(false);
718 }
719
720 if (v&0x01)
721 { /* load and start timer A */
722 /* ASG 980324: added a real timer */
723 /* start timer _only_ if it wasn't already started (it will reload time value next round) */
724 if (!timer_A->enable(true))
725 {
726 timer_A->adjust(timer_A_time[ timer_A_index ]);
727 timer_A_index_old = timer_A_index;
728 }
729 }
730 else
731 { /* stop timer A */
732 /* ASG 980324: added a real timer */
733 timer_A->enable(false);
734 }
735 break;
736
737 case 0x18: /* LFO frequency */
738 {
739 lfo_overflow = ( 1 << ((15-(v>>4))+3) ) * (1<<LFO_SH);
740 lfo_counter_add = 0x10 + (v & 0x0f);
741 }
742 break;
743
744 case 0x19: /* PMD (bit 7==1) or AMD (bit 7==0) */
745 if (v&0x80)
746 pmd = v & 0x7f;
747 else
748 amd = v & 0x7f;
749 break;
750
751 case 0x1b: /* CT2, CT1, LFO waveform */
752 ct = v >> 6;
753 lfo_wsel = v & 3;
754 m_portwritehandler(0, ct, 0xff);
755 break;
756
757 default:
758 logerror("YM2151 Write %02x to undocumented register #%02x\n",v,r);
759 break;
760 }
761 break;
762
763 case 0x20:
764 op = &oper[ (r&7) * 4 ];
765 switch(r & 0x18)
766 {
767 case 0x00: /* RL enable, Feedback, Connection */
768 op->fb_shift = ((v>>3)&7) ? ((v>>3)&7)+6:0;
769 pan[ (r&7)*2 ] = (v & 0x40) ? ~0 : 0;
770 pan[ (r&7)*2 +1 ] = (v & 0x80) ? ~0 : 0;
771 connect[r&7] = v&7;
772 set_connect(op, r&7, v&7);
773 break;
774
775 case 0x08: /* Key Code */
776 v &= 0x7f;
777 if (v != op->kc)
778 {
779 uint32_t kc, kc_channel;
780
781 kc_channel = (v - (v>>2))*64;
782 kc_channel += 768;
783 kc_channel |= (op->kc_i & 63);
784
785 (op+0)->kc = v;
786 (op+0)->kc_i = kc_channel;
787 (op+1)->kc = v;
788 (op+1)->kc_i = kc_channel;
789 (op+2)->kc = v;
790 (op+2)->kc_i = kc_channel;
791 (op+3)->kc = v;
792 (op+3)->kc_i = kc_channel;
793
794 kc = v>>2;
795
796 (op+0)->dt1 = dt1_freq[ (op+0)->dt1_i + kc ];
797 (op+0)->freq = ( (freq[ kc_channel + (op+0)->dt2 ] + (op+0)->dt1) * (op+0)->mul ) >> 1;
798
799 (op+1)->dt1 = dt1_freq[ (op+1)->dt1_i + kc ];
800 (op+1)->freq = ( (freq[ kc_channel + (op+1)->dt2 ] + (op+1)->dt1) * (op+1)->mul ) >> 1;
801
802 (op+2)->dt1 = dt1_freq[ (op+2)->dt1_i + kc ];
803 (op+2)->freq = ( (freq[ kc_channel + (op+2)->dt2 ] + (op+2)->dt1) * (op+2)->mul ) >> 1;
804
805 (op+3)->dt1 = dt1_freq[ (op+3)->dt1_i + kc ];
806 (op+3)->freq = ( (freq[ kc_channel + (op+3)->dt2 ] + (op+3)->dt1) * (op+3)->mul ) >> 1;
807
808 refresh_EG( op );
809 }
810 break;
811
812 case 0x10: /* Key Fraction */
813 v >>= 2;
814 if (v != (op->kc_i & 63))
815 {
816 uint32_t kc_channel;
817
818 kc_channel = v;
819 kc_channel |= (op->kc_i & ~63);
820
821 (op+0)->kc_i = kc_channel;
822 (op+1)->kc_i = kc_channel;
823 (op+2)->kc_i = kc_channel;
824 (op+3)->kc_i = kc_channel;
825
826 (op+0)->freq = ( (freq[ kc_channel + (op+0)->dt2 ] + (op+0)->dt1) * (op+0)->mul ) >> 1;
827 (op+1)->freq = ( (freq[ kc_channel + (op+1)->dt2 ] + (op+1)->dt1) * (op+1)->mul ) >> 1;
828 (op+2)->freq = ( (freq[ kc_channel + (op+2)->dt2 ] + (op+2)->dt1) * (op+2)->mul ) >> 1;
829 (op+3)->freq = ( (freq[ kc_channel + (op+3)->dt2 ] + (op+3)->dt1) * (op+3)->mul ) >> 1;
830 }
831 break;
832
833 case 0x18: /* PMS, AMS */
834 op->pms = (v>>4) & 7;
835 op->ams = (v & 3);
836 break;
837 }
838 break;
839
840 case 0x40: /* DT1, MUL */
841 {
842 uint32_t olddt1_i = op->dt1_i;
843 uint32_t oldmul = op->mul;
844
845 op->dt1_i = (v&0x70)<<1;
846 op->mul = (v&0x0f) ? (v&0x0f)<<1: 1;
847
848 if (olddt1_i != op->dt1_i)
849 op->dt1 = dt1_freq[ op->dt1_i + (op->kc>>2) ];
850
851 if ( (olddt1_i != op->dt1_i) || (oldmul != op->mul) )
852 op->freq = ( (freq[ op->kc_i + op->dt2 ] + op->dt1) * op->mul ) >> 1;
853 }
854 break;
855
856 case 0x60: /* TL */
857 op->tl = (v&0x7f)<<(ENV_BITS-7); /* 7bit TL */
858 break;
859
860 case 0x80: /* KS, AR */
861 {
862 uint32_t oldks = op->ks;
863 uint32_t oldar = op->ar;
864
865 op->ks = 5-(v>>6);
866 op->ar = (v&0x1f) ? 32 + ((v&0x1f)<<1) : 0;
867
868 if ( (op->ar != oldar) || (op->ks != oldks) )
869 {
870 if ((op->ar + (op->kc>>op->ks)) < 32+62)
871 {
872 op->eg_sh_ar = eg_rate_shift [op->ar + (op->kc>>op->ks) ];
873 op->eg_sel_ar = eg_rate_select[op->ar + (op->kc>>op->ks) ];
874 }
875 else
876 {
877 op->eg_sh_ar = 0;
878 op->eg_sel_ar = 17*RATE_STEPS;
879 }
880 }
881
882 if (op->ks != oldks)
883 {
884 op->eg_sh_d1r = eg_rate_shift [op->d1r + (op->kc>>op->ks) ];
885 op->eg_sel_d1r= eg_rate_select[op->d1r + (op->kc>>op->ks) ];
886 op->eg_sh_d2r = eg_rate_shift [op->d2r + (op->kc>>op->ks) ];
887 op->eg_sel_d2r= eg_rate_select[op->d2r + (op->kc>>op->ks) ];
888 op->eg_sh_rr = eg_rate_shift [op->rr + (op->kc>>op->ks) ];
889 op->eg_sel_rr = eg_rate_select[op->rr + (op->kc>>op->ks) ];
890 }
891 }
892 break;
893
894 case 0xa0: /* LFO AM enable, D1R */
895 op->AMmask = (v&0x80) ? ~0 : 0;
896 op->d1r = (v&0x1f) ? 32 + ((v&0x1f)<<1) : 0;
897 op->eg_sh_d1r = eg_rate_shift [op->d1r + (op->kc>>op->ks) ];
898 op->eg_sel_d1r= eg_rate_select[op->d1r + (op->kc>>op->ks) ];
899 break;
900
901 case 0xc0: /* DT2, D2R */
902 {
903 uint32_t olddt2 = op->dt2;
904 op->dt2 = dt2_tab[ v>>6 ];
905 if (op->dt2 != olddt2)
906 op->freq = ( (freq[ op->kc_i + op->dt2 ] + op->dt1) * op->mul ) >> 1;
907 }
908 op->d2r = (v&0x1f) ? 32 + ((v&0x1f)<<1) : 0;
909 op->eg_sh_d2r = eg_rate_shift [op->d2r + (op->kc>>op->ks) ];
910 op->eg_sel_d2r= eg_rate_select[op->d2r + (op->kc>>op->ks) ];
911 break;
912
913 case 0xe0: /* D1L, RR */
914 op->d1l = d1l_tab[ v>>4 ];
915 op->rr = 34 + ((v&0x0f)<<2);
916 op->eg_sh_rr = eg_rate_shift [op->rr + (op->kc>>op->ks) ];
917 op->eg_sel_rr = eg_rate_select[op->rr + (op->kc>>op->ks) ];
918 break;
919 }
920 }
921
write_reg(int r,int v)922 void ym2164_device::write_reg(int r, int v)
923 {
924 if (r < 0x08)
925 logerror("%s: Writing %02X to undocumented register %d\n", machine().describe_context(), v, r);
926 else if (r == 0x09)
927 ym2151_device::write_reg(0x01, v);
928 else
929 ym2151_device::write_reg(r, v);
930 }
931
device_post_load()932 void ym2151_device::device_post_load()
933 {
934 for (int j=0; j<8; j++)
935 set_connect(&oper[j*4], j, connect[j]);
936 }
937
device_start()938 void ym2151_device::device_start()
939 {
940 init_tables();
941
942 m_irqhandler.resolve_safe();
943 m_portwritehandler.resolve_safe();
944
945 m_stream = stream_alloc(0, 2, clock() / 64);
946
947 timer_A_irq_off = timer_alloc(TIMER_IRQ_A_OFF);
948 timer_B_irq_off = timer_alloc(TIMER_IRQ_B_OFF);
949 timer_A = timer_alloc(TIMER_A);
950 timer_B = timer_alloc(TIMER_B);
951
952 lfo_timer_add = 1 << LFO_SH;
953
954 eg_timer_add = 1 << EG_SH;
955 eg_timer_overflow = 3 * eg_timer_add;
956
957 irqlinestate = 0;
958
959 /* save all 32 operators */
960 save_item(STRUCT_MEMBER(oper, phase));
961 save_item(STRUCT_MEMBER(oper, freq));
962 save_item(STRUCT_MEMBER(oper, dt1));
963 save_item(STRUCT_MEMBER(oper, mul));
964 save_item(STRUCT_MEMBER(oper, dt1_i));
965 save_item(STRUCT_MEMBER(oper, dt2));
966 /* operators connection is saved in chip data block */
967 save_item(STRUCT_MEMBER(oper, mem_value));
968
969 save_item(STRUCT_MEMBER(oper, fb_shift));
970 save_item(STRUCT_MEMBER(oper, fb_out_curr));
971 save_item(STRUCT_MEMBER(oper, fb_out_prev));
972 save_item(STRUCT_MEMBER(oper, kc));
973 save_item(STRUCT_MEMBER(oper, kc_i));
974 save_item(STRUCT_MEMBER(oper, pms));
975 save_item(STRUCT_MEMBER(oper, ams));
976 save_item(STRUCT_MEMBER(oper, AMmask));
977
978 save_item(STRUCT_MEMBER(oper, state));
979 save_item(STRUCT_MEMBER(oper, eg_sh_ar));
980 save_item(STRUCT_MEMBER(oper, eg_sel_ar));
981 save_item(STRUCT_MEMBER(oper, tl));
982 save_item(STRUCT_MEMBER(oper, volume));
983 save_item(STRUCT_MEMBER(oper, eg_sh_d1r));
984 save_item(STRUCT_MEMBER(oper, eg_sel_d1r));
985 save_item(STRUCT_MEMBER(oper, d1l));
986 save_item(STRUCT_MEMBER(oper, eg_sh_d2r));
987 save_item(STRUCT_MEMBER(oper, eg_sel_d2r));
988 save_item(STRUCT_MEMBER(oper, eg_sh_rr));
989 save_item(STRUCT_MEMBER(oper, eg_sel_rr));
990
991 save_item(STRUCT_MEMBER(oper, key));
992 save_item(STRUCT_MEMBER(oper, ks));
993 save_item(STRUCT_MEMBER(oper, ar));
994 save_item(STRUCT_MEMBER(oper, d1r));
995 save_item(STRUCT_MEMBER(oper, d2r));
996 save_item(STRUCT_MEMBER(oper, rr));
997
998 save_item(STRUCT_MEMBER(oper, reserved0));
999 save_item(STRUCT_MEMBER(oper, reserved1));
1000
1001 save_item(NAME(pan));
1002
1003 save_item(NAME(eg_cnt));
1004 save_item(NAME(eg_timer));
1005 save_item(NAME(eg_timer_add));
1006 save_item(NAME(eg_timer_overflow));
1007
1008 save_item(NAME(lfo_phase));
1009 save_item(NAME(lfo_timer));
1010 save_item(NAME(lfo_timer_add));
1011 save_item(NAME(lfo_overflow));
1012 save_item(NAME(lfo_counter));
1013 save_item(NAME(lfo_counter_add));
1014 save_item(NAME(lfo_wsel));
1015 save_item(NAME(amd));
1016 save_item(NAME(pmd));
1017 save_item(NAME(lfa));
1018 save_item(NAME(lfp));
1019
1020 save_item(NAME(test));
1021 save_item(NAME(ct));
1022
1023 save_item(NAME(noise));
1024 save_item(NAME(noise_rng));
1025 save_item(NAME(noise_p));
1026 save_item(NAME(noise_f));
1027
1028 save_item(NAME(csm_req));
1029 save_item(NAME(irq_enable));
1030 save_item(NAME(status));
1031
1032 save_item(NAME(timer_A_index));
1033 save_item(NAME(timer_B_index));
1034 save_item(NAME(timer_A_index_old));
1035 save_item(NAME(timer_B_index_old));
1036
1037 save_item(NAME(irqlinestate));
1038
1039 save_item(NAME(connect));
1040
1041 save_item(NAME(m_reset_active));
1042 }
1043
device_clock_changed()1044 void ym2151_device::device_clock_changed()
1045 {
1046 m_stream->set_sample_rate(clock() / 64);
1047 calculate_timers();
1048 }
1049
1050
op_calc(YM2151Operator * OP,unsigned int env,signed int pm)1051 int ym2151_device::op_calc(YM2151Operator * OP, unsigned int env, signed int pm)
1052 {
1053 uint32_t p;
1054
1055
1056 p = (env<<3) + sin_tab[ ( ((signed int)((OP->phase & ~FREQ_MASK) + (pm<<15))) >> FREQ_SH ) & SIN_MASK ];
1057
1058 if (p >= TL_TAB_LEN)
1059 return 0;
1060
1061 return tl_tab[p];
1062 }
1063
op_calc1(YM2151Operator * OP,unsigned int env,signed int pm)1064 int ym2151_device::op_calc1(YM2151Operator * OP, unsigned int env, signed int pm)
1065 {
1066 uint32_t p;
1067 int32_t i;
1068
1069
1070 i = (OP->phase & ~FREQ_MASK) + pm;
1071
1072 /*logerror("i=%08x (i>>16)&511=%8i phase=%i [pm=%08x] ",i, (i>>16)&511, OP->phase>>FREQ_SH, pm);*/
1073
1074 p = (env<<3) + sin_tab[ (i>>FREQ_SH) & SIN_MASK];
1075
1076 /*logerror("(p&255=%i p>>8=%i) out= %i\n", p&255,p>>8, tl_tab[p&255]>>(p>>8) );*/
1077
1078 if (p >= TL_TAB_LEN)
1079 return 0;
1080
1081 return tl_tab[p];
1082 }
1083
1084
1085
1086 #define volume_calc(OP) ((OP)->tl + ((uint32_t)(OP)->volume) + (AM & (OP)->AMmask))
1087
chan_calc(unsigned int chan)1088 void ym2151_device::chan_calc(unsigned int chan)
1089 {
1090 YM2151Operator *op;
1091 unsigned int env;
1092 uint32_t AM = 0;
1093
1094 m2 = c1 = c2 = mem = 0;
1095 op = &oper[chan*4]; /* M1 */
1096
1097 *op->mem_connect = op->mem_value; /* restore delayed sample (MEM) value to m2 or c2 */
1098
1099 if (op->ams)
1100 AM = lfa << (op->ams-1);
1101 env = volume_calc(op);
1102 {
1103 int32_t out = op->fb_out_prev + op->fb_out_curr;
1104 op->fb_out_prev = op->fb_out_curr;
1105
1106 if (!op->connect)
1107 /* algorithm 5 */
1108 mem = c1 = c2 = op->fb_out_prev;
1109 else
1110 /* other algorithms */
1111 *op->connect = op->fb_out_prev;
1112
1113 op->fb_out_curr = 0;
1114 if (env < ENV_QUIET)
1115 {
1116 if (!op->fb_shift)
1117 out=0;
1118 op->fb_out_curr = op_calc1(op, env, (out<<op->fb_shift) );
1119 }
1120 }
1121
1122 env = volume_calc(op+1); /* M2 */
1123 if (env < ENV_QUIET)
1124 *(op+1)->connect += op_calc(op+1, env, m2);
1125
1126 env = volume_calc(op+2); /* C1 */
1127 if (env < ENV_QUIET)
1128 *(op+2)->connect += op_calc(op+2, env, c1);
1129
1130 env = volume_calc(op+3); /* C2 */
1131 if (env < ENV_QUIET)
1132 chanout[chan] += op_calc(op+3, env, c2);
1133 // if(chan==3) printf("%d\n", chanout[chan]);
1134
1135 /* M1 */
1136 op->mem_value = mem;
1137 }
1138
chan7_calc()1139 void ym2151_device::chan7_calc()
1140 {
1141 YM2151Operator *op;
1142 unsigned int env;
1143 uint32_t AM = 0;
1144
1145 m2 = c1 = c2 = mem = 0;
1146 op = &oper[7*4]; /* M1 */
1147
1148 *op->mem_connect = op->mem_value; /* restore delayed sample (MEM) value to m2 or c2 */
1149
1150 if (op->ams)
1151 AM = lfa << (op->ams-1);
1152 env = volume_calc(op);
1153 {
1154 int32_t out = op->fb_out_prev + op->fb_out_curr;
1155 op->fb_out_prev = op->fb_out_curr;
1156
1157 if (!op->connect)
1158 /* algorithm 5 */
1159 mem = c1 = c2 = op->fb_out_prev;
1160 else
1161 /* other algorithms */
1162 *op->connect = op->fb_out_prev;
1163
1164 op->fb_out_curr = 0;
1165 if (env < ENV_QUIET)
1166 {
1167 if (!op->fb_shift)
1168 out=0;
1169 op->fb_out_curr = op_calc1(op, env, (out<<op->fb_shift) );
1170 }
1171 }
1172
1173 env = volume_calc(op+1); /* M2 */
1174 if (env < ENV_QUIET)
1175 *(op+1)->connect += op_calc(op+1, env, m2);
1176
1177 env = volume_calc(op+2); /* C1 */
1178 if (env < ENV_QUIET)
1179 *(op+2)->connect += op_calc(op+2, env, c1);
1180
1181 env = volume_calc(op+3); /* C2 */
1182 if (noise & 0x80)
1183 {
1184 uint32_t noiseout;
1185
1186 noiseout = 0;
1187 if (env < 0x3ff)
1188 noiseout = (env ^ 0x3ff) * 2; /* range of the YM2151 noise output is -2044 to 2040 */
1189 chanout[7] += ((noise_rng&0x10000) ? noiseout: -noiseout); /* bit 16 -> output */
1190 }
1191 else
1192 {
1193 if (env < ENV_QUIET)
1194 chanout[7] += op_calc(op+3, env, c2);
1195 }
1196 /* M1 */
1197 op->mem_value = mem;
1198 }
1199
1200
1201
1202
1203
1204
1205 /*
1206 The 'rate' is calculated from following formula (example on decay rate):
1207 rks = notecode after key scaling (a value from 0 to 31)
1208 DR = value written to the chip register
1209 rate = 2*DR + rks; (max rate = 2*31+31 = 93)
1210 Four MSBs of the 'rate' above are the 'main' rate (from 00 to 15)
1211 Two LSBs of the 'rate' above are the value 'x' (the shape type).
1212 (eg. '11 2' means that 'rate' is 11*4+2=46)
1213
1214 NOTE: A 'sample' in the description below is actually 3 output samples,
1215 thats because the Envelope Generator clock is equal to internal_clock/3.
1216
1217 Single '-' (minus) character in the diagrams below represents one sample
1218 on the output; this is for rates 11 x (11 0, 11 1, 11 2 and 11 3)
1219
1220 these 'main' rates:
1221 00 x: single '-' = 2048 samples; (ie. level can change every 2048 samples)
1222 01 x: single '-' = 1024 samples;
1223 02 x: single '-' = 512 samples;
1224 03 x: single '-' = 256 samples;
1225 04 x: single '-' = 128 samples;
1226 05 x: single '-' = 64 samples;
1227 06 x: single '-' = 32 samples;
1228 07 x: single '-' = 16 samples;
1229 08 x: single '-' = 8 samples;
1230 09 x: single '-' = 4 samples;
1231 10 x: single '-' = 2 samples;
1232 11 x: single '-' = 1 sample; (ie. level can change every 1 sample)
1233
1234 Shapes for rates 11 x look like this:
1235 rate: step:
1236 11 0 01234567
1237
1238 level:
1239 0 --
1240 1 --
1241 2 --
1242 3 --
1243
1244 rate: step:
1245 11 1 01234567
1246
1247 level:
1248 0 --
1249 1 --
1250 2 -
1251 3 -
1252 4 --
1253
1254 rate: step:
1255 11 2 01234567
1256
1257 level:
1258 0 --
1259 1 -
1260 2 -
1261 3 --
1262 4 -
1263 5 -
1264
1265 rate: step:
1266 11 3 01234567
1267
1268 level:
1269 0 --
1270 1 -
1271 2 -
1272 3 -
1273 4 -
1274 5 -
1275 6 -
1276
1277
1278 For rates 12 x, 13 x, 14 x and 15 x output level changes on every
1279 sample - this means that the waveform looks like this: (but the level
1280 changes by different values on different steps)
1281 12 3 01234567
1282
1283 0 -
1284 2 -
1285 4 -
1286 8 -
1287 10 -
1288 12 -
1289 14 -
1290 18 -
1291 20 -
1292
1293 Notes about the timing:
1294 ----------------------
1295
1296 1. Synchronism
1297
1298 Output level of each two (or more) voices running at the same 'main' rate
1299 (eg 11 0 and 11 1 in the diagram below) will always be changing in sync,
1300 even if there're started with some delay.
1301
1302 Note that, in the diagram below, the decay phase in channel 0 starts at
1303 sample #2, while in channel 1 it starts at sample #6. Anyway, both channels
1304 will always change their levels at exactly the same (following) samples.
1305
1306 (S - start point of this channel, A-attack phase, D-decay phase):
1307
1308 step:
1309 01234567012345670123456
1310
1311 channel 0:
1312 --
1313 | --
1314 | -
1315 | -
1316 | --
1317 | --
1318 | --
1319 | -
1320 | -
1321 | --
1322 AADDDDDDDDDDDDDDDD
1323 S
1324
1325 01234567012345670123456
1326 channel 1:
1327 -
1328 | -
1329 | --
1330 | --
1331 | --
1332 | -
1333 | -
1334 | --
1335 | --
1336 | --
1337 AADDDDDDDDDDDDDDDD
1338 S
1339 01234567012345670123456
1340
1341
1342 2. Shifted (delayed) synchronism
1343
1344 Output of each two (or more) voices running at different 'main' rate
1345 (9 1, 10 1 and 11 1 in the diagrams below) will always be changing
1346 in 'delayed-sync' (even if there're started with some delay as in "1.")
1347
1348 Note that the shapes are delayed by exactly one sample per one 'main' rate
1349 increment. (Normally one would expect them to start at the same samples.)
1350
1351 See diagram below (* - start point of the shape).
1352
1353 cycle:
1354 0123456701234567012345670123456701234567012345670123456701234567
1355
1356 rate 09 1
1357 *-------
1358 --------
1359 ----
1360 ----
1361 --------
1362 *-------
1363 | --------
1364 | ----
1365 | ----
1366 | --------
1367 rate 10 1 |
1368 -- |
1369 *--- |
1370 ---- |
1371 -- |
1372 -- |
1373 ---- |
1374 *--- |
1375 | ---- |
1376 | -- | | <- one step (two samples) delay between 9 1 and 10 1
1377 | -- | |
1378 | ----|
1379 | *---
1380 | ----
1381 | --
1382 | --
1383 | ----
1384 rate 11 1 |
1385 - |
1386 -- |
1387 *- |
1388 -- |
1389 - |
1390 - |
1391 -- |
1392 *- |
1393 -- |
1394 - || <- one step (one sample) delay between 10 1 and 11 1
1395 - ||
1396 --|
1397 *-
1398 --
1399 -
1400 -
1401 --
1402 *-
1403 --
1404 -
1405 -
1406 --
1407 */
1408
advance_eg()1409 void ym2151_device::advance_eg()
1410 {
1411 YM2151Operator *op;
1412 unsigned int i;
1413
1414 eg_timer += eg_timer_add;
1415
1416 while (eg_timer >= eg_timer_overflow)
1417 {
1418 eg_timer -= eg_timer_overflow;
1419
1420 eg_cnt++;
1421
1422 /* envelope generator */
1423 op = &oper[0]; /* CH 0 M1 */
1424 i = 32;
1425 do
1426 {
1427 switch(op->state)
1428 {
1429 case EG_ATT: /* attack phase */
1430 if ( !(eg_cnt & ((1<<op->eg_sh_ar)-1) ) )
1431 {
1432 op->volume += (~op->volume *
1433 (eg_inc[op->eg_sel_ar + ((eg_cnt>>op->eg_sh_ar)&7)])
1434 ) >>4;
1435
1436 if (op->volume <= MIN_ATT_INDEX)
1437 {
1438 op->volume = MIN_ATT_INDEX;
1439 op->state = EG_DEC;
1440 }
1441
1442 }
1443 break;
1444
1445 case EG_DEC: /* decay phase */
1446 if ( !(eg_cnt & ((1<<op->eg_sh_d1r)-1) ) )
1447 {
1448 op->volume += eg_inc[op->eg_sel_d1r + ((eg_cnt>>op->eg_sh_d1r)&7)];
1449
1450 if ( op->volume >= op->d1l )
1451 op->state = EG_SUS;
1452
1453 }
1454 break;
1455
1456 case EG_SUS: /* sustain phase */
1457 if ( !(eg_cnt & ((1<<op->eg_sh_d2r)-1) ) )
1458 {
1459 op->volume += eg_inc[op->eg_sel_d2r + ((eg_cnt>>op->eg_sh_d2r)&7)];
1460
1461 if ( op->volume >= MAX_ATT_INDEX )
1462 {
1463 op->volume = MAX_ATT_INDEX;
1464 op->state = EG_OFF;
1465 }
1466
1467 }
1468 break;
1469
1470 case EG_REL: /* release phase */
1471 if ( !(eg_cnt & ((1<<op->eg_sh_rr)-1) ) )
1472 {
1473 op->volume += eg_inc[op->eg_sel_rr + ((eg_cnt>>op->eg_sh_rr)&7)];
1474
1475 if ( op->volume >= MAX_ATT_INDEX )
1476 {
1477 op->volume = MAX_ATT_INDEX;
1478 op->state = EG_OFF;
1479 }
1480
1481 }
1482 break;
1483 }
1484 op++;
1485 i--;
1486 }while (i);
1487 }
1488 }
1489
1490
advance()1491 void ym2151_device::advance()
1492 {
1493 YM2151Operator *op;
1494 unsigned int i;
1495 int a,p;
1496
1497 /* LFO */
1498 if (test&2)
1499 lfo_phase = 0;
1500 else
1501 {
1502 lfo_timer += lfo_timer_add;
1503 if (lfo_timer >= lfo_overflow)
1504 {
1505 lfo_timer -= lfo_overflow;
1506 lfo_counter += lfo_counter_add;
1507 lfo_phase += (lfo_counter>>4);
1508 lfo_phase &= 255;
1509 lfo_counter &= 15;
1510 }
1511 }
1512
1513 i = lfo_phase;
1514 /* calculate LFO AM and PM waveform value (all verified on real chip, except for noise algorithm which is impossible to analyse)*/
1515 switch (lfo_wsel)
1516 {
1517 case 0:
1518 /* saw */
1519 /* AM: 255 down to 0 */
1520 /* PM: 0 to 127, -127 to 0 (at PMD=127: LFP = 0 to 126, -126 to 0) */
1521 a = 255 - i;
1522 if (i<128)
1523 p = i;
1524 else
1525 p = i - 255;
1526 break;
1527 case 1:
1528 /* square */
1529 /* AM: 255, 0 */
1530 /* PM: 128,-128 (LFP = exactly +PMD, -PMD) */
1531 if (i<128)
1532 {
1533 a = 255;
1534 p = 128;
1535 }
1536 else
1537 {
1538 a = 0;
1539 p = -128;
1540 }
1541 break;
1542 case 2:
1543 /* triangle */
1544 /* AM: 255 down to 1 step -2; 0 up to 254 step +2 */
1545 /* PM: 0 to 126 step +2, 127 to 1 step -2, 0 to -126 step -2, -127 to -1 step +2*/
1546 if (i<128)
1547 a = 255 - (i*2);
1548 else
1549 a = (i*2) - 256;
1550
1551 if (i<64) /* i = 0..63 */
1552 p = i*2; /* 0 to 126 step +2 */
1553 else if (i<128) /* i = 64..127 */
1554 p = 255 - i*2; /* 127 to 1 step -2 */
1555 else if (i<192) /* i = 128..191 */
1556 p = 256 - i*2; /* 0 to -126 step -2*/
1557 else /* i = 192..255 */
1558 p = i*2 - 511; /*-127 to -1 step +2*/
1559 break;
1560 case 3:
1561 default: /*keep the compiler happy*/
1562 /* random */
1563 /* the real algorithm is unknown !!!
1564 We just use a snapshot of data from real chip */
1565
1566 /* AM: range 0 to 255 */
1567 /* PM: range -128 to 127 */
1568
1569 a = lfo_noise_waveform[i];
1570 p = a-128;
1571 break;
1572 }
1573 lfa = a * amd / 128;
1574 lfp = p * pmd / 128;
1575
1576
1577 /* The Noise Generator of the YM2151 is 17-bit shift register.
1578 * Input to the bit16 is negated (bit0 XOR bit3) (EXNOR).
1579 * Output of the register is negated (bit0 XOR bit3).
1580 * Simply use bit16 as the noise output.
1581 */
1582 noise_p += 2; // 32 clock per noise (2 * sample rate)
1583 while (noise_p >= noise_f)
1584 {
1585 uint32_t j;
1586 j = ( (noise_rng ^ (noise_rng>>3) ) & 1) ^ 1;
1587 noise_rng = (j<<16) | (noise_rng>>1);
1588 noise_p -= noise_f;
1589 }
1590
1591
1592 /* phase generator */
1593 op = &oper[0]; /* CH 0 M1 */
1594 i = 8;
1595 do
1596 {
1597 if (op->pms) /* only when phase modulation from LFO is enabled for this channel */
1598 {
1599 int32_t mod_ind = lfp; /* -128..+127 (8bits signed) */
1600 if (op->pms < 6)
1601 mod_ind >>= (6 - op->pms);
1602 else
1603 mod_ind <<= (op->pms - 5);
1604
1605 if (mod_ind)
1606 {
1607 uint32_t kc_channel = op->kc_i + mod_ind;
1608 (op+0)->phase += ( (freq[ kc_channel + (op+0)->dt2 ] + (op+0)->dt1) * (op+0)->mul ) >> 1;
1609 (op+1)->phase += ( (freq[ kc_channel + (op+1)->dt2 ] + (op+1)->dt1) * (op+1)->mul ) >> 1;
1610 (op+2)->phase += ( (freq[ kc_channel + (op+2)->dt2 ] + (op+2)->dt1) * (op+2)->mul ) >> 1;
1611 (op+3)->phase += ( (freq[ kc_channel + (op+3)->dt2 ] + (op+3)->dt1) * (op+3)->mul ) >> 1;
1612 }
1613 else /* phase modulation from LFO is equal to zero */
1614 {
1615 (op+0)->phase += (op+0)->freq;
1616 (op+1)->phase += (op+1)->freq;
1617 (op+2)->phase += (op+2)->freq;
1618 (op+3)->phase += (op+3)->freq;
1619 }
1620 }
1621 else /* phase modulation from LFO is disabled */
1622 {
1623 (op+0)->phase += (op+0)->freq;
1624 (op+1)->phase += (op+1)->freq;
1625 (op+2)->phase += (op+2)->freq;
1626 (op+3)->phase += (op+3)->freq;
1627 }
1628
1629 op+=4;
1630 i--;
1631 }while (i);
1632
1633
1634 /* CSM is calculated *after* the phase generator calculations (verified on real chip)
1635 * CSM keyon line seems to be ORed with the KO line inside of the chip.
1636 * The result is that it only works when KO (register 0x08) is off, ie. 0
1637 *
1638 * Interesting effect is that when timer A is set to 1023, the KEY ON happens
1639 * on every sample, so there is no KEY OFF at all - the result is that
1640 * the sound played is the same as after normal KEY ON.
1641 */
1642
1643 if (csm_req) /* CSM KEYON/KEYOFF seqeunce request */
1644 {
1645 if (csm_req==2) /* KEY ON */
1646 {
1647 op = &oper[0]; /* CH 0 M1 */
1648 i = 32;
1649 do
1650 {
1651 op->key_on(2, eg_cnt);
1652 op++;
1653 i--;
1654 } while (i);
1655 csm_req = 1;
1656 }
1657 else /* KEY OFF */
1658 {
1659 op = &oper[0]; /* CH 0 M1 */
1660 i = 32;
1661 do
1662 {
1663 op->key_off(2);
1664 op++;
1665 i--;
1666 }while (i);
1667 csm_req = 0;
1668 }
1669 }
1670 }
1671
1672
1673 //-------------------------------------------------
1674 // ym2151_device - constructor
1675 //-------------------------------------------------
1676
ym2151_device(const machine_config & mconfig,device_type type,const char * tag,device_t * owner,uint32_t clock)1677 ym2151_device::ym2151_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
1678 : device_t(mconfig, type, tag, owner, clock),
1679 device_sound_interface(mconfig, *this),
1680 m_stream(nullptr),
1681 m_lastreg(0),
1682 m_irqhandler(*this),
1683 m_portwritehandler(*this),
1684 m_reset_active(false)
1685 {
1686 }
1687
ym2151_device(const machine_config & mconfig,const char * tag,device_t * owner,uint32_t clock)1688 ym2151_device::ym2151_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
1689 : ym2151_device(mconfig, YM2151, tag, owner, clock)
1690 {
1691 }
1692
1693
1694 //-------------------------------------------------
1695 // ym2164_device - constructor
1696 //-------------------------------------------------
1697
ym2164_device(const machine_config & mconfig,const char * tag,device_t * owner,uint32_t clock)1698 ym2164_device::ym2164_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
1699 : ym2151_device(mconfig, YM2164, tag, owner, clock)
1700 {
1701 }
1702
1703
1704 //-------------------------------------------------
1705 // ym2414_device - constructor
1706 //-------------------------------------------------
1707
ym2414_device(const machine_config & mconfig,const char * tag,device_t * owner,uint32_t clock)1708 ym2414_device::ym2414_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
1709 : ym2151_device(mconfig, YM2414, tag, owner, clock)
1710 {
1711 }
1712
1713
1714 //-------------------------------------------------
1715 // read - read from the device
1716 //-------------------------------------------------
1717
read(offs_t offset)1718 u8 ym2151_device::read(offs_t offset)
1719 {
1720 if (offset & 1)
1721 {
1722 m_stream->update();
1723 return status;
1724 }
1725 else
1726 return 0xff; /* confirmed on a real YM2151 */
1727 }
1728
1729
1730 //-------------------------------------------------
1731 // write - write from the device
1732 //-------------------------------------------------
1733
write(offs_t offset,u8 data)1734 void ym2151_device::write(offs_t offset, u8 data)
1735 {
1736 if (offset & 1)
1737 {
1738 if (!m_reset_active)
1739 {
1740 m_stream->update();
1741 write_reg(m_lastreg, data);
1742 }
1743 }
1744 else
1745 m_lastreg = data;
1746 }
1747
1748
status_r()1749 u8 ym2151_device::status_r()
1750 {
1751 return read(1);
1752 }
1753
register_w(u8 data)1754 void ym2151_device::register_w(u8 data)
1755 {
1756 write(0, data);
1757 }
1758
data_w(u8 data)1759 void ym2151_device::data_w(u8 data)
1760 {
1761 write(1, data);
1762 }
1763
1764
1765 //-------------------------------------------------
1766 // device_reset - device-specific reset
1767 //-------------------------------------------------
1768
device_reset()1769 void ym2151_device::device_reset()
1770 {
1771 int i;
1772 /* initialize hardware registers */
1773 for (i=0; i<32; i++)
1774 {
1775 memset(&oper[i],'\0', sizeof(YM2151Operator));
1776 oper[i].volume = MAX_ATT_INDEX;
1777 oper[i].kc_i = 768; /* min kc_i value */
1778 }
1779
1780 eg_timer = 0;
1781 eg_cnt = 0;
1782
1783 lfo_timer = 0;
1784 lfo_counter= 0;
1785 lfo_phase = 0;
1786 lfo_wsel = 0;
1787 pmd = 0;
1788 amd = 0;
1789 lfa = 0;
1790 lfp = 0;
1791
1792 test= 0;
1793
1794 irq_enable = 0;
1795 /* ASG 980324 -- reset the timers before writing to the registers */
1796 timer_A->enable(false);
1797 timer_B->enable(false);
1798 timer_A_index = 0;
1799 timer_B_index = 0;
1800 timer_A_index_old = 0;
1801 timer_B_index_old = 0;
1802
1803 noise = 0;
1804 noise_rng = 0;
1805 noise_p = 0;
1806 noise_f = 32;
1807
1808 csm_req = 0;
1809 status = 0;
1810
1811 write_reg(0x1b, 0); /* only because of CT1, CT2 output pins */
1812 write_reg(0x18, 0); /* set LFO frequency */
1813 for (i=0x20; i<0x100; i++) /* set the operators */
1814 {
1815 write_reg(i, 0);
1816 }
1817 }
1818
1819
1820 //-------------------------------------------------
1821 // reset_w - handle writes to the reset lines of
1822 // the YM2151 and its associated DAC
1823 //-------------------------------------------------
1824
WRITE_LINE_MEMBER(ym2151_device::reset_w)1825 WRITE_LINE_MEMBER(ym2151_device::reset_w)
1826 {
1827 // active low reset
1828 if (!m_reset_active && !state)
1829 reset();
1830
1831 m_reset_active = !state;
1832 }
1833
1834
1835 //-------------------------------------------------
1836 // sound_stream_update - handle a stream update
1837 //-------------------------------------------------
1838
sound_stream_update(sound_stream & stream,std::vector<read_stream_view> const & inputs,std::vector<write_stream_view> & outputs)1839 void ym2151_device::sound_stream_update(sound_stream &stream, std::vector<read_stream_view> const &inputs, std::vector<write_stream_view> &outputs)
1840 {
1841 if (m_reset_active)
1842 {
1843 outputs[0].fill(0);
1844 outputs[1].fill(0);
1845 return;
1846 }
1847
1848 for (int sampindex=0; sampindex<outputs[0].samples(); sampindex++)
1849 {
1850 advance_eg();
1851
1852 for(int ch=0; ch<8; ch++)
1853 chanout[ch] = 0;
1854
1855 for(int ch=0; ch<7; ch++)
1856 chan_calc(ch);
1857 chan7_calc();
1858
1859 int outl = 0;
1860 int outr = 0;
1861 for(int ch=0; ch<8; ch++) {
1862 outl += chanout[ch] & pan[2*ch];
1863 outr += chanout[ch] & pan[2*ch+1];
1864 }
1865
1866 outputs[0].put_int_clamp(sampindex, outl, 32768);
1867 outputs[1].put_int_clamp(sampindex, outr, 32768);
1868
1869 advance();
1870 }
1871 }
1872
1873
device_timer(emu_timer & timer,device_timer_id id,int param,void * ptr)1874 void ym2151_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
1875 {
1876 switch(id) {
1877 case TIMER_IRQ_A_OFF: {
1878 int old = irqlinestate;
1879 irqlinestate &= ~1;
1880 if(old && !irqlinestate)
1881 m_irqhandler(0);
1882 break;
1883 }
1884
1885 case TIMER_IRQ_B_OFF: {
1886 int old = irqlinestate;
1887 irqlinestate &= ~2;
1888 if(old && !irqlinestate)
1889 m_irqhandler(0);
1890 break;
1891 }
1892
1893 case TIMER_A: {
1894 timer_A->adjust(timer_A_time[ timer_A_index ]);
1895 timer_A_index_old = timer_A_index;
1896 if (irq_enable & 0x80)
1897 csm_req = 2; /* request KEY ON / KEY OFF sequence */
1898 if (irq_enable & 0x04)
1899 {
1900 status |= 1;
1901 int old = irqlinestate;
1902 irqlinestate |= 1;
1903 if (!old)
1904 m_irqhandler(1);
1905 }
1906 break;
1907 }
1908
1909 case TIMER_B: {
1910 timer_B->adjust(timer_B_time[ timer_B_index ]);
1911 timer_B_index_old = timer_B_index;
1912 if (irq_enable & 0x08)
1913 {
1914 status |= 2;
1915 int old = irqlinestate;
1916 irqlinestate |= 2;
1917 if (!old)
1918 m_irqhandler(1);
1919 }
1920 break;
1921 }
1922 }
1923 }
1924