1 // license:BSD-3-Clause
2 // copyright-holders:Angelo Salese, Sandro Ronco
3 /*************************************************************************
4 
5   HD63484 ACRTC
6   Advanced CRT Controller.
7 
8 **************************************************************************/
9 
10 #ifndef MAME_VIDEO_HD63484_H
11 #define MAME_VIDEO_HD63484_H
12 
13 #pragma once
14 
15 
16 #define HD63484_DISPLAY_PIXELS_MEMBER(_name) void _name(bitmap_ind16 &bitmap, const rectangle &cliprect, int y, int x, uint16_t data)
17 
18 // ======================> hd63484_device
19 
20 class hd63484_device :  public device_t,
21 						public device_memory_interface,
22 						public device_video_interface
23 {
24 public:
25 	typedef device_delegate<void (bitmap_ind16 &bitmap, const rectangle &cliprect, int y, int x, uint16_t data)> display_delegate;
26 
27 	// construction/destruction
28 	hd63484_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
29 
set_display_callback(T &&...args)30 	template <typename... T> void set_display_callback(T &&... args) { m_display_cb.set(std::forward<T>(args)...); }
set_auto_configure_screen(bool auto_configure_screen)31 	void set_auto_configure_screen(bool auto_configure_screen) { m_auto_configure_screen = auto_configure_screen; }
set_external_skew(int skew)32 	void set_external_skew(int skew) { m_external_skew = skew; }
33 
34 	// 16-bit bus interface
35 	void write16(offs_t offset, uint16_t data);
36 	uint16_t read16(offs_t offset);
37 
38 	// 8-bit bus interface
39 	void write8(offs_t offset, uint8_t data);
40 	uint8_t read8(offs_t offset);
41 
42 	uint32_t update_screen(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
43 	virtual const tiny_rom_entry *device_rom_region() const override;
44 	virtual space_config_vector memory_space_config() const override;
45 
46 protected:
47 	// device-level overrides
48 	virtual void device_start() override;
49 	virtual void device_reset() override;
50 	//virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
51 
52 	inline uint16_t readword(offs_t address);
53 	inline void writeword(offs_t address, uint16_t data);
54 
55 private:
56 	inline void inc_ar(int value);
57 	inline void fifo_w_clear();
58 	inline void queue_w(uint8_t data);
59 	inline void dequeue_w(uint8_t *data);
60 	inline void fifo_r_clear();
61 	inline void queue_r(uint8_t data);
62 	inline void dequeue_r(uint8_t *data);
63 	inline void recompute_parameters();
64 	inline void command_end_seq();
65 	void calc_offset(int16_t x, int16_t y, uint32_t &offset, uint8_t &bit_pos);
66 	int get_bpp();
67 	uint16_t get_dot(int16_t x, int16_t y);
68 	bool set_dot(int16_t x, int16_t y, int16_t px, int16_t py);
69 	bool set_dot(int16_t x, int16_t y, uint16_t color);
70 	void draw_line(int16_t sx, int16_t sy, int16_t ex, int16_t ey);
71 	void draw_ellipse(int16_t cx, int16_t cy, double dx, double dy, double s_angol, double e_angol, bool c);
72 	void paint(int16_t sx, int16_t sy);
73 
74 	void command_wpr_exec();
75 	uint16_t command_rpr_exec();
76 	void command_clr_exec();
77 	void command_cpy_exec();
78 	void command_rct_exec();
79 	void command_line_exec();
80 	void command_gcpy_exec();
81 	void command_ptn_exec();
82 	void command_plg_exec();
83 	void command_frct_exec();
84 	void command_arc_exec();
85 	void command_earc_exec();
86 
87 	void process_fifo();
88 	void exec_abort_sequence();
89 	uint16_t video_registers_r(int offset);
90 	void video_registers_w(int offset);
91 	int translate_command(uint16_t data);
92 	void draw_graphics_line(bitmap_ind16 &bitmap, const rectangle &cliprect, int vs, int y, int layer_n, bool active, bool ins_window);
93 
94 	void register_save_state();
95 
96 	display_delegate  m_display_cb;
97 	bool m_auto_configure_screen;
98 	int m_external_skew;
99 
100 	uint8_t m_ar;
101 	uint8_t m_vreg[0x100];
102 	uint8_t m_sr;
103 
104 	uint8_t m_fifo[16];                   /* FIFO W data queue */
105 	int m_fifo_ptr;                 /* FIFO W pointer */
106 
107 	uint8_t m_fifo_r[16];             /* FIFO R data queue */
108 	int m_fifo_r_ptr;                   /* FIFO R pointer */
109 
110 
111 	uint16_t m_cr;
112 	uint16_t m_pr[0x100];                  /* parameter byte register */
113 	int m_param_ptr;                    /* parameter pointer */
114 
115 	uint32_t m_rwp[4];
116 	uint8_t m_rwp_dn;
117 
118 	uint32_t m_org_dpa;
119 	uint8_t m_org_dn;
120 	uint8_t m_org_dpd;
121 	uint16_t m_cl0;
122 	uint16_t m_cl1;
123 	uint16_t m_ccmp;
124 	uint16_t m_mask;
125 
126 	int16_t m_cpx;
127 	int16_t m_cpy;
128 
129 	uint16_t m_mwr[4];
130 	uint8_t  m_mwr_chr[4];
131 
132 	uint32_t m_sar[4];
133 	uint8_t m_sda[4];
134 
135 	uint16_t m_pram[0x10];
136 	uint8_t m_dn;
137 
138 	uint16_t m_ccr;
139 	uint16_t m_omr;
140 	uint16_t m_edg;
141 	uint16_t m_dcr;
142 
143 	uint16_t m_hc, m_hds, m_hdw, m_hws, m_hww;
144 	uint16_t m_sp[3];
145 	uint8_t m_hsw;
146 
147 	uint16_t m_vc, m_vws, m_vww, m_vds;
148 	uint8_t m_vsw;
149 
150 	uint16_t m_ppy;
151 	uint16_t m_pzcy;
152 	uint16_t m_ppx;
153 	uint16_t m_pzcx;
154 	uint16_t m_psx;
155 	uint16_t m_pex;
156 	uint16_t m_pzx;
157 	uint16_t m_psy;
158 	uint16_t m_pzy;
159 	uint16_t m_pey;
160 
161 	uint16_t m_xmin;
162 	uint16_t m_ymin;
163 	uint16_t m_xmax;
164 	uint16_t m_ymax;
165 
166 	const address_space_config      m_space_config;
167 };
168 
169 // device type definition
170 DECLARE_DEVICE_TYPE(HD63484, hd63484_device)
171 
172 #endif // MAME_VIDEO_HD63484_H
173