1 // license:CC0 2 // copyright-holders:Aaron Giles 3 4 // 5 // Netlist for Star Hawk 6 // 7 // Derived from the schematics in the Star Hawk manual. 8 // 9 // Special thanks to: 10 // * Jay Gallagher for verifying PCB components 11 // 12 // Known problems/issues: 13 // 14 // * The VCOs require high solver frequencies (100x+) to reach the 15 // correct pitches. For this reason, HLE'ed versions are 16 // provided that work correctly even at 48kHz. 17 // 18 19 #include "netlist/devices/net_lib.h" 20 #include "nl_cinemat_common.h" 21 22 23 // 24 // Optimizations 25 // 26 27 #define HLE_SHIP_VCO (1) 28 #define HLE_LAZER_VCOS (1) 29 30 31 // 32 // Debugging/test - should be off for release 33 // 34 35 #define SLOW_SHIP_WOBBLE (0) 36 37 38 // 39 // Main netlist 40 // 41 42 NETLIST_START(starhawk) 43 44 #if (HLE_LAZER_VCOS && HLE_SHIP_VCO) 45 SOLVER(Solver, 1000) 46 #else 47 SOLVER(Solver, 48000000) 48 #endif 49 PARAM(Solver.DYNAMIC_TS, 1) 50 PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 2e-5) 51 52 TTL_INPUT(I_OUT_0, 0) // active high 53 TTL_INPUT(I_OUT_1, 0) // active high 54 TTL_INPUT(I_OUT_2, 0) // active high 55 TTL_INPUT(I_OUT_3, 0) // active high 56 TTL_INPUT(I_OUT_4, 0) // active high 57 TTL_INPUT(I_OUT_7, 0) // active high 58 59 NET_C(GND, I_OUT_0.GND, I_OUT_1.GND, I_OUT_2.GND, I_OUT_3.GND, I_OUT_4.GND, I_OUT_7.GND) 60 NET_C(I_V5, I_OUT_0.VCC, I_OUT_1.VCC, I_OUT_2.VCC, I_OUT_3.VCC, I_OUT_4.VCC, I_OUT_7.VCC) 61 62 CINEMAT_LOCAL_MODELS 63 64 ANALOG_INPUT(I_V5, 5) 65 ANALOG_INPUT(I_V15, 15) 66 ANALOG_INPUT(I_VM15, -15) 67 68 RES(R1, RES_K(10)) 69 RES(R2, RES_K(10)) 70 RES(R3, RES_K(20)) 71 RES(R4, RES_K(10)) 72 RES(R5, RES_K(1)) 73 RES(R6, RES_K(150)) 74 RES(R7, 330) 75 RES(R8, RES_K(10)) 76 RES(R9, RES_K(47)) 77 RES(R10, RES_K(150)) 78 RES(R11, RES_K(100)) 79 RES(R12, RES_K(47)) 80 RES(R13, RES_K(10)) 81 RES(R14, RES_K(2.7)) 82 RES(R15, RES_K(2.7)) 83 RES(R16, RES_K(30)) 84 RES(R17, RES_K(510)) 85 RES(R18, RES_K(10)) 86 RES(R19, RES_K(33)) 87 // RES(R20, 150) -- part of final amp (not emulated) 88 // RES(R21, RES_K(22)) -- part of final amp (not emulated) 89 RES(R22, RES_K(1)) 90 // RES(R23, RES_K(10)) -- part of final amp (not emulated) 91 // RES(R24, 150) -- part of final amp (not emulated) 92 // POT(R25, RES_K(100))-- part of final amp (not emulated) 93 RES(R26, RES_K(1)) 94 RES(R27, RES_K(1)) 95 RES(R28, RES_K(510)) 96 RES(R29, RES_K(10)) // PCB verified 97 // RES(R30, ???) 98 RES(R31, RES_K(47)) // PCB verified 99 RES(R32, RES_M(3.3)) // PCB verified 100 RES(R33, RES_M(1)) 101 RES(R34, RES_K(47)) 102 RES(R35, RES_M(1)) 103 RES(R36, RES_M(1)) 104 RES(R37, RES_M(1)) 105 RES(R38, RES_M(1)) 106 RES(R39, 150) 107 RES(R40, RES_K(10)) 108 RES(R41, RES_K(20)) 109 RES(R42, RES_K(1)) 110 RES(R43, RES_M(1)) 111 RES(R44, RES_K(10)) 112 RES(R45, RES_K(10)) 113 RES(R46, 150) 114 RES(R47, RES_K(20)) 115 RES(R48, RES_M(1)) 116 RES(R49, RES_K(10)) 117 RES(R50, RES_K(1)) 118 RES(R51, RES_K(10)) 119 RES(R52, RES_K(20)) 120 RES(R53, RES_K(39)) 121 RES(R54, RES_K(82)) 122 RES(R55, RES_K(2.2)) 123 RES(R56, RES_K(1)) 124 RES(R57, RES_K(10)) 125 RES(R58, RES_K(20)) 126 RES(R59, RES_K(39)) 127 RES(R60, RES_K(82)) 128 129 // CAP(C1, CAP_U(2.2)) 130 // CAP(C2, CAP_U(2.2)) 131 // CAP(C3, CAP_U(3.3)) 132 // CAP(C4, CAP_U(3.3)) 133 CAP(C5, CAP_P(100)) 134 CAP(C6, CAP_U(3.3)) 135 CAP(C7, CAP_U(0.01)) 136 CAP(C8, CAP_U(1)) 137 CAP(C9, CAP_U(0.022)) 138 CAP(C10, CAP_U(0.15)) // 15? 139 CAP(C11, CAP_U(0.15)) 140 CAP(C12, CAP_U(15)) 141 CAP(C13, CAP_U(0.0033)) 142 CAP(C14, CAP_U(0.0047)) 143 CAP(C15, CAP_U(1)) 144 // CAP(C16, CAP_P(470)) -- part of final amp (not emulated) 145 CAP(C17, CAP_U(22)) 146 // CAP(C18, CAP_P(470)) -- part of final amp (not emulated) 147 // CAP(C19, CAP_P(470)) -- part of final amp (not emulated) 148 CAP(C20, CAP_U(1)) 149 #if (SLOW_SHIP_WOBBLE) 150 CAP(C21, CAP_U(22)) // discovered by accident, makes HLE analysis easier 151 #else 152 CAP(C21, CAP_U(0.22)) // PCB verified 153 #endif 154 CAP(C22, CAP_U(0.1)) 155 CAP(C23, CAP_U(0.0027)) 156 CAP(C24, CAP_U(0.1)) 157 CAP(C25, CAP_U(0.0027)) 158 CAP(C26, CAP_U(1)) 159 CAP(C27, CAP_U(0.1)) 160 // CAP(C39, CAP_U(1)) 161 // CAP(C40, CAP_U(1)) 162 163 D_1N914(CR1) 164 D_1N914(CR2) 165 D_1N914(CR3) 166 D_1N914(CR4) 167 D_1N914(CR5) 168 D_1N914(CR6) 169 D_1N914(CR7) 170 D_1N914(CR8) 171 D_1N914(CR9) 172 D_1N914(CR10) 173 174 Q_2N3906(Q1) // PNP 175 // Q_2N6292(Q2) // NPN -- part of final amp (not emulated) 176 // Q_2N6107(Q3) // PNP -- part of final amp (not emulated) 177 #if (!HLE_LAZER_VCOS) 178 Q_2N3904(Q4) // NPN 179 Q_2N3904(Q5) // NPN 180 #endif 181 182 TL182_DIP(IC3A) // Analog switch 183 NET_C(IC3A.6, I_V15) 184 NET_C(IC3A.7, I_V5) 185 NET_C(IC3A.8, GND) 186 NET_C(IC3A.9, I_VM15) 187 188 // TTL_7815_DIP(IC2D) // +15V Regulator -- not needed 189 // TTL_7915_DIP(IC2C) // -15V Regulator -- not needed 190 191 TL081_DIP(IC4A) // Op. Amp. 192 NET_C(IC4A.4, I_VM15) 193 NET_C(IC4A.7, I_V15) 194 195 TL081_DIP(IC4B) // Op. Amp. 196 NET_C(IC4B.4, I_VM15) 197 NET_C(IC4B.7, I_V15) 198 199 // TL081_DIP(IC4C) // Op. Amp. -- part of final amp (not emulated) 200 // NET_C(IC4C.4, I_VM15) 201 // NET_C(IC4C.7, I_V15) 202 203 TTL_74LS393_DIP(IC4E) // Dual 4-Stage Binary Counter 204 NET_C(IC4E.7, GND) 205 NET_C(IC4E.14, I_V5) 206 207 TL081_DIP(IC5A) // Op. Amp. 208 NET_C(IC5A.4, I_VM15) 209 NET_C(IC5A.7, I_V15) 210 211 TL081_DIP(IC5B) // Op. Amp. 212 NET_C(IC5B.4, I_VM15) 213 NET_C(IC5B.7, I_V15) 214 215 LM556_DIP(IC5D) 216 217 PROM_74S287_DIP(IC5E) // 1024-bit PROM -- dump needed 218 PARAM(IC5E.A.ROM, "2085.5e8e") 219 NET_C(IC5E.8, GND) 220 NET_C(IC5E.16, I_V5) 221 222 CA3080_DIP(IC6A) // Trnscndt. Op. Amp. 223 NET_C(IC6A.7, I_V15) 224 NET_C(IC6A.4, I_VM15) 225 226 TL081_DIP(IC6B) // Op. Amp. 227 NET_C(IC6B.4, I_VM15) 228 NET_C(IC6B.7, I_V15) 229 230 TTL_74LS04_DIP(IC6C) // Hex Inverting Gates 231 NET_C(IC6C.7, GND) 232 NET_C(IC6C.14, I_V5) 233 234 LM556_DIP(IC6D) 235 236 TL081_DIP(IC6E) // Op. Amp. 237 NET_C(IC6E.4, I_VM15) 238 NET_C(IC6E.7, I_V15) 239 240 TL081_DIP(IC6F) // Op. Amp. 241 NET_C(IC6F.4, I_VM15) 242 NET_C(IC6F.7, I_V15) 243 244 TTL_7406_DIP(IC7C) // Hex inverter -- currently using a clone of 7416, no open collector behavior 245 NET_C(IC7C.7, GND) 246 NET_C(IC7C.14, I_V5) 247 248 TTL_74LS393_DIP(IC7E) // Dual 4-Stage Binary Counter 249 NET_C(IC7E.7, GND) 250 NET_C(IC7E.14, I_V5) 251 252 TTL_74LS164_DIP(IC8C) // 8-bit Shift Reg. 253 NET_C(IC8C.7, GND) 254 NET_C(IC8C.14, I_V5) 255 256 TTL_74LS164_DIP(IC8D) // 8-bit Shift Reg. 257 NET_C(IC8D.7, GND) 258 NET_C(IC8D.14, I_V5) 259 260 PROM_74S287_DIP(IC8E) // 1024-bit PROM -- dump needed 261 PARAM(IC8E.A.ROM, "2085.5e8e") 262 NET_C(IC8E.8, GND) 263 NET_C(IC8E.16, I_V5) 264 265 TTL_74LS164_DIP(IC9C) // 8-bit Shift Reg. 266 NET_C(IC9C.7, GND) 267 NET_C(IC9C.14, I_V5) 268 269 TTL_74LS164_DIP(IC9D) // 8-bit Shift Reg. 270 NET_C(IC9D.7, GND) 271 NET_C(IC9D.14, I_V5) 272 273 TTL_74LS163_DIP(IC9E) // Binary Counter (schems say can sub a 74161) 274 NET_C(IC9E.8, GND) 275 NET_C(IC9E.16, I_V5) 276 277 TTL_74LS86_DIP(IC10C) // Quad 2-Input XOR Gates 278 NET_C(IC10C.7, GND) 279 NET_C(IC10C.14, I_V5) 280 281 TTL_74LS21_DIP(IC10D) // Dual 4-Input AND Gates 282 NET_C(IC10D.7, GND) 283 NET_C(IC10D.14, I_V5) 284 285 TTL_74LS393_DIP(IC10E) // Dual 4-Stage Binary Counter 286 NET_C(IC10E.7, GND) 287 NET_C(IC10E.14, I_V5) 288 289 // 290 // Top-left noise generator 291 // 292 293 NET_C(I_V5, R1.2, IC6D.14, IC6D.4, R3.2) 294 NET_C(R1.1, IC6D.1, R2.2) 295 NET_C(R2.1, IC6D.2, IC6D.6, C7.2) 296 NET_C(C7.1, GND) 297 NET_C(IC6D.7, GND) 298 NET_C(IC6D.3, C8.1, R3.1, R4.1) 299 NET_C(C8.2, GND) 300 NET_C(R4.2, IC8D.4) 301 NET_C(IC6D.5, IC8D.8, IC9D.8, IC10E.1, IC9E.2) 302 303 NET_C(IC9E.9, IC9E.7, IC9E.10, I_V5) 304 NET_C(IC9E.1, I_V5) 305 NET_C(IC9E.15, IC10E.13, IC8C.8, IC9C.8) 306 307 NET_C(IC10E.2, IC8D.3) 308 NET_C(IC10E.3, IC10D.1) 309 NET_C(IC10E.4, IC10D.2) 310 NET_C(IC10E.5, IC10D.4) 311 NET_C(IC10E.6, IC10D.5) 312 313 NET_C(IC10D.6, IC10C.5) 314 NET_C(IC10C.4, IC10C.11) 315 NET_C(IC10C.6, IC8D.1, IC8D.2) 316 317 NET_C(IC8D.9, I_V5) 318 NET_C(IC8D.13, IC9D.1, IC9D.2) 319 NET_C(IC9D.10, IC10C.13) 320 NET_C(IC9D.12, IC10C.12) 321 NET_C(IC9D.13, R8.2) 322 NET_C(IC9D.9, I_V5) 323 324 NET_C(R8.1, C10.2, R9.1) 325 NET_C(C10.1, GND) 326 NET_C(R9.2, CR1.K, CR2.A) 327 328 NET_C(IC10E.12, IC8C.3) 329 NET_C(IC10E.8, IC10D.9) 330 NET_C(IC10E.9, IC10D.10) 331 NET_C(IC10E.10, IC10D.12) 332 NET_C(IC10E.11, IC10D.13) 333 334 NET_C(IC10D.8, IC10C.1) 335 NET_C(IC10C.2, IC10C.8) 336 NET_C(IC10C.3, IC8C.1, IC8C.2) 337 338 NET_C(IC8C.9, I_V5) 339 NET_C(IC8C.13, IC9C.1, IC9C.2) 340 NET_C(IC9C.10, IC10C.10) 341 NET_C(IC9C.12, IC10C.9) 342 NET_C(IC9C.13, R10.1) 343 NET_C(IC9C.9, I_V5) 344 345 NET_C(R10.2, C11.2, R11.1) 346 NET_C(C11.1, GND) 347 NET_C(R11.2, CR2.K, CR1.A, C12.1) 348 349 NET_C(C12.2, IC6B.2, R12.1, C13.1) 350 NET_C(IC6B.3, GND) 351 NET_C(IC6B.6, C13.2, R12.2, R13.1) 352 NET_C(R13.2, C15.1) 353 NET_C(C15.2, R14.2, IC6A.2) 354 NET_C(R14.1, GND) 355 NET_C(IC6A.3, R15.2) 356 NET_C(R15.1, GND) 357 NET_C(IC6A.5, R16.2) 358 359 // 360 // Explosion 361 // 362 363 NET_C(I_OUT_0, IC6C.11) 364 NET_C(IC6C.10, R5.1) 365 NET_C(R5.2, C5.2, IC6D.8) 366 NET_C(C5.1, GND) 367 NET_C(IC6D.10, R6.2, I_V5) 368 NET_C(IC6D.12, IC6D.13, R6.1, C6.1) 369 NET_C(C6.2, GND) 370 NET_C(IC6D.9, Q1.E) 371 NET_C(Q1.B, R7.2) 372 NET_C(R7.1, GND) 373 NET_C(Q1.C, R17.2, C17.1, R16.1) 374 NET_C(R17.1, GND) 375 NET_C(C17.2, I_VM15) 376 377 // 378 // On/off switches 379 // 380 381 NET_C(I_OUT_3, IC3A.5, IC6C.3) 382 NET_C(I_OUT_4, IC3A.10) 383 384 NET_C(IC3A.1, IC4A.2, R18.1, C14.1) 385 NET_C(IC4A.3, GND) 386 NET_C(C14.2, R18.2, IC4A.6, R19.1) 387 NET_C(R19.2, IC3A.14, IC6A.6) 388 389 #if (HLE_SHIP_VCO) 390 // 391 // This VCO is tricky to simulate, as there is both a frequency aspect 392 // and an envelope aspect. The frequency is relatively straightforward. 393 // Pick up the voltage from the anode of CR4 and map to a frequency 394 // with a polynominal derived from the LLE implementation. 395 // 396 // Here is the mapping I get for CR4.A vs. IC3A.5 (using a -0.1-0.1 threshold): 397 // R2 = 0.99832: HP = (-0.000160539*A0) + 0.0000331984 398 // R2 = 0.99927: HP = (0.00000397232*A0*A0) - (0.000129210*A0) + 0.000083240 399 // R2 = 0.99927: HP = (-0.000000185528*A0*A0*A0) + (0.00000154157*A0*A0) - (0.000138889*A0) + 0.000071961 400 // R2 = 0.99929: HP = (-0.000000215021*A0*A0*A0*A0) - (0.00000393775*A0*A0*A0) - (0.0000213646*A0*A0) - (0.000196307*A0) + 0.0000221998 401 // R2 = 0.99931: HP = (0.000000153378*A0*A0*A0*A0*A0) + (0.00000317059*A0*A0*A0*A0) + (0.0000244935*A0*A0*A0) + (0.000091436*A0*A0) + (0.0000138241*A0) + 0.000169151 402 // 403 VARCLOCK(SHIPCLK, 1, "max(0.000001,min(0.1,(0.00000397232*A0*A0) - (0.000129210*A0) + 0.000083240))") 404 NET_C(SHIPCLK.GND, GND) 405 NET_C(SHIPCLK.VCC, I_V5) 406 NET_C(SHIPCLK.A0, CR4.A) 407 // 408 // The envelope is trickier. When the signal is OFF (3A pin 5 is HIGH), 409 // the envelope tracks the voltage from CR4. When the signal is ON 410 // (3A pin 5 is LOW), the raw clock from SHIPCLK is clamped to -1..1 411 // and scaled down by a constant factor with a small additional 412 // envelope from the CR4 anode voltage. 413 // 414 AFUNC(SHIPENV, 3, "if(A2>2.5, -A1, (0.07-(0.005*A1))*if(A0>2.5,1,-1))") 415 NET_C(SHIPENV.A0, SHIPCLK.Q) 416 NET_C(SHIPENV.A1, CR4.A) 417 NET_C(SHIPENV.A2, IC3A.5) 418 NET_C(SHIPENV.Q, IC3A.2) 419 NET_C(R34.2, R35.1) 420 NET_C(R35.2, CR4.K) 421 NET_C(R36.1, IC5B.6, R38.2, CR4.A) 422 NET_C(GND, R34.1, R36.2, R37.1, R37.2, C9.1, C9.2, CR5.A, CR5.K, IC4B.2, IC4B.3, IC5A.2, IC5A.3) 423 #else 424 NET_C(IC3A.2, C9.2) 425 NET_C(C9.1, IC4B.2, R34.1) 426 NET_C(IC4B.6, R34.2, R35.1) 427 NET_C(IC4B.3, R35.2, CR4.K, CR5.A) 428 NET_C(R36.1, IC5B.6, R38.2, CR4.A) 429 NET_C(R36.2, IC5A.2, R37.1) 430 NET_C(IC5A.3, GND) 431 NET_C(R37.2, IC5A.6, CR5.K) 432 #endif 433 434 NET_C(IC3A.13, R22.1) 435 NET_C(R22.2, GND) 436 ALIAS(OUTPUT, R22.1) 437 438 // 439 // K exit 440 // 441 442 NET_C(I_OUT_7, IC7C.1) 443 NET_C(IC7C.2, R27.1, CR6.A) 444 NET_C(R27.2, I_V5) 445 446 NET_C(IC6C.4, IC7C.11) 447 NET_C(IC7C.10, CR3.A, R26.1) 448 NET_C(R26.2, I_V15, IC5D.14, IC5D.4, R29.2) 449 NET_C(CR3.K, R28.2) 450 NET_C(R28.1, CR6.K, C20.1, R33.1) 451 NET_C(C20.2, GND) 452 NET_C(R33.2, C27.1, R38.1, IC5B.2) 453 NET_C(IC5D.1, R29.1, R31.2) 454 NET_C(IC5D.2, IC5D.6, R31.1, R32.1, C21.1) 455 NET_C(R32.2, C27.2) 456 NET_C(C21.2, GND) 457 NET_C(IC5B.3, GND) 458 NET_C(IC5D.7, GND) 459 460 // pin 5 (OUTPUT) of the 555 timer is not connected; 461 // use this kludge to simulate that 462 RES(RDUMMY, RES_K(100)) 463 NET_C(IC5D.5, RDUMMY.1) 464 NET_C(RDUMMY.2, GND) 465 466 // 467 // Lazer 1 468 // 469 470 NET_C(I_OUT_1, IC6C.5) 471 NET_C(IC6C.6, IC8E.14, IC7C.9) 472 NET_C(IC7C.8, R39.1) 473 NET_C(R39.2, C22.2, CR7.K) 474 NET_C(C22.1, GND) 475 476 #if (HLE_LAZER_VCOS) 477 // 478 // This VCO is very difficult to simulate without cranking the speed up 479 // and killing performance. Even at 1000x frequency, we still get failures 480 // to converge. Here we clip the circuit at the diode CR7 and substitute 481 // a VARCLOCK that directly drives the counter at 7E, skipping the analog 482 // to TTL conversion logic after the VCO. 483 // 484 // Here is the mapping I get for C22.2 vs. IC7E.1 half-period: 485 // 486 // R2 = 0.97399: HP = (0.00000249069*A0) + 0.00000439991 487 // R2 = 0.99638: HP = (0.000000142614*A0*A0) + (0.00000104196*A0) + 0.00000471406 488 // R2 = 0.99932: HP = (0.0000000174880*A0*A0*A0) - (0.000000159311*A0*A0) + (0.00000222025*A0) + 0.00000455815 489 // R2 = 0.99978: HP = (0.00000000229608*A0*A0*A0*A0) - (0.0000000377974*A0*A0*A0) + (0.000000245492*A0*A0) + (0.00000134883*A0) + 0.00000465357 490 // R2 = 0.99985: HP = (0.000000000286259*A0*A0*A0*A0*A0) - (0.00000000650969*A0*A0*A0*A0) + (0.0000000560876*A0*A0*A0) - (0.000000154720*A0*A0) + (0.00000190838*A0) + 0.0000045976 491 // 492 // One additional wrinkle is that when we clip the circuit, the voltage 493 // input to the VCO changes from a curve to linear, so to compute the 494 // mapping below, we had to map the C22.2 value from the clipped circuit 495 // against the frequency. Fortunately, the relationship still held, and 496 // in fact became almost linear. 497 // 498 // Here is the mapping for the clipped C22.2 vs. the original IC7E.1: 499 // R2 = 0.99947: HP = (0.000226684*A0) - 0.0000178774 500 // R2 = 0.99947: HP = (-0.0000111790*A0*A0) + (0.000230333*A0) - 0.0000181329 501 // R2 = 0.99958: HP = (-0.00124814*A0*A0*A0) + (0.000641071*A0*A0) + (0.000124020*A0) - 0.0000127688 502 // R2 = 0.99976: HP = (0.0197918*A0*A0*A0*A0) - (0.0148601*A0*A0*A0) + (0.00399181*A0*A0) - (0.000225308*A0) + 0.000000287255 503 // R2 = 0.99979: HP = (-0.095062*A0*A0*A0*A0*A0) + (0.093556*A0*A0*A0*A0) - (0.0361209*A0*A0*A0) + (0.00677578*A0*A0) - (0.000384926*A0) + 0.00000324102 504 // 505 VARCLOCK(LAZER1CLK, 1, "max(0.000001,min(0.1,(0.000226684*A0) - 0.0000178774))") 506 NET_C(LAZER1CLK.GND, GND) 507 NET_C(LAZER1CLK.VCC, I_V5) 508 NET_C(LAZER1CLK.Q, IC7E.1) 509 NET_C(LAZER1CLK.A0, C22.2) 510 NET_C(GND, R40.1, R40.2, R41.1, R41.2, R42.1, R42.2, R43.1, R43.2, R44.1, R44.2, C23.1, C23.2, CR7.A, CR8.A, CR8.K, IC6C.9, IC6F.2, IC6F.3) 511 #else 512 NET_C(CR7.A, IC6F.3, CR8.K, R43.1) 513 NET_C(CR8.A, GND) 514 NET_C(IC6F.2, C23.2, R40.1) 515 NET_C(C23.1, GND) 516 NET_C(IC6F.6, R40.2, R43.2, R41.1) 517 NET_C(R41.2, R44.2, Q4.B) 518 NET_C(R44.1, GND) 519 NET_C(Q4.E, GND) 520 NET_C(Q4.C, R42.1, IC6C.9) 521 NET_C(R42.2, I_V5) 522 NET_C(IC6C.8, IC7E.1) 523 #endif 524 525 NET_C(IC7E.2, IC7E.12, GND) 526 NET_C(IC7E.3, IC8E.7) 527 NET_C(IC7E.4, IC8E.4) 528 NET_C(IC7E.5, IC8E.6) 529 NET_C(IC7E.6, IC8E.5, IC7E.13) 530 NET_C(IC7E.8, IC8E.15) 531 NET_C(IC7E.10, IC8E.2) 532 NET_C(IC7E.11, IC8E.3) 533 534 NET_C(IC8E.1, GND) 535 NET_C(IC8E.13, GND) 536 NET_C(IC8E.12, R51.1) 537 NET_C(IC8E.11, R52.1) 538 NET_C(IC8E.10, R53.1) 539 NET_C(IC8E.9, R54.1) 540 NET_C(R51.2, R52.2, R53.2, R54.2, R55.1, R56.2) 541 NET_C(R56.1, GND) 542 NET_C(R55.2, C26.1) 543 NET_C(C26.2, IC6A.6) 544 545 // 546 // Lazer 2 547 // 548 549 NET_C(I_OUT_2, IC6C.1) 550 NET_C(IC6C.2, IC5E.14, IC7C.13) 551 NET_C(IC7C.12, R46.1) 552 NET_C(R46.2, C24.2, CR9.K) 553 NET_C(C24.1, GND) 554 555 #if (HLE_LAZER_VCOS) 556 // 557 // This VCO is identical to the one above, just using different components 558 // 559 VARCLOCK(LAZER2CLK, 1, "max(0.000001,min(0.1,(0.000226684*A0) - 0.0000178774))") 560 NET_C(LAZER2CLK.GND, GND) 561 NET_C(LAZER2CLK.VCC, I_V5) 562 NET_C(LAZER2CLK.Q, IC4E.1) 563 NET_C(LAZER2CLK.A0, C24.2) 564 NET_C(GND, R45.1, R45.2, R47.1, R47.2, R48.1, R48.2, R49.1, R49.2, R50.1, R50.2, C25.1, C25.2, CR9.A, CR10.A, CR10.K, IC6C.13, IC6E.2, IC6E.3) 565 #else 566 NET_C(CR9.A, IC6E.3, CR10.K, R48.1) 567 NET_C(CR10.A, GND) 568 NET_C(IC6E.2, C25.2, R45.1) 569 NET_C(C25.1, GND) 570 NET_C(IC6E.6, R45.2, R48.2, R47.1) 571 NET_C(R47.2, R49.2, Q5.B) 572 NET_C(R49.1, GND) 573 NET_C(Q5.E, GND) 574 NET_C(Q5.C, R50.1, IC6C.13) 575 NET_C(R50.2, I_V5) 576 NET_C(IC6C.12, IC4E.1) 577 #endif 578 579 NET_C(IC4E.2, IC4E.12, GND) 580 NET_C(IC4E.3, IC5E.7) 581 NET_C(IC4E.4, IC5E.4) 582 NET_C(IC4E.5, IC5E.6) 583 NET_C(IC4E.6, IC5E.5, IC4E.13) 584 NET_C(IC4E.8, IC5E.15) 585 NET_C(IC4E.10, IC5E.2) 586 NET_C(IC4E.11, IC5E.3) 587 588 NET_C(IC5E.1, GND) 589 NET_C(IC5E.13, GND) 590 NET_C(IC5E.12, R57.1) 591 NET_C(IC5E.11, R58.1) 592 NET_C(IC5E.10, R59.1) 593 NET_C(IC5E.9, R60.1) 594 NET_C(R57.2, R58.2, R59.2, R60.2, R55.1) 595 596 // 597 // Unconnected inputs 598 // 599 600 NET_C(GND, IC5D.8, IC5D.9, IC5D.10, IC5D.12, IC5D.13, IC7C.3, IC7C.5, IC9E.3, IC9E.4, IC9E.5, IC9E.6) 601 602 // 603 // Unconnected outputs 604 // 605 606 HINT(IC4E.9, NC) // Q3 607 #if (HLE_LAZER_VCOS) 608 HINT(IC6C.8, NC) // QD 609 HINT(IC6C.12, NC) // QF 610 #endif 611 HINT(IC7C.4, NC) // QB 612 HINT(IC7C.6, NC) // QC 613 HINT(IC7E.9, NC) // Q3 614 HINT(IC8C.4, NC) // Q1 615 HINT(IC8C.5, NC) // Q2 616 HINT(IC8C.6, NC) // Q3 617 HINT(IC8C.10, NC) // Q4 618 HINT(IC8C.11, NC) // Q5 619 HINT(IC8C.12, NC) // Q6 620 HINT(IC8D.5, NC) // Q2 621 HINT(IC8D.6, NC) // Q3 622 HINT(IC8D.10, NC) // Q4 623 HINT(IC8D.11, NC) // Q5 624 HINT(IC8D.12, NC) // Q6 625 HINT(IC9C.3, NC) // Q0 626 HINT(IC9C.4, NC) // Q1 627 HINT(IC9C.5, NC) // Q2 628 HINT(IC9C.6, NC) // Q3 629 HINT(IC9C.11, NC) // Q5 630 HINT(IC9D.3, NC) // Q0 631 HINT(IC9D.4, NC) // Q1 632 HINT(IC9D.5, NC) // Q2 633 HINT(IC9D.6, NC) // Q3 634 HINT(IC9D.11, NC) // Q5 635 HINT(IC9E.11, NC) // Q3 636 HINT(IC9E.12, NC) // Q2 637 HINT(IC9E.13, NC) // Q1 638 HINT(IC9E.14, NC) // Q0 639 640 NETLIST_END() 641