1 // license:BSD-3-Clause
2 // copyright-holders:Derrick Renaud
3 /*************************************************************************
4 
5     audio\poolshrk.c
6 
7 *************************************************************************/
8 #include "emu.h"
9 #include "includes/poolshrk.h"
10 #include "sound/discrete.h"
11 
12 /************************************************************************/
13 /* poolshrk Sound System Analog emulation                               */
14 /* Jan 2004, Derrick Renaud                                             */
15 /************************************************************************/
16 static const discrete_dac_r1_ladder poolshrk_score_v_dac =
17 {
18 	4,      // size of ladder
19 	{220000, 470000, 1000000, 2200000, 0,0,0,0},    // R57 - R60
20 	5,      // vBias
21 	100000,     // R61
22 	1500000,    // R100
23 	1.e-5       // C13
24 };
25 
26 static const discrete_555_cc_desc poolshrk_score_vco =
27 {
28 	DISC_555_OUT_SQW,
29 	5,      // B+ voltage of 555
30 	DEFAULT_555_VALUES,
31 	0.7     // Q3 junction voltage
32 };
33 
34 static const discrete_mixer_desc poolshrk_mixer =
35 {
36 	DISC_MIXER_IS_RESISTOR,
37 	{330000, 330000, 330000, 82000 + 470},  // R77, R75, R74, R76 + R53
38 	{0},                // No variable resistor nodes
39 	{0},                // No caps
40 	0,                  // No rI
41 	1000,               // R78
42 	0,                  // No filtering
43 	1e-7,               // C21
44 	0,                  // vBias not used for resistor network
45 	1000000
46 };
47 
48 /* Nodes - Inputs */
49 #define POOLSHRK_BUMP_EN    NODE_01
50 #define POOLSHRK_CLICK_EN   NODE_02
51 #define POOLSHRK_SCORE_EN   NODE_03
52 /* Nodes - Sounds */
53 #define POOLSHRK_BUMP_SND       NODE_10
54 #define POOLSHRK_SCRATCH_SND    NODE_11
55 #define POOLSHRK_CLICK_SND      NODE_12
56 #define POOLSHRK_SCORE_SND      NODE_13
57 
58 DISCRETE_SOUND_START(poolshrk_discrete)
59 	/************************************************/
60 	/* Input register mapping for poolshrk          */
61 	/************************************************/
62 	/*                    NODE                   GAIN    OFFSET  INIT */
DISCRETE_INPUT_LOGIC(POOLSHRK_BUMP_EN)63 	DISCRETE_INPUT_LOGIC (POOLSHRK_BUMP_EN)
64 	DISCRETE_INPUTX_LOGIC(POOLSHRK_SCRATCH_SND,  3.4,    0,      0.0)
65 	DISCRETE_INPUT_PULSE (POOLSHRK_CLICK_EN, 0)
66 	DISCRETE_INPUT_PULSE (POOLSHRK_SCORE_EN, 0)
67 	/************************************************/
68 
69 	/************************************************/
70 	/* Scratch is just the trigger sent directly    */
71 	/* to the output.  We take care of it's         */
72 	/* amplitude right in it's DISCRETE_INPUTX.     */
73 	/************************************************/
74 
75 	/************************************************/
76 	/* Bump is just a triggered 128V signal         */
77 	/************************************************/
78 	DISCRETE_SQUAREWFIX(NODE_20, POOLSHRK_BUMP_EN, 15750.0/2.0/128.0, 3.4, 50.0, 3.4/2, 0.0)    // 128V signal 3.4V
79 	DISCRETE_RCFILTER(POOLSHRK_BUMP_SND, NODE_20, 470, 4.7e-6)  // Filtered by R53/C14
80 
81 	/************************************************/
82 	/* Score is a triggered 0-15 count of the       */
83 	/* 64V signal.  This then sets the frequency of */
84 	/* the 555 timer (C9).  The final signal is /2  */
85 	/* to set a 50% duty cycle.                     */
86 	/* NOTE: when first powered up the counter is   */
87 	/* not at TC, so the score is counted once.     */
88 	/* But because C13 is not charged, it limits    */
89 	/* C16 voltage, causing the 555 timer (C9) to   */
90 	/* not oscillate.                               */
91 	/* This should also happen on the original PCB. */
92 	/************************************************/
93 	DISCRETE_COUNTER(NODE_30,               // Counter E8 (9316 is a 74161)
94 						NODE_31,                // Clock enabled by F8, pin 13
95 						POOLSHRK_SCORE_EN,      // Reset/triggered by score
96 						15750.0/2.0/64.0,       // 64V signal
97 						0, 15, 1,               // 4 bit binary up counter
98 						0, DISC_CLK_IS_FREQ)    // Cleared to 0
99 	DISCRETE_TRANSFORM2(NODE_31, NODE_30, 15, "01=!")   // TC output of E8, pin 15. (inverted)
100 
101 	DISCRETE_DAC_R1(NODE_32,    // Base of Q3
102 			NODE_30,    // IC E8, Q0-Q3
103 			3.4,        // TTL ON level = 3.4V
104 			&poolshrk_score_v_dac)
105 	DISCRETE_555_CC(NODE_33,    // IC C9, pin 3
106 			NODE_31,    // reset by IC C9, pin 4
107 			NODE_32,    // vIn from R-ladder
108 			10000,      // R73
109 			1.e-8,      // C16
110 			0, 0, 0,    // No rBias, rGnd or rDischarge
111 			&poolshrk_score_vco)
112 	DISCRETE_COUNTER(NODE_34, 1, 0, // IC D9, pin 9
113 			NODE_33,                // from IC C9, pin 3
114 			0, 1, 1, 0, DISC_CLK_ON_R_EDGE) // /2 counter on rising edge
115 	DISCRETE_GAIN(POOLSHRK_SCORE_SND, NODE_34, 3.4)
116 
117 
118 	/*
119 	 * The TC output of E8 is sent to a one shot made up by
120 	 * C12/R62.  Clamped by CR16. Shaped to square by L9.
121 	 * This causes click to be triggered at the end of score.
122 	 */
123 	DISCRETE_ONESHOT(NODE_39,   // buffer L9 pin 12
124 				NODE_31,    // from TC pin 15 of E8
125 				1, 0,       // output 0/1 for the minimum sample period
126 				DISC_ONESHOT_FEDGE | DISC_ONESHOT_NORETRIG | DISC_OUT_ACTIVE_HIGH)  // Real circuit is rising edge but we will take into account that we are using an inverted signal in the code
127 
128 	/************************************************/
129 	/* Click is a triggered 0-15 count of the       */
130 	/* 2V signal.  It is also triggered at the end  */
131 	/* of the score sound.                          */
132 	/* NOTE: when first powered up the counter is   */
133 	/* not at TC, so the click is counted once.     */
134 	/* This should also happen on the original PCB. */
135 	/************************************************/
136 	DISCRETE_LOGIC_OR(NODE_40, POOLSHRK_CLICK_EN , NODE_39) // gate K9, pin 11
137 	DISCRETE_COUNTER(NODE_41,               // Counter J9 (9316 is a 74161)
138 						NODE_42,                // Clock enabled by F8, pin 1
139 						NODE_40,                // Reset/triggered by K9, pin 11
140 						15750.0/2.0/2.0,        // 2V signal
141 						0, 15, 1,               // 4 bit binary up counter
142 						0, DISC_CLK_IS_FREQ)    // Cleared to 0
143 	DISCRETE_TRANSFORM2(NODE_42, NODE_41, 15, "01=!")   // TC output of J9, pin 15. Modified to function as F8 clock enable
144 	DISCRETE_TRANSFORM3(POOLSHRK_CLICK_SND, NODE_41, 1, 3.4, "01&2*")   // Q0 output of J9, pin 14.  Set to proper amplitude
145 
146 	/************************************************/
147 	/* Final mix and output.                        */
148 	/************************************************/
149 	DISCRETE_MIXER4(NODE_90, 1, POOLSHRK_SCRATCH_SND, POOLSHRK_CLICK_SND, POOLSHRK_SCORE_SND, POOLSHRK_BUMP_SND, &poolshrk_mixer)
150 	DISCRETE_OUTPUT(NODE_90, 1)
151 DISCRETE_SOUND_END
152 
153 
154 /*************************************
155  *
156  *  Write handlers
157  *
158  *************************************/
159 
160 void poolshrk_state::scratch_sound_w(offs_t offset, uint8_t data)
161 {
162 	m_discrete->write(POOLSHRK_SCRATCH_SND, offset & 1);
163 }
164 
score_sound_w(uint8_t data)165 void poolshrk_state::score_sound_w(uint8_t data)
166 {
167 	m_discrete->write(POOLSHRK_SCORE_EN, 1); /* this will trigger the sound code for 1 sample */
168 }
169 
click_sound_w(uint8_t data)170 void poolshrk_state::click_sound_w(uint8_t data)
171 {
172 	m_discrete->write(POOLSHRK_CLICK_EN, 1); /* this will trigger the sound code for 1 sample */
173 }
174 
bump_sound_w(offs_t offset,uint8_t data)175 void poolshrk_state::bump_sound_w(offs_t offset, uint8_t data)
176 {
177 	m_discrete->write(POOLSHRK_BUMP_EN, offset & 1);
178 }
179