1 // license:BSD-3-Clause
2 // copyright-holders:Angelo Salese
3 /***************************************************************************
4
5 Last Bank (c) 1994 Excellent System
6
7 driver by Angelo Salese
8
9 Uses a TC0091LVC, a variant of the one used on Taito L HW
10
11 Undumped games on similar hardware (ES-9402 or ES-9410):
12 * Gold Strike
13 * Lucky Pierrot / Wonder Circus
14 * Miracle Seven - Heaven's Gate
15 * Miracle Seven - Heaven's Gate Turbo
16 * Ukiyo Box
17
18 ***************************************************************************/
19
20 #include "emu.h"
21 #include "cpu/z80/z80.h"
22 #include "sound/2203intf.h"
23 #include "sound/es8712.h"
24 #include "sound/okim6295.h"
25 #include "machine/gen_latch.h"
26 #include "machine/nvram.h"
27 #include "machine/tc009xlvc.h"
28 #include "machine/timer.h"
29 #include "screen.h"
30 #include "speaker.h"
31
32
33 #define MASTER_CLOCK XTAL(14'318'181)
34
35 class lastbank_state : public driver_device
36 {
37 public:
lastbank_state(const machine_config & mconfig,device_type type,const char * tag)38 lastbank_state(const machine_config &mconfig, device_type type, const char *tag)
39 : driver_device(mconfig, type, tag)
40 , m_maincpu(*this, "maincpu")
41 , m_vdp(*this, "tc0091lvc")
42 , m_oki(*this, "oki")
43 , m_essnd(*this, "essnd")
44 { }
45
46 void lastbank(machine_config &config);
47
48 DECLARE_CUSTOM_INPUT_MEMBER(sound_status_r);
49
50 private:
51 required_device<cpu_device> m_maincpu;
52 required_device<tc0091lvc_device> m_vdp;
53 required_device<okim6295_device> m_oki;
54 required_device<es8712_device> m_essnd;
55
56 virtual void machine_start() override;
57 DECLARE_WRITE_LINE_MEMBER(screen_vblank);
58
59 uint8_t m_mux_data;
60 uint8_t m_sound_flags;
61
62 void output_w(offs_t offset, uint8_t data);
63
64 uint8_t mux_0_r();
65 void mux_w(uint8_t data);
66 void sound_flags_w(uint8_t data);
67
68 TIMER_DEVICE_CALLBACK_MEMBER(irq_scanline);
69 void lastbank_audio_io(address_map &map);
70 void lastbank_audio_map(address_map &map);
71 void lastbank_map(address_map &map);
72 void tc0091lvc_map(address_map &map);
73 };
74
machine_start()75 void lastbank_state::machine_start()
76 {
77 save_item(NAME(m_mux_data));
78 save_item(NAME(m_sound_flags));
79 }
80
WRITE_LINE_MEMBER(lastbank_state::screen_vblank)81 WRITE_LINE_MEMBER(lastbank_state::screen_vblank)
82 {
83 if (state)
84 {
85 m_vdp->screen_eof();
86 }
87 }
88
89
mux_0_r()90 uint8_t lastbank_state::mux_0_r()
91 {
92 const char *const keynames[2][5] = {
93 {"P1_KEY0", "P1_KEY1", "P1_KEY2", "P1_KEY3", "P1_KEY4"},
94 {"P2_KEY0", "P2_KEY1", "P2_KEY2", "P2_KEY3", "P2_KEY4"} };
95 uint8_t res;
96 int i;
97
98 res = 0xff;
99
100 for(i=0;i<5;i++)
101 {
102 if(m_mux_data & 1 << i)
103 res = ioport(keynames[0][i])->read();
104 }
105
106 return res;
107 }
108
output_w(offs_t offset,uint8_t data)109 void lastbank_state::output_w(offs_t offset, uint8_t data)
110 {
111 switch (offset)
112 {
113 case 0:
114 case 1:
115 //logerror("%s: Writing %02x to A80%x\n", machine().describe_context(), data, offset);
116 break;
117
118 case 2:
119 machine().bookkeeping().coin_counter_w(0, BIT(data, 0)); // coin 1
120 machine().bookkeeping().coin_counter_w(1, BIT(data, 2)); // coin 2
121 machine().bookkeeping().coin_counter_w(2, BIT(data, 3)); // coin 3
122 machine().bookkeeping().coin_counter_w(3, BIT(data, 1)); // key in
123 break;
124 }
125 }
126
mux_w(uint8_t data)127 void lastbank_state::mux_w(uint8_t data)
128 {
129 m_mux_data = data;
130 }
131
sound_flags_w(uint8_t data)132 void lastbank_state::sound_flags_w(uint8_t data)
133 {
134 m_sound_flags = data;
135 if (!BIT(data, 4))
136 m_essnd->reset();
137 if (!BIT(data, 5))
138 m_oki->reset();
139 }
140
CUSTOM_INPUT_MEMBER(lastbank_state::sound_status_r)141 CUSTOM_INPUT_MEMBER(lastbank_state::sound_status_r)
142 {
143 return BIT(m_sound_flags, 0) << 1 | BIT(m_sound_flags, 1);
144 }
145
tc0091lvc_map(address_map & map)146 void lastbank_state::tc0091lvc_map(address_map &map)
147 {
148 map(0x0000, 0xfdff).m(m_vdp, FUNC(tc0091lvc_device::cpu_map));
149
150 map(0x8000, 0x9fff).ram().share("nvram");
151
152 map(0xfe00, 0xfeff).rw(m_vdp, FUNC(tc0091lvc_device::vregs_r), FUNC(tc0091lvc_device::vregs_w));
153 map(0xff00, 0xff02).rw(m_vdp, FUNC(tc0091lvc_device::irq_vector_r), FUNC(tc0091lvc_device::irq_vector_w));
154 map(0xff03, 0xff03).rw(m_vdp, FUNC(tc0091lvc_device::irq_enable_r), FUNC(tc0091lvc_device::irq_enable_w));
155 map(0xff04, 0xff07).rw(m_vdp, FUNC(tc0091lvc_device::ram_bank_r), FUNC(tc0091lvc_device::ram_bank_w));
156 map(0xff08, 0xff08).rw(m_vdp, FUNC(tc0091lvc_device::rom_bank_r), FUNC(tc0091lvc_device::rom_bank_w));
157 }
158
lastbank_map(address_map & map)159 void lastbank_state::lastbank_map(address_map &map)
160 {
161 tc0091lvc_map(map);
162 map(0xa000, 0xa00d).noprw(); // MSM62X42B or equivalent probably read from here
163 map(0xa800, 0xa800).portr("COINS");
164 map(0xa800, 0xa802).w(FUNC(lastbank_state::output_w));
165 map(0xa803, 0xa803).w(FUNC(lastbank_state::mux_w)); // mux for $a808 / $a80c
166 map(0xa804, 0xa804).portr("SPECIAL");
167 map(0xa805, 0xa805).w("soundlatch1", FUNC(generic_latch_8_device::write));
168 map(0xa806, 0xa806).w("soundlatch2", FUNC(generic_latch_8_device::write));
169 map(0xa807, 0xa807).nopw(); // hopper?
170 map(0xa808, 0xa808).r(FUNC(lastbank_state::mux_0_r));
171 map(0xa80c, 0xa80c).r(FUNC(lastbank_state::mux_0_r));
172 map(0xa81c, 0xa81c).portr("DSW0");
173 map(0xa81d, 0xa81d).portr("DSW1");
174 map(0xa81e, 0xa81e).portr("DSW2");
175 map(0xa81f, 0xa81f).portr("DSW3");
176 }
177
lastbank_audio_map(address_map & map)178 void lastbank_state::lastbank_audio_map(address_map &map)
179 {
180 map(0x0000, 0xbfff).rom();
181 map(0xc000, 0xdfff).ram();
182 map(0xe000, 0xe7ff).ram();
183 }
184
lastbank_audio_io(address_map & map)185 void lastbank_state::lastbank_audio_io(address_map &map)
186 {
187 map.global_mask(0xff);
188 map(0x00, 0x06).rw(m_essnd, FUNC(es8712_device::read), FUNC(es8712_device::write));
189 map(0x40, 0x40).rw(m_oki, FUNC(okim6295_device::read), FUNC(okim6295_device::write));
190 map(0x80, 0x80).w(FUNC(lastbank_state::sound_flags_w));
191 map(0x80, 0x80).r("soundlatch1", FUNC(generic_latch_8_device::read));
192 map(0xc0, 0xc0).r("soundlatch2", FUNC(generic_latch_8_device::read));
193 }
194
195 static INPUT_PORTS_START( lastbank )
196 PORT_START("COINS")
PORT_CODE(KEYCODE_M)197 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_CODE(KEYCODE_M)
198 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT )
199 PORT_SERVICE_NO_TOGGLE( 0x04, IP_ACTIVE_LOW )
200 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK )
201 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN3 )
202 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
203 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN ) PORT_CODE(KEYCODE_N)
204 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
205
206 PORT_START("SPECIAL")
207 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MEMORY_RESET )
208 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE )
209 PORT_DIPNAME( 0x04, 0x04, "Hopper Count" )
210 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
211 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
212 PORT_DIPNAME( 0x08, 0x08, "Hopper Empty" )
213 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
214 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
215 PORT_BIT( 0x30, IP_ACTIVE_LOW, IPT_UNKNOWN )
216 PORT_BIT( 0xc0, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(lastbank_state, sound_status_r)
217
218 PORT_START("P1_KEY0")
219 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("5-6") PORT_CODE(KEYCODE_B)
220 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("3-4") PORT_CODE(KEYCODE_G)
221 PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_UNKNOWN )
222 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("4-6") PORT_CODE(KEYCODE_V)
223 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("4-5") PORT_CODE(KEYCODE_C)
224 PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNKNOWN )
225
226 PORT_START("P1_KEY1")
227 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
228 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_LOW ) PORT_NAME("Small") PORT_CODE(KEYCODE_Y)
229 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("1-4") PORT_CODE(KEYCODE_E)
230 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
231 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("FF") PORT_CODE(KEYCODE_MINUS)
232 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("2-4") PORT_CODE(KEYCODE_S)
233 PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNKNOWN )
234
235 PORT_START("P1_KEY2")
236 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_HIGH ) PORT_NAME("Big") PORT_CODE(KEYCODE_U)
237 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Cancel") PORT_CODE(KEYCODE_SPACE)
238 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("1-2") PORT_CODE(KEYCODE_Q)
239 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("3-5") PORT_CODE(KEYCODE_Z)
240 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("2-6") PORT_CODE(KEYCODE_F)
241 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("1-6") PORT_CODE(KEYCODE_T)
242 PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNKNOWN )
243
244 PORT_START("P1_KEY3")
245 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
246 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP )
247 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("1-5") PORT_CODE(KEYCODE_R)
248 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
249 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Payout 2") PORT_CODE(KEYCODE_O)
250 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("2-5") PORT_CODE(KEYCODE_D)
251 PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNKNOWN )
252
253 PORT_START("P1_KEY4")
254 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE )
255 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) PORT_NAME("Auto Bet") PORT_CODE(KEYCODE_2)
256 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("1-3") PORT_CODE(KEYCODE_W)
257 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("3-6") PORT_CODE(KEYCODE_X)
258 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
259 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("2-3") PORT_CODE(KEYCODE_A)
260 PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNKNOWN )
261
262 PORT_START("DSW0")
263 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:1")
264 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
265 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
266 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:2")
267 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
268 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
269 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:3")
270 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
271 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
272 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:4")
273 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
274 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
275 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:5")
276 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
277 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
278 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:6")
279 PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
280 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
281 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:7")
282 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
283 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
284 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:8")
285 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
286 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
287
288 PORT_START("DSW1")
289 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW2:1")
290 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
291 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
292 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW2:2")
293 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
294 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
295 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW2:3")
296 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
297 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
298 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW2:4")
299 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
300 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
301 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW2:5")
302 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
303 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
304 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW2:6")
305 PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
306 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
307 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("DSW2:7")
308 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
309 PORT_DIPSETTING( 0x40, DEF_STR( On ) )
310 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW2:8")
311 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
312 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
313
314 PORT_START("DSW2")
315 PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("DSW3:1,2,3,4")
316 PORT_DIPSETTING( 0x07, "1 Coin /100 Credits" )
317 PORT_DIPSETTING( 0x08, "1 Coin /50 Credits" )
318 PORT_DIPSETTING( 0x09, "1 Coin /25 Credits" )
319 PORT_DIPSETTING( 0x0a, "1 Coin /20 Credits" )
320 PORT_DIPSETTING( 0x0b, "1 Coin /10 Credits" )
321 PORT_DIPSETTING( 0x0c, DEF_STR( 1C_5C ) )
322 PORT_DIPSETTING( 0x0d, DEF_STR( 1C_3C ) )
323 PORT_DIPSETTING( 0x01, "5 Coins /2 Credits" )
324 PORT_DIPSETTING( 0x0e, DEF_STR( 1C_2C ) )
325 PORT_DIPSETTING( 0x05, DEF_STR( 2C_3C ) )
326 PORT_DIPSETTING( 0x0f, DEF_STR( 1C_1C ) )
327 PORT_DIPSETTING( 0x06, DEF_STR( 2C_1C ) )
328 PORT_DIPSETTING( 0x04, DEF_STR( 3C_1C ) )
329 PORT_DIPSETTING( 0x03, DEF_STR( 4C_1C ) )
330 PORT_DIPSETTING( 0x02, DEF_STR( 5C_1C ) )
331 PORT_DIPSETTING( 0x00, "10 Coins /1 Credit" )
332 PORT_DIPNAME( 0xf0, 0xf0, "Coin C" ) PORT_DIPLOCATION("DSW3:5,6,7,8")
333 PORT_DIPSETTING( 0x70, "1 Coin /100 Credits" )
334 PORT_DIPSETTING( 0x80, "1 Coin /50 Credits" )
335 PORT_DIPSETTING( 0x90, "1 Coin /25 Credits" )
336 PORT_DIPSETTING( 0xa0, "1 Coin /20 Credits" )
337 PORT_DIPSETTING( 0xb0, "1 Coin /10 Credits" )
338 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_5C ) )
339 PORT_DIPSETTING( 0xd0, DEF_STR( 1C_3C ) )
340 PORT_DIPSETTING( 0x10, "5 Coins /2 Credits" )
341 PORT_DIPSETTING( 0xe0, DEF_STR( 1C_2C ) )
342 PORT_DIPSETTING( 0x50, DEF_STR( 2C_3C ) )
343 PORT_DIPSETTING( 0xf0, DEF_STR( 1C_1C ) )
344 PORT_DIPSETTING( 0x60, DEF_STR( 2C_1C ) )
345 PORT_DIPSETTING( 0x40, DEF_STR( 3C_1C ) )
346 PORT_DIPSETTING( 0x30, DEF_STR( 4C_1C ) )
347 PORT_DIPSETTING( 0x20, DEF_STR( 5C_1C ) )
348 PORT_DIPSETTING( 0x00, "10 Coins /1 Credit" )
349
350 PORT_START("DSW3")
351 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW4:1")
352 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
353 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
354 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW4:2")
355 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
356 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
357 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW4:3")
358 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
359 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
360 PORT_DIPNAME( 0x38, 0x38, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("DSW4:4,5,6")
361 PORT_DIPSETTING( 0x30, "1 Coin /50 Credits" )
362 PORT_DIPSETTING( 0x38, DEF_STR( 1C_1C ) )
363 PORT_DIPSETTING( 0x28, DEF_STR( 2C_1C ) )
364 PORT_DIPSETTING( 0x20, DEF_STR( 3C_1C ) )
365 PORT_DIPSETTING( 0x18, DEF_STR( 5C_1C ) )
366 PORT_DIPSETTING( 0x10, DEF_STR( 6C_1C ) )
367 PORT_DIPSETTING( 0x08, "9 Coins /1 Credit" )
368 PORT_DIPSETTING( 0x00, "10 Coins /1 Credit" )
369 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW4:7")
370 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
371 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
372 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW4:8")
373 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
374 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
375 INPUT_PORTS_END
376
377 TIMER_DEVICE_CALLBACK_MEMBER(lastbank_state::irq_scanline)
378 {
379 int scanline = param;
380
381 if (scanline == 240 && (m_vdp->irq_enable() & 4))
382 {
383 m_maincpu->set_input_line_and_vector(0, HOLD_LINE, m_vdp->irq_vector(2)); // TC0091LVC
384 }
385
386 if (scanline == 0 && (m_vdp->irq_enable() & 2))
387 {
388 m_maincpu->set_input_line_and_vector(0, HOLD_LINE, m_vdp->irq_vector(1)); // TC0091LVC
389 }
390 }
391
lastbank(machine_config & config)392 void lastbank_state::lastbank(machine_config &config)
393 {
394 /* basic machine hardware */
395 Z80(config, m_maincpu, MASTER_CLOCK/4); //!!! TC0091LVC !!!
396 m_maincpu->set_addrmap(AS_PROGRAM, &lastbank_state::lastbank_map);
397 TIMER(config, "scantimer").configure_scanline(FUNC(lastbank_state::irq_scanline), "screen", 0, 1);
398
399 NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
400
401 z80_device &audiocpu(Z80(config, "audiocpu", MASTER_CLOCK/4));
402 audiocpu.set_addrmap(AS_PROGRAM, &lastbank_state::lastbank_audio_map);
403 audiocpu.set_addrmap(AS_IO, &lastbank_state::lastbank_audio_io);
404 // yes, we have no interrupts
405
406 config.set_perfect_quantum(m_maincpu);
407
408 //MCFG_MACHINE_START_OVERRIDE(lastbank_state,lastbank)
409 //MCFG_MACHINE_RESET_OVERRIDE(lastbank_state,lastbank)
410
411 /* video hardware */
412 screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
413 screen.set_refresh_hz(60);
414 screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500));
415 screen.set_size(64*8, 32*8);
416 screen.set_visarea(0*8, 40*8-1, 2*8, 30*8-1);
417 screen.set_screen_update("tc0091lvc", FUNC(tc0091lvc_device::screen_update));
418 screen.screen_vblank().set(FUNC(lastbank_state::screen_vblank));
419 screen.set_palette("tc0091lvc:palette");
420
421 TC0091LVC(config, m_vdp, 0);
422 m_vdp->set_tilemap_xoffs(0,192); // TODO: correct?
423
424 // MCFG_VIDEO_START_OVERRIDE(lastbank_state,lastbank)
425
426 /* sound hardware */
427 SPEAKER(config, "mono").front_center();
428
429 GENERIC_LATCH_8(config, "soundlatch1");
430 GENERIC_LATCH_8(config, "soundlatch2");
431
432 OKIM6295(config, m_oki, 1000000, okim6295_device::PIN7_HIGH).add_route(ALL_OUTPUTS, "mono", 0.75);
433
434 ES8712(config, m_essnd, 0);
435 m_essnd->msm_write_handler().set("msm", FUNC(msm6585_device::data_w));
436 m_essnd->set_msm_tag("msm");
437
438 msm6585_device &msm(MSM6585(config, "msm", 640_kHz_XTAL)); /* Not verified, It's actually MSM6585? */
439 msm.vck_legacy_callback().set("essnd", FUNC(es8712_device::msm_int));
440 msm.set_prescaler_selector(msm6585_device::S40); /* Not verified */
441 msm.add_route(ALL_OUTPUTS, "mono", 0.50);
442
443 // A RTC-62421 is present on the Last Bank PCB. However, the code
444 // that tries to read from it is broken and nonfunctional. The RTC
445 // is also absent from some other games on the same hardware.
446 }
447
448 /***************************************************************************
449
450 Game driver(s)
451
452 ***************************************************************************/
453
454 ROM_START( lastbank )
455 ROM_REGION( 0x40000, "tc0091lvc", 0 )
456 ROM_LOAD( "3.u9", 0x00000, 0x40000, CRC(f430e1f0) SHA1(dd5b697f5c2250d98911f4c7d3e7d4cc16b0b40f) )
457
458 ROM_REGION( 0x10000, "audiocpu", 0 )
459 ROM_LOAD( "8.u48", 0x00000, 0x10000, CRC(3a7bfe10) SHA1(7dc543e11d3c0b9872fcc622339ade25383a1eb3) )
460
461 ROM_REGION( 0x120000, "tc0091lvc:gfx", 0 )
462 ROM_LOAD( "u11", 0x000000, 0x100000, CRC(2588d82d) SHA1(426f6821862d54123e53410e2776586ddf6b21e7) )
463 ROM_LOAD( "5.u10", 0x100000, 0x020000, CRC(51f3c5a7) SHA1(73d4c8817fe96d75be32c43e816e93c52b5d2b27) )
464
465 ROM_REGION( 0x40000, "oki", 0 )
466 ROM_LOAD( "6.u55", 0x00000, 0x40000, CRC(9e78e234) SHA1(031f93e4bc338d0257fa673da7ce656bb1cda5fb) )
467
468 ROM_REGION( 0x80000, "essnd", 0 ) /* Samples */
469 ROM_LOAD( "7.u60", 0x00000, 0x80000, CRC(41be7146) SHA1(00f1c0d5809efccf888e27518a2a5876c4b633d8) )
470 ROM_END
471
472 GAME( 1994, lastbank, 0, lastbank, lastbank, lastbank_state, empty_init, ROT0, "Excellent System", "Last Bank (v1.16)", 0 )
473