1 // license:BSD-3-Clause
2 // copyright-holders:Nathan Woods, Raphael Nabet, R. Belmont
3 /****************************************************************************
4
5 drivers/mac.c
6 Macintosh family emulation
7
8 Nate Woods, Raphael Nabet, R. Belmont
9
10 0x000000 - 0x3fffff RAM/ROM (switches based on overlay)
11 0x400000 - 0x4fffff ROM
12 0x580000 - 0x5fffff 5380 NCR/Symbios SCSI peripherals chip (Mac Plus only)
13 0x600000 - 0x6fffff RAM
14 0x800000 - 0x9fffff Zilog 8530 SCC (Serial Control Chip) Read
15 0xa00000 - 0xbfffff Zilog 8530 SCC (Serial Control Chip) Write
16 0xc00000 - 0xdfffff IWM (Integrated Woz Machine; floppy)
17 0xe80000 - 0xefffff Rockwell 6522 VIA
18 0xf00000 - 0xffffef ??? (the ROM appears to be accessing here)
19 0xfffff0 - 0xffffff Auto Vector
20
21 Interrupts:
22 M68K:
23 Level 1 from VIA
24 Level 2 from SCC
25 Level 4 : Interrupt switch (not implemented)
26
27 VIA:
28 CA1 from VBLANK
29 CA2 from 1 Hz clock (RTC)
30 CB1 from Keyboard Clock
31 CB2 from Keyboard Data
32 SR from Keyboard Data Ready
33
34 SCC:
35 PB_EXT from mouse Y circuitry
36 PA_EXT from mouse X circuitry
37
38 NOTES:
39 - pmac6100: with recent PPC fixes now gets into the 68000 emulator and executes part of the 680x0 startup code.
40 'g 6802c73c' to get to the interesting part (wait past the boot chime). PPC register r24 is the 68000 PC.
41 when the PC hits GetCPUID, the move.l (a2), d0 at PC = 0x10000 will cause an MMU fault (jump to 0xFFF00300). why?
42 a2 = 0x5ffffffc (the CPU ID register). MMU is unable to resolve this; defect in the MMU emulation probable.
43
44 TODO:
45 - SE and Classic to own driver
46 - Portable and PowerBook 100 to own driver
47 - Remaining PowerBooks to own driver
48 - Quadra 700 to own driver
49 - V8 and friends to own driver
50 - LC3 / LC520 / IIvx / IIvi to own driver
51
52 ****************************************************************************/
53
54
55 #include "emu.h"
56 #include "includes/mac.h"
57
58 #include "cpu/m68000/m68000.h"
59 #include "cpu/powerpc/ppc.h"
60 #include "cpu/m6805/m6805.h"
61 #include "machine/applefdc.h"
62 #include "machine/swim.h"
63 #include "machine/sonydriv.h"
64 #include "formats/ap_dsk35.h"
65 #include "bus/scsi/scsi.h"
66 #include "bus/scsi/scsihd.h"
67 #include "bus/scsi/scsicd.h"
68
69 // NuBus and 030/040 PDS cards
70 #include "bus/nubus/nubus_48gc.h"
71 #include "bus/nubus/nubus_cb264.h"
72 #include "bus/nubus/nubus_vikbw.h"
73 #include "bus/nubus/nubus_specpdq.h"
74 #include "bus/nubus/nubus_m2hires.h"
75 #include "bus/nubus/nubus_spec8.h"
76 #include "bus/nubus/nubus_radiustpd.h"
77 #include "bus/nubus/nubus_wsportrait.h"
78 #include "bus/nubus/nubus_asntmc3b.h"
79 #include "bus/nubus/nubus_image.h"
80 #include "bus/nubus/nubus_m2video.h"
81 #include "bus/nubus/bootbug.h"
82 #include "bus/nubus/quadralink.h"
83 #include "bus/nubus/laserview.h"
84 #include "bus/nubus/pds30_cb264.h"
85 #include "bus/nubus/pds30_procolor816.h"
86 #include "bus/nubus/pds30_sigmalview.h"
87 #include "bus/nubus/pds30_30hr.h"
88 #include "bus/nubus/pds30_mc30.h"
89
90 #include "machine/macadb.h"
91 #include "softlist.h"
92 #include "speaker.h"
93 #include "mac.lh"
94
95 #define C7M (7833600)
96 #define C15M (C7M*2)
97 #define C32M (C15M*2)
98
99 // do this here - screen_update is called each scanline when stepping in the
100 // debugger, which means you can't escape the VIA2 IRQ handler
101 //
102 // RBV/MDU bits in IER/IFR:
103 //
104 // CA1: any slot interrupt = 0x02
105 // CA2: SCSI interrupt = 0x01
106 // CB1: ASC interrupt = 0x10
107
WRITE_LINE_MEMBER(mac_state::mac_rbv_vbl)108 WRITE_LINE_MEMBER(mac_state::mac_rbv_vbl)
109 {
110 if (!state)
111 return;
112
113 m_rbv_regs[2] &= ~0x40; // set vblank signal
114 m_rbv_vbltime = 10;
115
116 // printf("RBV: raising VBL!\n");
117
118 if (m_rbv_regs[0x12] & 0x40)
119 {
120 rbv_recalc_irqs();
121 }
122 }
123
rbv_ramdac_r()124 uint32_t mac_state::rbv_ramdac_r()
125 {
126 return 0;
127 }
128
rbv_ramdac_w(offs_t offset,uint32_t data)129 void mac_state::rbv_ramdac_w(offs_t offset, uint32_t data)
130 {
131 if (!offset)
132 {
133 m_rbv_clutoffs = data>>24;
134 m_rbv_count = 0;
135 }
136 else
137 {
138 m_rbv_colors[m_rbv_count++] = data>>24;
139
140 if (m_rbv_count == 3)
141 {
142 // for portrait display, force monochrome by using the blue channel
143 if (m_model != MODEL_MAC_CLASSIC_II)
144 {
145 // Color Classic has no MONTYPE so the default gets us 512x384, which is right
146 if (m_montype.read_safe(2) == 1)
147 {
148 m_palette->set_pen_color(m_rbv_clutoffs, rgb_t(m_rbv_colors[2], m_rbv_colors[2], m_rbv_colors[2]));
149 m_rbv_palette[m_rbv_clutoffs] = rgb_t(m_rbv_colors[2], m_rbv_colors[2], m_rbv_colors[2]);
150 m_rbv_clutoffs++;
151 m_rbv_count = 0;
152 }
153 else
154 {
155 m_palette->set_pen_color(m_rbv_clutoffs, rgb_t(m_rbv_colors[0], m_rbv_colors[1], m_rbv_colors[2]));
156 m_rbv_palette[m_rbv_clutoffs] = rgb_t(m_rbv_colors[0], m_rbv_colors[1], m_rbv_colors[2]);
157 m_rbv_clutoffs++;
158 m_rbv_count = 0;
159 }
160 }
161 }
162 }
163 }
164
ariel_ramdac_w(offs_t offset,uint32_t data,uint32_t mem_mask)165 void mac_state::ariel_ramdac_w(offs_t offset, uint32_t data, uint32_t mem_mask) // this is for the "Ariel" style RAMDAC
166 {
167 if (mem_mask == 0xff000000)
168 {
169 m_rbv_clutoffs = data>>24;
170 m_rbv_count = 0;
171 }
172 else if (mem_mask == 0x00ff0000)
173 {
174 m_rbv_colors[m_rbv_count++] = (data>>16) & 0xff;
175
176 if (m_rbv_count == 3)
177 {
178 // for portrait display, force monochrome by using the blue channel
179 if (m_model != MODEL_MAC_CLASSIC_II)
180 {
181 // Color Classic has no MONTYPE so the default gets us 512x384, which is right
182 if (m_montype.read_safe(2) == 1)
183 {
184 m_palette->set_pen_color(m_rbv_clutoffs, rgb_t(m_rbv_colors[2], m_rbv_colors[2], m_rbv_colors[2]));
185 m_rbv_palette[m_rbv_clutoffs] = rgb_t(m_rbv_colors[2], m_rbv_colors[2], m_rbv_colors[2]);
186 m_rbv_clutoffs = (m_rbv_clutoffs + 1) & 0xff;
187 m_rbv_count = 0;
188 }
189 else
190 {
191 m_palette->set_pen_color(m_rbv_clutoffs, rgb_t(m_rbv_colors[0], m_rbv_colors[1], m_rbv_colors[2]));
192 m_rbv_palette[m_rbv_clutoffs] = rgb_t(m_rbv_colors[0], m_rbv_colors[1], m_rbv_colors[2]);
193 m_rbv_clutoffs = (m_rbv_clutoffs + 1) & 0xff;
194 m_rbv_count = 0;
195 }
196 }
197 }
198 }
199 else if (mem_mask == 0x0000ff00)
200 {
201 // config reg
202 // printf("Ariel: %02x to config\n", (data>>8)&0xff);
203 }
204 else // color key reg
205 {
206 }
207 }
208
mac_sonora_vctl_r(offs_t offset)209 uint8_t mac_state::mac_sonora_vctl_r(offs_t offset)
210 {
211 if (offset == 2)
212 {
213 // printf("Sonora: read monitor ID at PC=%x\n", m_maincpu->pc());
214 return (m_montype.read_safe(6)<<4);
215 }
216
217 return m_sonora_vctl[offset];
218 }
219
mac_sonora_vctl_w(offs_t offset,uint8_t data)220 void mac_state::mac_sonora_vctl_w(offs_t offset, uint8_t data)
221 {
222 // printf("Sonora: %02x to vctl %x\n", data, offset);
223 m_sonora_vctl[offset] = data;
224 }
225
rbv_recalc_irqs()226 void mac_state::rbv_recalc_irqs()
227 {
228 // check slot interrupts and bubble them down to IFR
229 uint8_t slot_irqs = (~m_rbv_regs[2]) & 0x78;
230 slot_irqs &= (m_rbv_regs[0x12] & 0x78);
231
232 if (slot_irqs)
233 {
234 m_rbv_regs[3] |= 2; // any slot
235 }
236 else // no slot irqs, clear the pending bit
237 {
238 m_rbv_regs[3] &= ~2; // any slot
239 }
240
241 uint8_t ifr = (m_rbv_regs[3] & m_rbv_ier) & 0x1b; //m_rbv_regs[0x13]);
242
243 // printf("ifr = %02x (reg3 %02x reg13 %02x)\n", ifr, m_rbv_regs[3], m_rbv_regs[0x13]);
244 if (ifr != 0)
245 {
246 m_rbv_regs[3] = ifr | 0x80;
247 m_rbv_ifr = ifr | 0x80;
248
249 // printf("VIA2 raise\n");
250 set_via2_interrupt(1);
251 }
252 else
253 {
254 // printf("VIA2 lower\n");
255 set_via2_interrupt(0);
256 }
257 }
258
mac_rbv_r(offs_t offset)259 uint8_t mac_state::mac_rbv_r(offs_t offset)
260 {
261 int data = 0;
262
263 if (offset < 0x100)
264 {
265 data = m_rbv_regs[offset];
266
267 if (offset == 0x10)
268 {
269 data &= ~0x38;
270 data |= (m_montype.read_safe(2)<<3);
271 // printf("%s rbv_r montype: %02x\n", machine().describe_context().c_str(), data);
272 }
273
274 // bit 7 of these registers always reads as 0 on RBV
275 if ((offset == 0x12) || (offset == 0x13))
276 {
277 data &= ~0x80;
278 }
279 }
280 else
281 {
282 offset >>= 9;
283
284 switch (offset)
285 {
286 case 13: // IFR
287 // printf("Read IER = %02x (PC=%x) 2=%02x\n", m_rbv_ier, m_maincpu->pc(), m_rbv_regs[2]);
288 data = m_rbv_ifr;
289 break;
290
291 case 14: // IER
292 // printf("Read IFR = %02x (PC=%x) 2=%02x\n", m_rbv_ifr, m_maincpu->pc(), m_rbv_regs[2]);
293 data = m_rbv_ier;
294 break;
295
296 default:
297 logerror("rbv_r: Unknown extended RBV VIA register %d access\n", offset);
298 break;
299 }
300 }
301
302 // printf("rbv_r: %x = %02x (PC=%x)\n", offset, data, m_maincpu->pc());
303
304 return data;
305 }
306
mac_rbv_w(offs_t offset,uint8_t data)307 void mac_state::mac_rbv_w(offs_t offset, uint8_t data)
308 {
309 if (offset < 0x100)
310 {
311 // if (offset == 0x10)
312 // printf("rbv_w: %02x to offset %x (PC=%x)\n", data, offset, m_maincpu->pc());
313 switch (offset)
314 {
315 case 0x00:
316 if (m_model == MODEL_MAC_LC)
317 {
318 m68000_base_device *m68k = downcast<m68000_base_device *>(m_maincpu.target());
319 m68k->set_hmmu_enable((data & 0x8) ? M68K_HMMU_DISABLE : M68K_HMMU_ENABLE_LC);
320 }
321 break;
322
323 case 0x01:
324 if (((data & 0xc0) != (m_rbv_regs[1] & 0xc0)) && (m_rbv_type == RBV_TYPE_V8))
325 {
326 m_rbv_regs[1] = data;
327 this->v8_resize();
328 }
329 break;
330
331 case 0x02:
332 data &= 0x40;
333 m_rbv_regs[offset] &= ~data;
334 rbv_recalc_irqs();
335 break;
336
337 case 0x03: // write here to ack
338 if (data & 0x80) // 1 bits write 1s
339 {
340 m_rbv_regs[offset] |= data & 0x7f;
341 m_rbv_ifr |= data & 0x7f;
342 }
343 else // 1 bits write 0s
344 {
345 m_rbv_regs[offset] &= ~(data & 0x7f);
346 m_rbv_ifr &= ~(data & 0x7f);
347 }
348 rbv_recalc_irqs();
349 break;
350
351 case 0x10:
352 if (data != 0)
353 {
354 m_rbv_immed10wr = 1;
355 }
356 m_rbv_regs[offset] = data;
357 break;
358
359 case 0x12:
360 if (data & 0x80) // 1 bits write 1s
361 {
362 m_rbv_regs[offset] |= data & 0x7f;
363 }
364 else // 1 bits write 0s
365 {
366 m_rbv_regs[offset] &= ~(data & 0x7f);
367 }
368 rbv_recalc_irqs();
369 break;
370
371 case 0x13:
372 if (data & 0x80) // 1 bits write 1s
373 {
374 m_rbv_regs[offset] |= data & 0x7f;
375
376 if (data == 0xff) m_rbv_regs[offset] = 0x1f; // I don't know why this is special, but the IIci ROM's POST demands it
377 }
378 else // 1 bits write 0s
379 {
380 m_rbv_regs[offset] &= ~(data & 0x7f);
381 }
382 break;
383
384 default:
385 m_rbv_regs[offset] = data;
386 break;
387 }
388 }
389 else
390 {
391 offset >>= 9;
392
393 switch (offset)
394 {
395 case 13: // IFR
396 // printf("%02x to IFR (PC=%x)\n", data, m_maincpu->pc());
397 if (data & 0x80)
398 {
399 data = 0x7f;
400 }
401 rbv_recalc_irqs();
402 break;
403
404 case 14: // IER
405 // printf("%02x to IER (PC=%x)\n", data, m_maincpu->pc());
406 if (data & 0x80) // 1 bits write 1s
407 {
408 m_rbv_ier |= data & 0x7f;
409 }
410 else // 1 bits write 0s
411 {
412 m_rbv_ier &= ~(data & 0x7f);
413 }
414 rbv_recalc_irqs();
415 break;
416
417 default:
418 logerror("rbv_w: Unknown extended RBV VIA register %d access\n", offset);
419 break;
420 }
421 }
422 }
423
mac_config_r()424 uint16_t mac_state::mac_config_r()
425 {
426 return 0xffff; // returns nonzero if no PDS RAM expansion, 0 if present
427 }
428
429 // IIfx
biu_r(offs_t offset,uint32_t mem_mask)430 uint32_t mac_state::biu_r(offs_t offset, uint32_t mem_mask)
431 {
432 // printf("biu_r @ %x, mask %08x\n", offset, mem_mask);
433 return 0;
434 }
435
biu_w(offs_t offset,uint32_t data,uint32_t mem_mask)436 void mac_state::biu_w(offs_t offset, uint32_t data, uint32_t mem_mask)
437 {
438 // printf("biu_w %x @ %x, mask %08x\n", data, offset, mem_mask);
439 }
440
oss_r(offs_t offset)441 uint8_t mac_state::oss_r(offs_t offset)
442 {
443 // printf("oss_r @ %x\n", offset);
444 // if (offset <= 0xe) // for interrupt mask registers, we're intended to return something different than is written in the low 3 bits (?)
445 // {
446 // return m_oss_regs[offset]<<4;
447 // }
448
449 return m_oss_regs[offset];
450 }
451
oss_w(offs_t offset,uint8_t data)452 void mac_state::oss_w(offs_t offset, uint8_t data)
453 {
454 // printf("oss_w %x @ %x\n", data, offset);
455 m_oss_regs[offset] = data;
456 }
457
buserror_r()458 uint32_t mac_state::buserror_r()
459 {
460 m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE);
461 m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE);
462 return 0;
463 }
464
scciop_r(offs_t offset)465 uint8_t mac_state::scciop_r(offs_t offset)
466 {
467 // printf("scciop_r @ %x (PC=%x)\n", offset, m_maincpu->pc());
468 return 0;
469 }
470
scciop_w(offs_t offset,uint8_t data)471 void mac_state::scciop_w(offs_t offset, uint8_t data)
472 {
473 // printf("scciop_w %x @ %x (PC=%x)\n", data, offset, m_maincpu->pc());
474 }
475
swimiop_r(offs_t offset)476 uint8_t mac_state::swimiop_r(offs_t offset)
477 {
478 // printf("swimiop_r @ %x (PC=%x)\n", offset, m_maincpu->pc());
479 return 0;
480 }
481
swimiop_w(offs_t offset,uint8_t data)482 void mac_state::swimiop_w(offs_t offset, uint8_t data)
483 {
484 // printf("swimiop_w %x @ %x (PC=%x)\n", data, offset, m_maincpu->pc());
485 }
486
pmac_diag_r(offs_t offset)487 uint8_t mac_state::pmac_diag_r(offs_t offset)
488 {
489 switch (offset)
490 {
491 case 0: // return 0 here to get the 'car crash' sound after the boot bong, 1 otherwise
492 return 1;
493 }
494
495 return 0;
496 }
497
amic_dma_r()498 uint8_t mac_state::amic_dma_r()
499 {
500 return 0;
501 }
502
amic_dma_w(offs_t offset,uint8_t data)503 void mac_state::amic_dma_w(offs_t offset, uint8_t data)
504 {
505 // printf("amic_dma_w: %02x at %x (PC=%x)\n", data, offset+0x1000, m_maincpu->pc());
506 }
507
508 // HMC has one register: a 35-bit shift register which is accessed one bit at a time (see pmac6100 code at 4030383c which makes this obvious)
hmc_r()509 uint8_t mac_state::hmc_r()
510 {
511 uint8_t rv = (uint8_t)(m_hmc_shiftout&1);
512 m_hmc_shiftout>>= 1;
513 return rv;
514 }
515
hmc_w(offs_t offset,uint8_t data)516 void mac_state::hmc_w(offs_t offset, uint8_t data)
517 {
518 // writes to xxx8 reset the bit shift position
519 if ((offset&0x8) == 8)
520 {
521 m_hmc_shiftout = m_hmc_reg;
522 }
523 else
524 {
525 uint64_t temp = (data & 1) ? 0x400000000U : 0x0U;
526 m_hmc_reg >>= 1;
527 m_hmc_reg |= temp;
528 }
529 }
530
531 /***************************************************************************
532 ADDRESS MAPS
533 ***************************************************************************/
534
maclc_map(address_map & map)535 void mac_state::maclc_map(address_map &map)
536 {
537 map.global_mask(0x80ffffff); // V8 uses bit 31 and 23-0 for address decoding only
538
539 map(0xa00000, 0xafffff).rom().region("bootrom", 0); // ROM (in 32-bit mode)
540
541 map(0xf00000, 0xf01fff).rw(FUNC(mac_state::mac_via_r), FUNC(mac_state::mac_via_w));
542 map(0xf04000, 0xf05fff).rw(FUNC(mac_state::mac_scc_r), FUNC(mac_state::mac_scc_2_w));
543 map(0xf06000, 0xf07fff).rw(FUNC(mac_state::macii_scsi_drq_r), FUNC(mac_state::macii_scsi_drq_w));
544 map(0xf10000, 0xf11fff).rw(FUNC(mac_state::macplus_scsi_r), FUNC(mac_state::macii_scsi_w));
545 map(0xf12000, 0xf13fff).rw(FUNC(mac_state::macii_scsi_drq_r), FUNC(mac_state::macii_scsi_drq_w));
546 map(0xf14000, 0xf15fff).rw(m_asc, FUNC(asc_device::read), FUNC(asc_device::write));
547 map(0xf16000, 0xf17fff).rw(FUNC(mac_state::mac_iwm_r), FUNC(mac_state::mac_iwm_w));
548 map(0xf24000, 0xf24003).rw(FUNC(mac_state::rbv_ramdac_r), FUNC(mac_state::ariel_ramdac_w));
549 map(0xf26000, 0xf27fff).rw(FUNC(mac_state::mac_rbv_r), FUNC(mac_state::mac_rbv_w)); // VIA2 (V8)
550 map(0xf40000, 0xfbffff).ram().share("vram");
551 }
552
maclc3_map(address_map & map)553 void mac_state::maclc3_map(address_map &map)
554 {
555 map(0x40000000, 0x400fffff).rom().region("bootrom", 0).mirror(0x0ff00000);
556
557 map(0x50000000, 0x50001fff).rw(FUNC(mac_state::mac_via_r), FUNC(mac_state::mac_via_w)).mirror(0x00f00000);
558 map(0x50004000, 0x50005fff).rw(FUNC(mac_state::mac_scc_r), FUNC(mac_state::mac_scc_2_w)).mirror(0x00f00000);
559 map(0x50006000, 0x50007fff).rw(FUNC(mac_state::macii_scsi_drq_r), FUNC(mac_state::macii_scsi_drq_w)).mirror(0x00f00000);
560 map(0x50010000, 0x50011fff).rw(FUNC(mac_state::macplus_scsi_r), FUNC(mac_state::macii_scsi_w)).mirror(0x00f00000);
561 map(0x50012000, 0x50013fff).rw(FUNC(mac_state::macii_scsi_drq_r), FUNC(mac_state::macii_scsi_drq_w)).mirror(0x00f00000);
562 map(0x50014000, 0x50015fff).rw(m_asc, FUNC(asc_device::read), FUNC(asc_device::write)).mirror(0x00f00000);
563 map(0x50016000, 0x50017fff).rw(FUNC(mac_state::mac_iwm_r), FUNC(mac_state::mac_iwm_w)).mirror(0x00f00000);
564 map(0x50024000, 0x50025fff).w(FUNC(mac_state::ariel_ramdac_w)).mirror(0x00f00000);
565 map(0x50026000, 0x50027fff).rw(FUNC(mac_state::mac_rbv_r), FUNC(mac_state::mac_rbv_w)).mirror(0x00f00000);
566 map(0x50028000, 0x50028003).rw(FUNC(mac_state::mac_sonora_vctl_r), FUNC(mac_state::mac_sonora_vctl_w)).mirror(0x00f00000);
567
568 map(0x5ffffffc, 0x5fffffff).r(FUNC(mac_state::mac_read_id));
569
570 map(0x60000000, 0x600fffff).ram().mirror(0x0ff00000).share("vram");
571 }
572
macii_map(address_map & map)573 void mac_state::macii_map(address_map &map)
574 {
575 map(0x40000000, 0x4003ffff).rom().region("bootrom", 0).mirror(0x0ffc0000);
576
577 // MMU remaps I/O without the F
578 map(0x50000000, 0x50001fff).rw(FUNC(mac_state::mac_via_r), FUNC(mac_state::mac_via_w)).mirror(0x00f00000);
579 map(0x50002000, 0x50003fff).rw(FUNC(mac_state::mac_via2_r), FUNC(mac_state::mac_via2_w)).mirror(0x00f00000);
580 map(0x50004000, 0x50005fff).rw(FUNC(mac_state::mac_scc_r), FUNC(mac_state::mac_scc_2_w)).mirror(0x00f00000);
581 map(0x50006000, 0x50006003).w(FUNC(mac_state::macii_scsi_drq_w)).mirror(0x00f00000);
582 map(0x50006060, 0x50006063).r(FUNC(mac_state::macii_scsi_drq_r)).mirror(0x00f00000);
583 map(0x50010000, 0x50011fff).rw(FUNC(mac_state::macplus_scsi_r), FUNC(mac_state::macii_scsi_w)).mirror(0x00f00000);
584 map(0x50012060, 0x50012063).r(FUNC(mac_state::macii_scsi_drq_r)).mirror(0x00f00000);
585 map(0x50014000, 0x50015fff).rw(m_asc, FUNC(asc_device::read), FUNC(asc_device::write)).mirror(0x00f00000);
586 map(0x50016000, 0x50017fff).rw(FUNC(mac_state::mac_iwm_r), FUNC(mac_state::mac_iwm_w)).mirror(0x00f00000);
587 map(0x50040000, 0x50041fff).rw(FUNC(mac_state::mac_via_r), FUNC(mac_state::mac_via_w)).mirror(0x00f00000);
588 }
589
maciici_map(address_map & map)590 void mac_state::maciici_map(address_map &map)
591 {
592 map(0x40000000, 0x4007ffff).r(FUNC(mac_state::rom_switch_r)).mirror(0x0ff80000);
593
594 map(0x50000000, 0x50001fff).rw(FUNC(mac_state::mac_via_r), FUNC(mac_state::mac_via_w)).mirror(0x00f00000);
595 map(0x50004000, 0x50005fff).rw(FUNC(mac_state::mac_scc_r), FUNC(mac_state::mac_scc_2_w)).mirror(0x00f00000);
596 map(0x50006000, 0x50007fff).rw(FUNC(mac_state::macii_scsi_drq_r), FUNC(mac_state::macii_scsi_drq_w)).mirror(0x00f00000);
597 map(0x50010000, 0x50011fff).rw(FUNC(mac_state::macplus_scsi_r), FUNC(mac_state::macii_scsi_w)).mirror(0x00f00000);
598 map(0x50012060, 0x50012063).r(FUNC(mac_state::macii_scsi_drq_r)).mirror(0x00f00000);
599 map(0x50014000, 0x50015fff).rw(m_asc, FUNC(asc_device::read), FUNC(asc_device::write)).mirror(0x00f00000);
600 map(0x50016000, 0x50017fff).rw(FUNC(mac_state::mac_iwm_r), FUNC(mac_state::mac_iwm_w)).mirror(0x00f00000);
601 map(0x50024000, 0x50024007).w(FUNC(mac_state::rbv_ramdac_w)).mirror(0x00f00000);
602 map(0x50026000, 0x50027fff).rw(FUNC(mac_state::mac_rbv_r), FUNC(mac_state::mac_rbv_w)).mirror(0x00f00000);
603 map(0x50040000, 0x50041fff).rw(FUNC(mac_state::mac_via_r), FUNC(mac_state::mac_via_w)).mirror(0x00f00000);
604 }
605
macse30_map(address_map & map)606 void mac_state::macse30_map(address_map &map)
607 {
608 map(0x40000000, 0x4003ffff).rom().region("bootrom", 0).mirror(0x0ffc0000);
609
610 map(0x50000000, 0x50001fff).rw(FUNC(mac_state::mac_via_r), FUNC(mac_state::mac_via_w)).mirror(0x00f00000);
611 map(0x50002000, 0x50003fff).rw(FUNC(mac_state::mac_via2_r), FUNC(mac_state::mac_via2_w)).mirror(0x00f00000);
612 map(0x50004000, 0x50005fff).rw(FUNC(mac_state::mac_scc_r), FUNC(mac_state::mac_scc_2_w)).mirror(0x00f00000);
613 map(0x50006000, 0x50007fff).rw(FUNC(mac_state::macii_scsi_drq_r), FUNC(mac_state::macii_scsi_drq_w)).mirror(0x00f00000);
614 map(0x50010000, 0x50011fff).rw(FUNC(mac_state::macplus_scsi_r), FUNC(mac_state::macii_scsi_w)).mirror(0x00f00000);
615 map(0x50012060, 0x50012063).r(FUNC(mac_state::macii_scsi_drq_r)).mirror(0x00f00000);
616 map(0x50014000, 0x50015fff).rw(m_asc, FUNC(asc_device::read), FUNC(asc_device::write)).mirror(0x00f00000);
617 map(0x50016000, 0x50017fff).rw(FUNC(mac_state::mac_iwm_r), FUNC(mac_state::mac_iwm_w)).mirror(0x00f00000);
618 map(0x50040000, 0x50041fff).rw(FUNC(mac_state::mac_via_r), FUNC(mac_state::mac_via_w)).mirror(0x00f00000); // mirror
619
620 map(0xfe000000, 0xfe00ffff).ram().share("vram");
621 map(0xfee00000, 0xfee0ffff).ram().share("vram").mirror(0x000f0000);
622 map(0xfeffe000, 0xfeffffff).rom().region("se30vrom", 0x0);
623 }
624
maciifx_map(address_map & map)625 void mac_state::maciifx_map(address_map &map)
626 {
627 map(0x40000000, 0x4007ffff).rom().region("bootrom", 0).mirror(0x0ff80000);
628
629 map(0x50000000, 0x50001fff).rw(FUNC(mac_state::mac_via_r), FUNC(mac_state::mac_via_w)).mirror(0x00f00000);
630 map(0x50004000, 0x50005fff).rw(FUNC(mac_state::scciop_r), FUNC(mac_state::scciop_w)).mirror(0x00f00000);
631 map(0x5000a000, 0x5000bfff).rw(FUNC(mac_state::macplus_scsi_r), FUNC(mac_state::macii_scsi_w)).mirror(0x00f00000);
632 map(0x5000c060, 0x5000c063).r(FUNC(mac_state::macii_scsi_drq_r)).mirror(0x00f00000);
633 map(0x5000d000, 0x5000d003).w(FUNC(mac_state::macii_scsi_drq_w)).mirror(0x00f00000);
634 map(0x5000d060, 0x5000d063).r(FUNC(mac_state::macii_scsi_drq_r)).mirror(0x00f00000);
635 map(0x50010000, 0x50011fff).rw(m_asc, FUNC(asc_device::read), FUNC(asc_device::write)).mirror(0x00f00000);
636 map(0x50012000, 0x50013fff).rw(FUNC(mac_state::swimiop_r), FUNC(mac_state::swimiop_w)).mirror(0x00f00000);
637 map(0x50018000, 0x50019fff).rw(FUNC(mac_state::biu_r), FUNC(mac_state::biu_w)).mirror(0x00f00000);
638 map(0x5001a000, 0x5001bfff).rw(FUNC(mac_state::oss_r), FUNC(mac_state::oss_w)).mirror(0x00f00000);
639 map(0x50024000, 0x50027fff).r(FUNC(mac_state::buserror_r)).mirror(0x00f00000); // must bus error on access here so ROM can determine we're an FMC
640 map(0x50040000, 0x50041fff).rw(FUNC(mac_state::mac_via_r), FUNC(mac_state::mac_via_w)).mirror(0x00f00000);
641 }
642
pwrmac_map(address_map & map)643 void mac_state::pwrmac_map(address_map &map)
644 {
645 map(0x00000000, 0x007fffff).ram(); // 8 MB standard
646
647 map(0x40000000, 0x403fffff).rom().region("bootrom", 0).mirror(0x0fc00000);
648
649 map(0x50000000, 0x50001fff).rw(FUNC(mac_state::mac_via_r), FUNC(mac_state::mac_via_w)).mirror(0x00f00000);
650 map(0x50004000, 0x50005fff).rw(FUNC(mac_state::mac_scc_r), FUNC(mac_state::mac_scc_2_w)).mirror(0x00f00000);
651 // 50008000 = ethernet ID PROM
652 // 5000a000 = MACE ethernet controller
653 map(0x50010000, 0x50011fff).rw(FUNC(mac_state::macplus_scsi_r), FUNC(mac_state::macii_scsi_w)).mirror(0x00f00000);
654 // 50014000 = sound registers (AWACS)
655 map(0x50014000, 0x50015fff).rw(m_awacs, FUNC(awacs_device::read), FUNC(awacs_device::write)).mirror(0x01f00000);
656 map(0x50016000, 0x50017fff).rw(FUNC(mac_state::mac_iwm_r), FUNC(mac_state::mac_iwm_w)).mirror(0x00f00000);
657 map(0x50024000, 0x50025fff).w(FUNC(mac_state::ariel_ramdac_w)).mirror(0x00f00000);
658 map(0x50026000, 0x50027fff).rw(FUNC(mac_state::mac_via2_r), FUNC(mac_state::mac_via2_w)).mirror(0x00f00000);
659 map(0x50028000, 0x50028007).rw(FUNC(mac_state::mac_sonora_vctl_r), FUNC(mac_state::mac_sonora_vctl_w)).mirror(0x00f00000);
660 // 5002a000 = interrupt controller
661 // 5002c000 = diagnostic registers
662 map(0x5002c000, 0x5002dfff).r(FUNC(mac_state::pmac_diag_r)).mirror(0x00f00000);
663 map(0x50031000, 0x50032fff).rw(FUNC(mac_state::amic_dma_r), FUNC(mac_state::amic_dma_w)).mirror(0x00f00000);
664 map(0x50040000, 0x5004000f).rw(FUNC(mac_state::hmc_r), FUNC(mac_state::hmc_w)).mirror(0x00f00000);
665 map(0x5ffffff8, 0x5fffffff).r(FUNC(mac_state::mac_read_id));
666
667 map(0xffc00000, 0xffffffff).rom().region("bootrom", 0);
668 }
669
670 /***************************************************************************
671 DEVICE CONFIG
672 ***************************************************************************/
673
674 static const applefdc_interface mac_iwm_interface =
675 {
676 sony_set_lines,
677 mac_fdc_set_enable_lines,
678
679 sony_read_data,
680 sony_write_data,
681 sony_read_status
682 };
683
mac_nubus_cards(device_slot_interface & device)684 static void mac_nubus_cards(device_slot_interface &device)
685 {
686 device.option_add("m2video", NUBUS_M2VIDEO); /* Apple Macintosh II Video Card */
687 device.option_add("48gc", NUBUS_48GC); /* Apple 4*8 Graphics Card */
688 device.option_add("824gc", NUBUS_824GC); /* Apple 8*24 Graphics Card */
689 device.option_add("cb264", NUBUS_CB264); /* RasterOps ColorBoard 264 */
690 device.option_add("vikbw", NUBUS_VIKBW); /* Moniterm Viking board */
691 device.option_add("image", NUBUS_IMAGE); /* Disk Image Pseudo-Card */
692 device.option_add("specpdq", NUBUS_SPECPDQ); /* SuperMac Spectrum PDQ */
693 device.option_add("m2hires", NUBUS_M2HIRES); /* Apple Macintosh II Hi-Resolution Card */
694 device.option_add("spec8s3", NUBUS_SPEC8S3); /* SuperMac Spectrum/8 Series III */
695 // device.option_add("thundergx", NUBUS_THUNDERGX); /* Radius Thunder GX (not yet) */
696 device.option_add("radiustpd", NUBUS_RADIUSTPD); /* Radius Two Page Display */
697 device.option_add("asmc3nb", NUBUS_ASNTMC3NB); /* Asante MC3NB Ethernet card */
698 device.option_add("portrait", NUBUS_WSPORTRAIT); /* Apple Macintosh II Portrait video card */
699 device.option_add("enetnb", NUBUS_APPLEENET); /* Apple NuBus Ethernet */
700 device.option_add("bootbug", NUBUS_BOOTBUG); /* Brigent BootBug debugger card */
701 device.option_add("quadralink", NUBUS_QUADRALINK); /* AE Quadralink serial card */
702 device.option_add("laserview", NUBUS_LASERVIEW); /* Sigma Designs LaserView monochrome video card */
703 }
704
mac_pds030_cards(device_slot_interface & device)705 static void mac_pds030_cards(device_slot_interface &device)
706 {
707 device.option_add("cb264", PDS030_CB264SE30); // RasterOps Colorboard 264/SE30
708 device.option_add("pc816", PDS030_PROCOLOR816); // Lapis ProColor Server 8*16 PDS
709 device.option_add("lview", PDS030_LVIEW); // Sigma Designs L-View
710 device.option_add("30hr", PDS030_XCEED30HR); // Micron/XCEED Technology Color 30HR
711 device.option_add("mc30", PDS030_XCEEDMC30); // Micron/XCEED Technology MacroColor 30
712 }
713
mac_lcpds_cards(device_slot_interface & device)714 static void mac_lcpds_cards(device_slot_interface &device)
715 {
716 }
717
718 /***************************************************************************
719 MACHINE DRIVERS
720 ***************************************************************************/
721
722 static const floppy_interface mac_floppy_interface =
723 {
724 FLOPPY_STANDARD_3_5_DSHD,
725 LEGACY_FLOPPY_OPTIONS_NAME(apple35_mac),
726 "floppy_3_5"
727 };
728
add_base_devices(machine_config & config,bool rtc,bool super_woz)729 void mac_state::add_base_devices(machine_config &config, bool rtc, bool super_woz)
730 {
731 if (rtc)
732 RTC3430042(config, m_rtc, XTAL(32'768));
733
734 if (super_woz)
735 LEGACY_SWIM(config, m_fdc, &mac_iwm_interface);
736 else
737 LEGACY_IWM(config, m_fdc, &mac_iwm_interface);
738 sonydriv_floppy_image_device::legacy_2_drives_add(config, &mac_floppy_interface);
739
740 SCC8530(config, m_scc, C7M);
741 m_scc->intrq_callback().set(FUNC(mac_state::set_scc_interrupt));
742 }
743
add_scsi(machine_config & config,bool cdrom)744 void mac_state::add_scsi(machine_config &config, bool cdrom)
745 {
746 scsi_port_device &scsibus(SCSI_PORT(config, "scsi"));
747 scsibus.set_slot_device(1, "harddisk", SCSIHD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_6));
748 scsibus.set_slot_device(2, "harddisk", SCSIHD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_5));
749 if (cdrom)
750 scsibus.set_slot_device(3, "cdrom", SCSICD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_4));
751
752 NCR5380(config, m_ncr5380, C7M);
753 m_ncr5380->set_scsi_port("scsi");
754 m_ncr5380->irq_callback().set(FUNC(mac_state::mac_scsi_irq));
755
756 SOFTWARE_LIST(config, "hdd_list").set_original("mac_hdd");
757 }
758
add_via1_adb(machine_config & config,bool macii)759 void mac_state::add_via1_adb(machine_config &config, bool macii)
760 {
761 VIA6522(config, m_via1, C7M/10);
762 m_via1->readpa_handler().set(FUNC(mac_state::mac_via_in_a));
763 if (macii)
764 m_via1->readpb_handler().set(FUNC(mac_state::mac_via_in_b_ii));
765 else
766 m_via1->readpb_handler().set(FUNC(mac_state::mac_via_in_b));
767 m_via1->writepa_handler().set(FUNC(mac_state::mac_via_out_a));
768 m_via1->writepb_handler().set(FUNC(mac_state::mac_via_out_b_bbadb));
769 m_via1->cb2_handler().set(FUNC(mac_state::mac_adb_via_out_cb2));
770 m_via1->irq_handler().set(FUNC(mac_state::mac_via_irq));
771 }
772
add_via2(machine_config & config)773 void mac_state::add_via2(machine_config &config)
774 {
775 VIA6522(config, m_via2, C7M/10);
776 m_via2->readpa_handler().set(FUNC(mac_state::mac_via2_in_a));
777 m_via2->readpb_handler().set(FUNC(mac_state::mac_via2_in_b));
778 m_via2->writepa_handler().set(FUNC(mac_state::mac_via2_out_a));
779 m_via2->writepb_handler().set(FUNC(mac_state::mac_via2_out_b));
780 m_via2->irq_handler().set(FUNC(mac_state::mac_via2_irq));
781 }
782
add_egret(machine_config & config,int type)783 void mac_state::add_egret(machine_config &config, int type)
784 {
785 EGRET(config, m_egret, type);
786 m_egret->reset_callback().set(FUNC(mac_state::cuda_reset_w));
787 m_egret->linechange_callback().set(m_macadb, FUNC(macadb_device::adb_linechange_w));
788 m_egret->via_clock_callback().set(m_via1, FUNC(via6522_device::write_cb1));
789 m_egret->via_data_callback().set(m_via1, FUNC(via6522_device::write_cb2));
790 m_macadb->set_mcu_mode(true);
791 m_macadb->adb_data_callback().set(m_egret, FUNC(egret_device::set_adb_line));
792 config.set_perfect_quantum(m_maincpu);
793 }
794
add_cuda(machine_config & config,int type)795 void mac_state::add_cuda(machine_config &config, int type)
796 {
797 CUDA(config, m_cuda, type);
798 m_cuda->reset_callback().set(FUNC(mac_state::cuda_reset_w));
799 m_cuda->linechange_callback().set(m_macadb, FUNC(macadb_device::adb_linechange_w));
800 m_cuda->via_clock_callback().set(m_via1, FUNC(via6522_device::write_cb1));
801 m_cuda->via_data_callback().set(m_via1, FUNC(via6522_device::write_cb2));
802 m_macadb->set_mcu_mode(true);
803 m_macadb->adb_data_callback().set(m_cuda, FUNC(cuda_device::set_adb_line));
804 config.set_perfect_quantum(m_maincpu);
805 }
806
add_asc(machine_config & config,asc_device::asc_type type)807 void mac_state::add_asc(machine_config &config, asc_device::asc_type type)
808 {
809 SPEAKER(config, "lspeaker").front_left();
810 SPEAKER(config, "rspeaker").front_right();
811 ASC(config, m_asc, C15M, type);
812 m_asc->irqf_callback().set(FUNC(mac_state::mac_asc_irq));
813 m_asc->add_route(0, "lspeaker", 1.0);
814 m_asc->add_route(1, "rspeaker", 1.0);
815 }
816
add_pb1xx_screen(machine_config & config)817 void mac_state::add_pb1xx_screen(machine_config &config)
818 {
819 SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
820 m_screen->set_refresh_hz(60.15);
821 m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(1260));
822 m_screen->set_video_attributes(VIDEO_UPDATE_BEFORE_VBLANK);
823 m_screen->set_size(700, 480);
824 m_screen->set_visarea(0, 639, 0, 399);
825 m_screen->set_palette(m_palette);
826 }
827
add_pb1xx_vias(machine_config & config)828 void mac_state::add_pb1xx_vias(machine_config &config)
829 {
830 VIA6522(config, m_via1, 783360);
831 m_via1->readpa_handler().set(FUNC(mac_state::mac_via_in_a));
832 m_via1->readpb_handler().set(FUNC(mac_state::mac_via_in_b_via2pmu));
833 m_via1->writepa_handler().set(FUNC(mac_state::mac_via_out_a));
834 m_via1->writepb_handler().set(FUNC(mac_state::mac_via_out_b_via2pmu));
835 m_via1->cb2_handler().set(FUNC(mac_state::mac_adb_via_out_cb2));
836 m_via1->irq_handler().set(FUNC(mac_state::mac_via_irq));
837
838 VIA6522(config, m_via2, 783360);
839 m_via2->readpa_handler().set(FUNC(mac_state::mac_via2_in_a_pmu));
840 m_via2->readpb_handler().set(FUNC(mac_state::mac_via2_in_b_pmu));
841 m_via2->writepa_handler().set(FUNC(mac_state::mac_via2_out_a_pmu));
842 m_via2->writepb_handler().set(FUNC(mac_state::mac_via2_out_b_pmu));
843 m_via2->irq_handler().set(FUNC(mac_state::mac_via2_irq));
844 }
845
add_nubus(machine_config & config,bool bank1,bool bank2)846 void mac_state::add_nubus(machine_config &config, bool bank1, bool bank2)
847 {
848 nubus_device &nubus(NUBUS(config, "nubus", 0));
849 nubus.set_space(m_maincpu, AS_PROGRAM);
850 nubus.out_irq9_callback().set(FUNC(mac_state::nubus_irq_9_w));
851 nubus.out_irqa_callback().set(FUNC(mac_state::nubus_irq_a_w));
852 nubus.out_irqb_callback().set(FUNC(mac_state::nubus_irq_b_w));
853 nubus.out_irqc_callback().set(FUNC(mac_state::nubus_irq_c_w));
854 nubus.out_irqd_callback().set(FUNC(mac_state::nubus_irq_d_w));
855 nubus.out_irqe_callback().set(FUNC(mac_state::nubus_irq_e_w));
856 if (bank1)
857 {
858 NUBUS_SLOT(config, "nb9", "nubus", mac_nubus_cards, "48gc");
859 NUBUS_SLOT(config, "nba", "nubus", mac_nubus_cards, nullptr);
860 NUBUS_SLOT(config, "nbb", "nubus", mac_nubus_cards, nullptr);
861 }
862 if (bank2)
863 {
864 NUBUS_SLOT(config, "nbc", "nubus", mac_nubus_cards, nullptr);
865 NUBUS_SLOT(config, "nbd", "nubus", mac_nubus_cards, nullptr);
866 NUBUS_SLOT(config, "nbe", "nubus", mac_nubus_cards, nullptr);
867 }
868 }
869
add_nubus_pds(machine_config & config,const char * slot_tag,T && opts)870 template <typename T> void mac_state::add_nubus_pds(machine_config &config, const char *slot_tag, T &&opts)
871 {
872 nubus_device &nubus(NUBUS(config, "pds", 0));
873 nubus.set_space(m_maincpu, AS_PROGRAM);
874 nubus.out_irq9_callback().set(FUNC(mac_state::nubus_irq_9_w));
875 nubus.out_irqa_callback().set(FUNC(mac_state::nubus_irq_a_w));
876 nubus.out_irqb_callback().set(FUNC(mac_state::nubus_irq_b_w));
877 nubus.out_irqc_callback().set(FUNC(mac_state::nubus_irq_c_w));
878 nubus.out_irqd_callback().set(FUNC(mac_state::nubus_irq_d_w));
879 nubus.out_irqe_callback().set(FUNC(mac_state::nubus_irq_e_w));
880 NUBUS_SLOT(config, slot_tag, "pds", std::forward<T>(opts), nullptr);
881 }
882
macii(machine_config & config,bool cpu,asc_device::asc_type asc_type,bool nubus,bool nubus_bank1,bool nubus_bank2)883 void mac_state::macii(machine_config &config, bool cpu, asc_device::asc_type asc_type, bool nubus, bool nubus_bank1, bool nubus_bank2)
884 {
885 if (cpu)
886 {
887 M68020PMMU(config, m_maincpu, C15M);
888 m_maincpu->set_addrmap(AS_PROGRAM, &mac_state::macii_map);
889 m_maincpu->set_dasm_override(FUNC(mac_state::mac_dasm_override));
890 }
891
892 PALETTE(config, m_palette).set_entries(256);
893
894 add_asc(config, asc_type);
895 add_base_devices(config);
896 add_scsi(config, true);
897 if (nubus)
898 add_nubus(config, nubus_bank1, nubus_bank2);
899
900 add_via1_adb(config, true);
901 add_via2(config);
902
903 MACADB(config, m_macadb, C15M);
904 m_macadb->via_clock_callback().set(m_via1, FUNC(via6522_device::write_cb1));
905 m_macadb->via_data_callback().set(m_via1, FUNC(via6522_device::write_cb2));
906 m_macadb->adb_irq_callback().set(FUNC(mac_state::adb_irq_w));
907
908 RAM(config, m_ram);
909 m_ram->set_default_size("2M");
910 m_ram->set_extra_options("8M,32M,64M,96M,128M");
911
912 SOFTWARE_LIST(config, "flop35_list").set_original("mac_flop");
913 }
914
maciihmu(machine_config & config)915 void mac_state::maciihmu(machine_config &config)
916 {
917 macii(config, false);
918
919 M68020HMMU(config, m_maincpu, C15M);
920 m_maincpu->set_addrmap(AS_PROGRAM, &mac_state::macii_map);
921 m_maincpu->set_dasm_override(FUNC(mac_state::mac_dasm_override));
922 }
923
maciifx(machine_config & config)924 void mac_state::maciifx(machine_config &config)
925 {
926 /* basic machine hardware */
927 M68030(config, m_maincpu, 40000000);
928 m_maincpu->set_addrmap(AS_PROGRAM, &mac_state::maciifx_map);
929 m_maincpu->set_dasm_override(FUNC(mac_state::mac_dasm_override));
930
931 add_asc(config, asc_device::asc_type::ASC);
932 add_base_devices(config);
933 add_scsi(config);
934
935 VIA6522(config, m_via1, C7M/10);
936 m_via1->readpa_handler().set(FUNC(mac_state::mac_via_in_a));
937 m_via1->readpb_handler().set(FUNC(mac_state::mac_via_in_b_ii));
938 m_via1->writepa_handler().set(FUNC(mac_state::mac_via_out_a));
939 m_via1->writepb_handler().set(FUNC(mac_state::mac_via_out_b));
940 m_via1->cb2_handler().set(FUNC(mac_state::mac_adb_via_out_cb2));
941 m_via1->irq_handler().set(FUNC(mac_state::mac_via_irq));
942
943 RAM(config, m_ram);
944 m_ram->set_default_size("4M");
945 m_ram->set_extra_options("8M,16M,32M,64M,96M,128M");
946
947 SOFTWARE_LIST(config, "flop35_list").set_original("mac_flop");
948
949 add_nubus(config);
950 }
951
maclc(machine_config & config,bool cpu,bool egret,asc_device::asc_type asc_type)952 void mac_state::maclc(machine_config &config, bool cpu, bool egret, asc_device::asc_type asc_type)
953 {
954 macii(config, false, asc_type, false);
955
956 if (cpu)
957 {
958 M68020HMMU(config, m_maincpu, C15M);
959 m_maincpu->set_addrmap(AS_PROGRAM, &mac_state::maclc_map);
960 m_maincpu->set_dasm_override(FUNC(mac_state::mac_dasm_override));
961 }
962
963 MCFG_VIDEO_START_OVERRIDE(mac_state,macv8)
964 MCFG_VIDEO_RESET_OVERRIDE(mac_state,macrbv)
965
966 SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
967 m_screen->set_raw(25175000, 800, 0, 640, 525, 0, 480);
968 m_screen->set_size(1024, 768);
969 m_screen->set_visarea(0, 640-1, 0, 480-1);
970 m_screen->set_screen_update(FUNC(mac_state::screen_update_macv8));
971 m_screen->screen_vblank().set(FUNC(mac_state::mac_rbv_vbl));
972 config.set_default_layout(layout_mac);
973
974 m_ram->set_default_size("2M");
975 m_ram->set_extra_options("4M,6M,8M,10M");
976
977 m_via1->writepb_handler().set(FUNC(mac_state::mac_via_out_b_egadb));
978
979 add_nubus_pds(config, "lcpds", mac_lcpds_cards);
980
981 if (egret)
982 {
983 add_egret(config, EGRET_341S0850);
984 }
985 }
986
maclc2(machine_config & config,bool egret)987 void mac_state::maclc2(machine_config &config, bool egret)
988 {
989 maclc(config, false, egret);
990
991 M68030(config, m_maincpu, C15M);
992 m_maincpu->set_addrmap(AS_PROGRAM, &mac_state::maclc_map);
993 m_maincpu->set_dasm_override(FUNC(mac_state::mac_dasm_override));
994
995 m_ram->set_default_size("4M");
996 m_ram->set_extra_options("6M,8M,10M");
997 }
998
maccclas(machine_config & config)999 void mac_state::maccclas(machine_config &config)
1000 {
1001 maclc(config, false, false, asc_device::asc_type::VASP);
1002
1003 M68030(config, m_maincpu, C15M);
1004 m_maincpu->set_addrmap(AS_PROGRAM, &mac_state::maclc_map);
1005 m_maincpu->set_dasm_override(FUNC(mac_state::mac_dasm_override));
1006
1007 m_ram->set_default_size("4M");
1008 m_ram->set_extra_options("6M,8M,10M");
1009
1010 add_cuda(config, CUDA_341S0788); // should be 0417, but that version won't sync up properly with the '030 right now
1011 m_via1->writepb_handler().set(FUNC(mac_state::mac_via_out_b_cdadb));
1012 }
1013
maclc3(machine_config & config,bool egret)1014 void mac_state::maclc3(machine_config &config, bool egret)
1015 {
1016 maclc(config, false, false, asc_device::asc_type::SONORA);
1017
1018 M68030(config, m_maincpu, 25000000);
1019 m_maincpu->set_addrmap(AS_PROGRAM, &mac_state::maclc3_map);
1020 m_maincpu->set_dasm_override(FUNC(mac_state::mac_dasm_override));
1021
1022 MCFG_VIDEO_START_OVERRIDE(mac_state,macsonora)
1023 MCFG_VIDEO_RESET_OVERRIDE(mac_state,macsonora)
1024
1025 m_screen->set_screen_update(FUNC(mac_state::screen_update_macsonora));
1026
1027 m_ram->set_default_size("4M");
1028 m_ram->set_extra_options("8M,16M,32M,48M,64M,80M");
1029
1030 if (egret)
1031 {
1032 add_egret(config, EGRET_341S0851);
1033 }
1034 }
1035
maclc520(machine_config & config)1036 void mac_state::maclc520(machine_config &config)
1037 {
1038 maclc3(config, false);
1039 add_cuda(config, CUDA_341S0060);
1040 m_via1->writepb_handler().set(FUNC(mac_state::mac_via_out_b_cdadb));
1041 }
1042
maciivx(machine_config & config)1043 void mac_state::maciivx(machine_config &config)
1044 {
1045 maclc(config, false, true, asc_device::asc_type::VASP);
1046
1047 M68030(config, m_maincpu, C32M);
1048 m_maincpu->set_addrmap(AS_PROGRAM, &mac_state::maclc3_map);
1049 m_maincpu->set_dasm_override(FUNC(mac_state::mac_dasm_override));
1050
1051 MCFG_VIDEO_START_OVERRIDE(mac_state,macv8)
1052 MCFG_VIDEO_RESET_OVERRIDE(mac_state,macrbv)
1053
1054 m_screen->set_screen_update(FUNC(mac_state::screen_update_macrbvvram));
1055
1056 add_nubus(config, false);
1057
1058 m_ram->set_default_size("4M");
1059 m_ram->set_extra_options("8M,12M,16M,20M,24M,28M,32M,36M,40M,44M,48M,52M,56M,60M,64M");
1060
1061 m_egret->set_type(EGRET_341S0851);
1062 }
1063
maciivi(machine_config & config)1064 void mac_state::maciivi(machine_config &config)
1065 {
1066 maciivx(config);
1067 m_maincpu->set_clock(C15M);
1068 }
1069
maciix(machine_config & config,bool nubus_bank1,bool nubus_bank2)1070 void mac_state::maciix(machine_config &config, bool nubus_bank1, bool nubus_bank2)
1071 {
1072 macii(config, false, asc_device::asc_type::ASC, true, nubus_bank1, nubus_bank2);
1073
1074 M68030(config, m_maincpu, C15M);
1075 m_maincpu->set_addrmap(AS_PROGRAM, &mac_state::macii_map);
1076 m_maincpu->set_dasm_override(FUNC(mac_state::mac_dasm_override));
1077
1078 m_ram->set_default_size("2M");
1079 m_ram->set_extra_options("8M,32M,64M,96M,128M");
1080 }
1081
maciicx(machine_config & config)1082 void mac_state::maciicx(machine_config &config) // IIcx is a IIx with only slots 9/a/b
1083 {
1084 maciix(config, true, false);
1085 }
1086
macse30(machine_config & config)1087 void mac_state::macse30(machine_config &config)
1088 {
1089 M68030(config, m_maincpu, C15M);
1090 m_maincpu->set_addrmap(AS_PROGRAM, &mac_state::macse30_map);
1091 m_maincpu->set_dasm_override(FUNC(mac_state::mac_dasm_override));
1092
1093 /* video hardware */
1094 SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
1095 m_screen->set_video_attributes(VIDEO_UPDATE_BEFORE_VBLANK);
1096 m_screen->set_refresh_hz(60.15);
1097 m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(1260));
1098 m_screen->set_size(MAC_H_TOTAL, MAC_V_TOTAL);
1099 m_screen->set_visarea(0, MAC_H_VIS-1, 0, MAC_V_VIS-1);
1100 m_screen->set_screen_update(FUNC(mac_state::screen_update_macse30));
1101 m_screen->set_palette(m_palette);
1102
1103 PALETTE(config, m_palette, palette_device::MONOCHROME_INVERTED);
1104
1105 MCFG_VIDEO_START_OVERRIDE(mac_state,mac)
1106
1107 add_base_devices(config, true, true);
1108 add_asc(config, asc_device::asc_type::ASC);
1109 add_scsi(config);
1110
1111 add_nubus_pds(config, "pds030", mac_pds030_cards);
1112
1113 add_via1_adb(config, false);
1114 add_via2(config);
1115
1116 MACADB(config, m_macadb, C15M);
1117 m_macadb->via_clock_callback().set(m_via1, FUNC(via6522_device::write_cb1));
1118 m_macadb->via_data_callback().set(m_via1, FUNC(via6522_device::write_cb2));
1119 m_macadb->adb_irq_callback().set(FUNC(mac_state::adb_irq_w));
1120
1121 RAM(config, m_ram);
1122 m_ram->set_default_size("2M");
1123 m_ram->set_extra_options("8M,16M,32M,48M,64M,96M,128M");
1124
1125 SOFTWARE_LIST(config, "flop35_list").set_original("mac_flop");
1126 }
1127
macclas2(machine_config & config)1128 void mac_state::macclas2(machine_config &config)
1129 {
1130 maclc(config, false, true, asc_device::asc_type::EAGLE);
1131
1132 M68030(config, m_maincpu, C15M);
1133 m_maincpu->set_addrmap(AS_PROGRAM, &mac_state::maclc_map);
1134 m_maincpu->set_dasm_override(FUNC(mac_state::mac_dasm_override));
1135
1136 MCFG_VIDEO_START_OVERRIDE(mac_state,macv8)
1137 MCFG_VIDEO_RESET_OVERRIDE(mac_state,maceagle)
1138
1139 m_screen->set_size(MAC_H_TOTAL, MAC_V_TOTAL);
1140 m_screen->set_visarea(0, MAC_H_VIS-1, 0, MAC_V_VIS-1);
1141 m_screen->set_screen_update(FUNC(mac_state::screen_update_macrbv));
1142
1143 m_asc->set_type(asc_device::asc_type::EAGLE);
1144
1145 m_ram->set_default_size("10M");
1146 m_ram->set_extra_options("2M,4M,6M,8M,10M");
1147
1148 m_egret->set_type(EGRET_341S0851);
1149 }
1150
maciici(machine_config & config)1151 void mac_state::maciici(machine_config &config)
1152 {
1153 macii(config, false, asc_device::asc_type::ASC, true, false, true);
1154
1155 M68030(config, m_maincpu, 25000000);
1156 m_maincpu->set_addrmap(AS_PROGRAM, &mac_state::maciici_map);
1157 m_maincpu->set_dasm_override(FUNC(mac_state::mac_dasm_override));
1158
1159 MCFG_VIDEO_START_OVERRIDE(mac_state,macrbv)
1160 MCFG_VIDEO_RESET_OVERRIDE(mac_state,macrbv)
1161
1162 SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
1163 m_screen->set_raw(25175000, 800, 0, 640, 525, 0, 480);
1164 m_screen->set_size(640, 870);
1165 m_screen->set_visarea(0, 640-1, 0, 480-1);
1166 m_screen->set_screen_update(FUNC(mac_state::screen_update_macrbv));
1167 m_screen->screen_vblank().set(FUNC(mac_state::mac_rbv_vbl));
1168 config.set_default_layout(layout_mac);
1169
1170 /* internal ram */
1171 m_ram->set_default_size("2M");
1172 m_ram->set_extra_options("4M,8M,16M,32M,48M,64M,128M");
1173 }
1174
maciisi(machine_config & config)1175 void mac_state::maciisi(machine_config &config)
1176 {
1177 macii(config, false, asc_device::asc_type::ASC, false);
1178
1179 M68030(config, m_maincpu, 20000000);
1180 m_maincpu->set_addrmap(AS_PROGRAM, &mac_state::maciici_map);
1181 m_maincpu->set_dasm_override(FUNC(mac_state::mac_dasm_override));
1182
1183 MCFG_VIDEO_START_OVERRIDE(mac_state,macrbv)
1184 MCFG_VIDEO_RESET_OVERRIDE(mac_state,macrbv)
1185
1186 SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
1187 m_screen->set_raw(25175000, 800, 0, 640, 525, 0, 480);
1188 m_screen->set_size(640, 870);
1189 m_screen->set_visarea(0, 640-1, 0, 480-1);
1190 m_screen->set_screen_update(FUNC(mac_state::screen_update_macrbv));
1191 m_screen->screen_vblank().set(FUNC(mac_state::mac_rbv_vbl));
1192 config.set_default_layout(layout_mac);
1193
1194 m_ram->set_default_size("2M");
1195 m_ram->set_extra_options("4M,8M,16M,32M,48M,64M,128M");
1196
1197 m_via1->writepb_handler().set(FUNC(mac_state::mac_via_out_b_egadb));
1198
1199 add_egret(config, EGRET_344S0100);
1200 }
1201
pwrmac(machine_config & config)1202 void mac_state::pwrmac(machine_config &config)
1203 {
1204 PPC601(config, m_maincpu, 60000000);
1205 m_maincpu->set_addrmap(AS_PROGRAM, &mac_state::pwrmac_map);
1206
1207 SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
1208 // dot clock, htotal, hstart, hend, vtotal, vstart, vend
1209 m_screen->set_raw(25175000, 800, 0, 640, 525, 0, 480);
1210 m_screen->set_video_attributes(VIDEO_UPDATE_BEFORE_VBLANK);
1211 m_screen->set_size(1024, 768);
1212 m_screen->set_visarea(0, 640-1, 0, 480-1);
1213 m_screen->set_screen_update(FUNC(mac_state::screen_update_macrbv));
1214
1215 PALETTE(config, m_palette).set_entries(256);
1216
1217 MCFG_VIDEO_START_OVERRIDE(mac_state,macsonora)
1218 MCFG_VIDEO_RESET_OVERRIDE(mac_state,macrbv)
1219
1220 SPEAKER(config, "lspeaker").front_left();
1221 SPEAKER(config, "rspeaker").front_right();
1222 AWACS(config, m_awacs, 44100);
1223 m_awacs->add_route(0, "lspeaker", 1.0);
1224 m_awacs->add_route(1, "rspeaker", 1.0);
1225
1226 add_scsi(config);
1227 add_base_devices(config, false, false);
1228
1229 add_via1_adb(config, false);
1230 m_via1->writepb_handler().set(FUNC(mac_state::mac_via_out_b_cdadb));
1231
1232 add_via2(config);
1233
1234 RAM(config, m_ram);
1235 m_ram->set_default_size("8M");
1236 m_ram->set_extra_options("16M,32M,64M,128M");
1237
1238 MACADB(config, m_macadb, C15M);
1239 add_cuda(config, CUDA_341S0060);
1240 }
1241
1242 static INPUT_PORTS_START( macadb )
1243 INPUT_PORTS_END
1244
1245 INPUT_PORTS_START( maciici )
1246 PORT_START("MONTYPE")
1247 PORT_CONFNAME(0x0f, 0x06, "Connected monitor")
1248 PORT_CONFSETTING( 0x01, "15\" Portrait Display (640x870)")
1249 PORT_CONFSETTING( 0x02, "12\" RGB (512x384)")
1250 PORT_CONFSETTING( 0x06, "13\" RGB (640x480)")
1251 INPUT_PORTS_END
1252
1253 /***************************************************************************
1254
1255 Game driver(s)
1256
1257 The Mac driver uses a convention of placing the BIOS in "bootrom"
1258
1259 ***************************************************************************/
1260
1261 ROM_START( maclc )
1262 ROM_REGION32_BE(0x100000, "bootrom", 0)
1263 ROM_LOAD("350eacf0.rom", 0x000000, 0x080000, CRC(71681726) SHA1(6bef5853ae736f3f06c2b4e79772f65910c3b7d4))
1264
1265 ROM_REGION(0x1100, "egret", 0)
1266 ROM_LOAD( "341s0851.bin", 0x000000, 0x001100, CRC(ea9ea6e4) SHA1(8b0dae3ec66cdddbf71567365d2c462688aeb571) )
1267 ROM_END
1268
1269 ROM_START( macii )
1270 ROM_REGION32_BE(0x40000, "bootrom", 0)
1271 ROM_SYSTEM_BIOS(0, "default", "rev. B")
1272 ROMX_LOAD( "9779d2c4.rom", 0x000000, 0x040000, CRC(4df6d054) SHA1(db6b504744281369794e26ba71a6e385cf6227fa), ROM_BIOS(0) )
1273 ROM_SYSTEM_BIOS(1, "original", "rev. A")
1274 ROMX_LOAD( "97851db6.rom", 0x000000, 0x040000, CRC(8c8b9d03) SHA1(5c264fe976f1e8495d364947c932a5e8309b4300), ROM_BIOS(1) )
1275 ROM_END
1276
1277 ROM_START( maciihmu )
1278 ROM_REGION32_BE(0x40000, "bootrom", 0)
1279 ROM_SYSTEM_BIOS(0, "default", "rev. B")
1280 ROMX_LOAD( "9779d2c4.rom", 0x000000, 0x040000, CRC(4df6d054) SHA1(db6b504744281369794e26ba71a6e385cf6227fa), ROM_BIOS(0) )
1281 ROM_SYSTEM_BIOS(1, "original", "rev. A")
1282 ROMX_LOAD( "97851db6.rom", 0x000000, 0x040000, CRC(8c8b9d03) SHA1(5c264fe976f1e8495d364947c932a5e8309b4300), ROM_BIOS(1) )
1283 ROM_END
1284
1285 ROM_START( mac2fdhd ) // same ROM for II FDHD, IIx, IIcx, and SE/30
1286 ROM_REGION32_BE(0x40000, "bootrom", 0)
1287 ROM_LOAD( "97221136.rom", 0x000000, 0x040000, CRC(ce3b966f) SHA1(753b94351d94c369616c2c87b19d568dc5e2764e) )
1288 ROM_END
1289
1290 ROM_START( maciix )
1291 ROM_REGION32_BE(0x40000, "bootrom", 0)
1292 ROM_LOAD( "97221136.rom", 0x000000, 0x040000, CRC(ce3b966f) SHA1(753b94351d94c369616c2c87b19d568dc5e2764e) )
1293 ROM_END
1294
1295 ROM_START( maciicx )
1296 ROM_REGION32_BE(0x40000, "bootrom", 0)
1297 ROM_LOAD( "97221136.rom", 0x000000, 0x040000, CRC(ce3b966f) SHA1(753b94351d94c369616c2c87b19d568dc5e2764e) )
1298 ROM_END
1299
1300 ROM_START( macse30 )
1301 ROM_REGION32_BE(0x40000, "bootrom", 0)
1302 ROM_LOAD( "97221136.rom", 0x000000, 0x040000, CRC(ce3b966f) SHA1(753b94351d94c369616c2c87b19d568dc5e2764e) )
1303
1304 ROM_REGION32_BE(0x2000, "se30vrom", 0)
1305 ROM_LOAD( "se30vrom.uk6", 0x000000, 0x002000, CRC(b74c3463) SHA1(584201cc67d9452b2488f7aaaf91619ed8ce8f03) )
1306 ROM_END
1307
1308 ROM_START( maciifx )
1309 ROM_REGION32_BE(0x80000, "bootrom", 0)
1310 ROM_LOAD( "4147dd77.rom", 0x000000, 0x080000, CRC(ef441bbd) SHA1(9fba3d4f672a630745d65788b1d1119afa2c6728) )
1311 ROM_END
1312
1313 ROM_START( maciici )
1314 ROM_REGION32_BE(0x80000, "bootrom", 0)
1315 ROM_LOAD32_BYTE( "341-0736.um12", 0x000000, 0x020000, CRC(7a1906e6) SHA1(3e39c80b52f40798502fcbdfc97b315545c4c4d3) )
1316 ROM_LOAD32_BYTE( "341-0735.um11", 0x000001, 0x020000, CRC(a8942189) SHA1(be9f653cab04c304d7ee8d4ec312c23ff5d47efc) )
1317 ROM_LOAD32_BYTE( "342-0734.um10", 0x000002, 0x020000, CRC(07f56402) SHA1(e11ca97181faf26cd0d05bd639d65998805c7822) )
1318 ROM_LOAD32_BYTE( "342-0733.um9", 0x000003, 0x020000, CRC(20c28451) SHA1(fecf849c9ac9717c18c13184e24a471888028e46) )
1319 ROM_END
1320
1321 ROM_START( maciisi )
1322 ROM_REGION32_BE(0x80000, "bootrom", 0)
1323 ROM_LOAD( "36b7fb6c.rom", 0x000000, 0x080000, CRC(f304d973) SHA1(f923de4125aae810796527ff6e25364cf1d54eec) )
1324 ROM_END
1325
1326 ROM_START( maciivx )
1327 ROM_REGION32_BE(0x100000, "bootrom", 0)
1328 ROM_LOAD( "4957eb49.rom", 0x000000, 0x100000, CRC(61be06e5) SHA1(560ce203d65178657ad09d03f532f86fa512bb40) )
1329 ROM_END
1330
1331 ROM_START( maciivi )
1332 ROM_REGION32_BE(0x100000, "bootrom", 0)
1333 ROM_LOAD( "4957eb49.rom", 0x000000, 0x100000, CRC(61be06e5) SHA1(560ce203d65178657ad09d03f532f86fa512bb40) )
1334 ROM_END
1335
1336 ROM_START( macclas2 )
1337 ROM_REGION32_BE(0x100000, "bootrom", 0) // 3193670e
1338 //ROM_LOAD( "3193670e.rom", 0x000000, 0x080000, CRC(96d2e1fd) SHA1(50df69c1b6e805e12a405dc610bc2a1471b2eac2) )
1339 ROM_LOAD32_BYTE( "341-0867__ba16__=c=apple_91.romhh.27c010.u25", 0x000000, 0x020000, CRC(88230887) SHA1(8f45f6d7eb6a8ec9242a46db4773af1d154409c6) )
1340 ROM_LOAD32_BYTE( "341-0866__5be9__=c=apple_91.rommh.27c010.u24", 0x000001, 0x020000, CRC(eae68c36) SHA1(e6ce79647dfe7e66590a012836d0b6e985ff672b) )
1341 ROM_LOAD32_BYTE( "341-0865__821e__=c=apple_91.romml.27c010.u23", 0x000002, 0x020000, CRC(cb306c01) SHA1(4d6e409995fd9a4aa9afda0fd790a5b09b1c2aca) )
1342 ROM_LOAD32_BYTE( "341-0864__6fc6__=c=apple_91.romll.27c010.u22", 0x000003, 0x020000, CRC(21a51e72) SHA1(bb513c1a5b8a41c7534d66aeacaeea47f58dae92) )
1343 ROM_END
1344
1345 ROM_START( maclc2 )
1346 ROM_REGION32_BE(0x100000, "bootrom", 0)
1347 ROM_LOAD32_BYTE( "341-0476_ue2-hh.bin", 0x000000, 0x020000, CRC(0c3b0ce4) SHA1(e4e8c883d7f2e002a3f7b7aefaa3840991e57025) )
1348 ROM_LOAD32_BYTE( "341-0475_ud2-mh.bin", 0x000001, 0x020000, CRC(7b013595) SHA1(0b82d8fac570270db9774f6254017d28611ae756) )
1349 ROM_LOAD32_BYTE( "341-0474_uc2-ml.bin", 0x000002, 0x020000, CRC(2ff2f52b) SHA1(876850df61d0233c1dd3c00d48d8d6690186b164) )
1350 ROM_LOAD32_BYTE( "341-0473_ub2-ll.bin", 0x000003, 0x020000, CRC(8843c37c) SHA1(bb5104110507ca543d106f11c6061245fd90c1a7) )
1351 ROM_END
1352
1353 ROM_START( maclc3 )
1354 ROM_REGION32_BE(0x100000, "bootrom", 0)
1355 ROM_LOAD( "ecbbc41c.rom", 0x000000, 0x100000, CRC(e578f5f3) SHA1(c77df3220c861f37a2c553b6ee9241b202dfdffc) )
1356 ROM_END
1357
1358 ROM_START( pmac6100 )
1359 ROM_REGION64_BE(0x400000, "bootrom", 0)
1360 ROM_LOAD( "9feb69b3.rom", 0x000000, 0x400000, CRC(a43fadbc) SHA1(6fac1c4e920a077c077b03902fef9199d5e8f2c3) )
1361 ROM_END
1362
1363 ROM_START( maccclas )
1364 ROM_REGION32_BE(0x100000, "bootrom", 0)
1365 ROM_LOAD( "ecd99dc0.rom", 0x000000, 0x100000, CRC(c84c3aa5) SHA1(fd9e852e2d77fe17287ba678709b9334d4d74f1e) )
1366 ROM_END
1367
1368 ROM_START( maclc520 )
1369 ROM_REGION32_BE(0x100000, "bootrom", 0)
1370 ROM_LOAD( "ede66cbd.rom", 0x000000, 0x100000, CRC(a893cb0f) SHA1(c54ee2f45020a4adeb7451adce04cd6e5fb69790) )
1371 ROM_END
1372
1373 /* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME */
1374 COMP( 1987, macii, 0, 0, macii, macadb, mac_state, init_macii, "Apple Computer", "Macintosh II", MACHINE_NOT_WORKING )
1375 COMP( 1987, maciihmu, macii, 0, maciihmu, macadb, mac_state, init_macii, "Apple Computer", "Macintosh II (w/o 68851 MMU)", MACHINE_NOT_WORKING )
1376 COMP( 1988, mac2fdhd, 0, 0, macii, macadb, mac_state, init_maciifdhd, "Apple Computer", "Macintosh II (FDHD)", MACHINE_NOT_WORKING )
1377 COMP( 1988, maciix, mac2fdhd, 0, maciix, macadb, mac_state, init_maciix, "Apple Computer", "Macintosh IIx", MACHINE_NOT_WORKING )
1378 COMP( 1989, macse30, mac2fdhd, 0, macse30, macadb, mac_state, init_macse30, "Apple Computer", "Macintosh SE/30", MACHINE_NOT_WORKING )
1379 COMP( 1989, maciicx, mac2fdhd, 0, maciicx, macadb, mac_state, init_maciicx, "Apple Computer", "Macintosh IIcx", MACHINE_NOT_WORKING )
1380 COMP( 1989, maciici, 0, 0, maciici, maciici, mac_state, init_maciici, "Apple Computer", "Macintosh IIci", MACHINE_NOT_WORKING )
1381 COMP( 1990, maciifx, 0, 0, maciifx, macadb, mac_state, init_maciifx, "Apple Computer", "Macintosh IIfx", MACHINE_NOT_WORKING )
1382 COMP( 1990, maclc, 0, 0, maclc, maciici, mac_state, init_maclc, "Apple Computer", "Macintosh LC", MACHINE_IMPERFECT_SOUND )
1383 COMP( 1990, maciisi, 0, 0, maciisi, maciici, mac_state, init_maciisi, "Apple Computer", "Macintosh IIsi", MACHINE_NOT_WORKING )
1384 COMP( 1991, macclas2, 0, 0, macclas2, macadb, mac_state, init_macclassic2, "Apple Computer", "Macintosh Classic II", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND )
1385 COMP( 1991, maclc2, 0, 0, maclc2, maciici, mac_state, init_maclc2, "Apple Computer", "Macintosh LC II", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND )
1386 COMP( 1993, maccclas, 0, 0, maccclas, macadb, mac_state, init_maclrcclassic, "Apple Computer", "Macintosh Color Classic", MACHINE_NOT_WORKING )
1387 COMP( 1993, maclc3, 0, 0, maclc3, maciici, mac_state, init_maclc3, "Apple Computer", "Macintosh LC III", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND )
1388 COMP( 1993, maciivx, 0, 0, maciivx, maciici, mac_state, init_maciivx, "Apple Computer", "Macintosh IIvx", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND )
1389 COMP( 1993, maciivi, maciivx, 0, maciivi, maciici, mac_state, init_maciivi, "Apple Computer", "Macintosh IIvi", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND )
1390 COMP( 1993, maclc520, 0, 0, maclc520, maciici, mac_state, init_maclc520, "Apple Computer", "Macintosh LC 520", MACHINE_NOT_WORKING )
1391 COMP( 1994, pmac6100, 0, 0, pwrmac, macadb, mac_state, init_macpm6100, "Apple Computer", "Power Macintosh 6100/60", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND )
1392