1 // license:BSD-3-Clause
2 // copyright-holders: Carl, R. Belmont, Wilbert Pol, Miodrag Milanovic
3 /***************************************************************************
4
5 mtouchxl.cpp: Merit Industries MegaTouch XL
6
7 Hardware includes a base 486 PC with VGA and a customized ISA I/O
8 card. The I/O card includes audio and an option ROM which patches int 19h
9 (POST Completed) to instead jump back to the option ROM which loads
10 "ROM-DOS", installs drivers for the Microtouch screen, and then boots
11 from the CD-ROM drive.
12
13 Audio is a CS4231 combination CODEC/Mixer also found in Gravis Ultraound MAX
14 and some SPARCstations.
15
16 Some boards use the DS1205 chip for security, others use the DS1991 iButton
17
18 Megatouch XL (Software) (* indicated verified dumps of CD + Boot ROM,
19 - means we have it working but would like a redump)
20 Megatouch XL (1997) (CD versions: R0, R0A, R0B, R0C, R0D, *R1, R2, R3, R3A, R3B, R3C)
21 Megatouch XL 5000 (1998) (CD versions: R5A, *R5B, R5D, *R5E, R5G, R5H, *R5I)
22 Megatouch XL 6000 (1999) (CD versions: *R02, *R04, R05, *R07)
23 Megatouch XL Gold (2000) (CD versions: *R00, *R01. HDD versions: R01)
24 Megatouch XL Platinum / Double Platinum (2001)
25 Megatouch XL Titanium / Titanium 2 (2002)
26
27 ***************************************************************************/
28
29 // use under construction modern PCI SiS 85c496/497 chipset
30 //#define REAL_PCI_CHIPSET
31
32 #include "emu.h"
33 #include "bus/ata/atapicdr.h"
34 #include "bus/ata/idehd.h"
35 #include "bus/isa/isa_cards.h"
36 #include "cpu/i386/i386.h"
37 #include "machine/at.h"
38 #include "machine/ram.h"
39 #include "machine/8042kbdc.h"
40 #include "machine/nvram.h"
41 #include "machine/ins8250.h"
42 #include "machine/microtch.h"
43 #include "machine/bankdev.h"
44 #include "machine/intelfsh.h"
45 #include "machine/ds128x.h"
46 #include "machine/ds1205.h"
47 #ifdef REAL_PCI_CHIPSET
48 #include "machine/sis85c496.h"
49 #endif
50 #include "sound/ad1848.h"
51 #include "speaker.h"
52
53 class mtxl_state : public driver_device
54 {
55 public:
mtxl_state(const machine_config & mconfig,device_type type,const char * tag)56 mtxl_state(const machine_config &mconfig, device_type type, const char *tag) :
57 driver_device(mconfig, type, tag),
58 m_maincpu(*this, "maincpu"),
59 #ifndef REAL_PCI_CHIPSET
60 m_mb(*this, "mb"),
61 #endif
62 m_ram(*this, RAM_TAG),
63 m_iocard(*this, "dbank"),
64 m_multikey(*this, "multikey")
65 { }
66
67 void at486(machine_config &config);
68 void at486hd(machine_config &config);
69
70 private:
71 required_device<cpu_device> m_maincpu;
72 #ifndef REAL_PCI_CHIPSET
73 required_device<at_mb_device> m_mb;
74 #endif
75 required_device<ram_device> m_ram;
76 required_device<address_map_bank_device> m_iocard;
77 optional_device<ds1205_device> m_multikey;
78 void machine_start() override;
79 void machine_reset() override;
80 uint8_t coin_r();
81 void bank_w(uint8_t data);
82 uint8_t key_r();
83 void key_w(uint8_t data);
84 static void cdrom(device_t *device);
85 static void hdd(device_t *device);
86 void at32_io(address_map &map);
87 void at32_map(address_map &map);
88 void dbank_map(address_map &map);
89 };
90
bank_w(uint8_t data)91 void mtxl_state::bank_w(uint8_t data)
92 {
93 m_iocard->set_bank(data & 0x1f);
94 }
95
key_r()96 uint8_t mtxl_state::key_r()
97 {
98 return m_multikey->read_dq() ? 0xff : 0xdf;
99 }
100
coin_r()101 uint8_t mtxl_state::coin_r()
102 {
103 return ioport("Coin")->read();
104 }
105
key_w(uint8_t data)106 void mtxl_state::key_w(uint8_t data)
107 {
108 m_multikey->write_rst((data & 0x40) ? ASSERT_LINE : CLEAR_LINE);
109 m_multikey->write_clk((data & 0x10) ? ASSERT_LINE : CLEAR_LINE);
110 m_multikey->write_dq((data & 0x20) ? ASSERT_LINE : CLEAR_LINE);
111 }
112
at32_map(address_map & map)113 void mtxl_state::at32_map(address_map &map)
114 {
115 map.unmap_value_high();
116 #ifndef REAL_PCI_CHIPSET
117 map(0x00000000, 0x0009ffff).bankrw("bank10");
118 map(0x000c8000, 0x000cffff).ram().share("nvram");
119 map(0x000d0000, 0x000dffff).m(m_iocard, FUNC(address_map_bank_device::amap32));
120 map(0x000e0000, 0x000fffff).rom().region("bios", 0);
121 map(0xfffe0000, 0xffffffff).rom().region("bios", 0);
122 #endif
123 }
124
at32_io(address_map & map)125 void mtxl_state::at32_io(address_map &map)
126 {
127 map.unmap_value_high();
128 #ifndef REAL_PCI_CHIPSET
129 map(0x0000, 0x001f).rw("mb:dma8237_1", FUNC(am9517a_device::read), FUNC(am9517a_device::write));
130 map(0x0020, 0x003f).rw("mb:pic8259_master", FUNC(pic8259_device::read), FUNC(pic8259_device::write));
131 map(0x0040, 0x005f).rw("mb:pit8254", FUNC(pit8254_device::read), FUNC(pit8254_device::write));
132 map(0x0060, 0x0067).rw("kbdc", FUNC(kbdc8042_device::data_r), FUNC(kbdc8042_device::data_w));
133 map(0x0061, 0x0061).rw("mb", FUNC(at_mb_device::portb_r), FUNC(at_mb_device::portb_w));
134 map(0x0070, 0x007f).rw("mb:rtc", FUNC(mc146818_device::read), FUNC(mc146818_device::write));
135 map(0x0080, 0x009f).rw("mb", FUNC(at_mb_device::page8_r), FUNC(at_mb_device::page8_w));
136 map(0x00a0, 0x00bf).rw("mb:pic8259_slave", FUNC(pic8259_device::read), FUNC(pic8259_device::write));
137 map(0x00c0, 0x00df).rw("mb:dma8237_2", FUNC(am9517a_device::read), FUNC(am9517a_device::write)).umask32(0x00ff00ff);
138 map(0x0224, 0x0227).rw("cs4231", FUNC(ad1848_device::read), FUNC(ad1848_device::write));
139 #endif
140 map(0x0228, 0x022b).portr("Unknown");
141 map(0x022f, 0x022f).w(FUNC(mtxl_state::bank_w));
142 map(0x022d, 0x022d).rw(FUNC(mtxl_state::key_r), FUNC(mtxl_state::key_w));
143 map(0x022c, 0x022c).r(FUNC(mtxl_state::coin_r));
144 #ifndef REAL_PCI_CHIPSET
145 map(0x03f8, 0x03ff).rw("ns16550", FUNC(ns16550_device::ins8250_r), FUNC(ns16550_device::ins8250_w));
146 #endif
147 }
148
dbank_map(address_map & map)149 void mtxl_state::dbank_map(address_map &map)
150 {
151 map(0x000000, 0x0fffff).rom().region("ioboard", 0);
152 map(0x100000, 0x17ffff).rw("flash", FUNC(intelfsh8_device::read), FUNC(intelfsh8_device::write));
153 }
154
155 static INPUT_PORTS_START(mtouchxl)
156 PORT_START("Coin")
157 PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_SERVICE1) PORT_NAME("Setup")
158 PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_SERVICE2) PORT_NAME("Calibrate")
159 PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_COIN1)
160 PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_COIN2)
161 PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_COIN3)
162 PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_COIN4)
163 PORT_BIT(0xc0, IP_ACTIVE_LOW, IPT_UNKNOWN)
164 PORT_START("Unknown")
165 PORT_BIT(0xffffffff, IP_ACTIVE_LOW, IPT_UNKNOWN)
166 INPUT_PORTS_END
167
168 /**********************************************************
169 *
170 * Init functions
171 *
172 *********************************************************/
173
machine_start()174 void mtxl_state::machine_start()
175 {
176 #ifndef REAL_PCI_CHIPSET
177 address_space& space = m_maincpu->space(AS_PROGRAM);
178
179 /* MESS managed RAM */
180 membank("bank10")->set_base(m_ram->pointer());
181
182 if (m_ram->size() > 0xa0000)
183 {
184 offs_t ram_limit = 0x100000 + m_ram->size() - 0xa0000;
185 space.install_read_bank(0x100000, ram_limit - 1, "bank1");
186 space.install_write_bank(0x100000, ram_limit - 1, "bank1");
187 membank("bank1")->set_base(m_ram->pointer() + 0xa0000);
188 }
189 #endif
190 }
191
machine_reset()192 void mtxl_state::machine_reset()
193 {
194 m_iocard->set_bank(0);
195 }
196
197 #ifndef REAL_PCI_CHIPSET
mt6k_ata_devices(device_slot_interface & device)198 static void mt6k_ata_devices(device_slot_interface &device)
199 {
200 device.option_add("cdrom", ATAPI_FIXED_CDROM);
201 device.option_add("hdd", IDE_HARDDISK);
202 }
203
cdrom(device_t * device)204 void mtxl_state::cdrom(device_t *device)
205 {
206 auto ide0 = dynamic_cast<device_slot_interface *>(device->subdevice("ide:0"));
207 ide0->option_reset();
208 mt6k_ata_devices(*ide0);
209 ide0->set_default_option("cdrom");
210 ide0->set_fixed(true);
211
212 auto ide1 = dynamic_cast<device_slot_interface *>(device->subdevice("ide:1"));
213 ide1->set_default_option("hdd");
214 ide1->set_fixed(true);
215 }
216
hdd(device_t * device)217 void mtxl_state::hdd(device_t *device)
218 {
219 auto ide0 = dynamic_cast<device_slot_interface *>(device->subdevice("ide:0"));
220 ide0->option_reset();
221 mt6k_ata_devices(*ide0);
222 ide0->set_default_option("hdd");
223 ide0->set_fixed(true);
224
225 auto ide1 = dynamic_cast<device_slot_interface *>(device->subdevice("ide:1"));
226 ide1->set_default_option("cdrom");
227 ide1->set_fixed(true);
228 }
229 #endif
230
at486(machine_config & config)231 void mtxl_state::at486(machine_config &config)
232 {
233 I486DX4(config, m_maincpu, 33000000);
234 m_maincpu->set_addrmap(AS_PROGRAM, &mtxl_state::at32_map);
235 m_maincpu->set_addrmap(AS_IO, &mtxl_state::at32_io);
236 #ifndef REAL_PCI_CHIPSET
237 m_maincpu->set_irq_acknowledge_callback("mb:pic8259_master", FUNC(pic8259_device::inta_cb));
238
239 AT_MB(config, "mb", 0);
240 NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
241
242 // on board devices
243 ISA16_SLOT(config, "board1", 0, "mb:isabus", pc_isa16_cards, "ide", true).set_option_machine_config("ide", cdrom); // FIXME: determine ISA bus clock
244 ISA16_SLOT(config, "isa1", 0, "mb:isabus", pc_isa16_cards, "svga_dm", true); // original is a gd-5440
245
246 ns16550_device &uart(NS16550(config, "ns16550", XTAL(1'843'200)));
247 uart.out_tx_callback().set("microtouch", FUNC(microtouch_device::rx));
248 uart.out_int_callback().set("mb:pic8259_master", FUNC(pic8259_device::ir4_w));
249
250 MICROTOUCH(config, "microtouch", 9600).stx().set(uart, FUNC(ins8250_uart_device::rx_w));
251
252 ad1848_device &cs4231(AD1848(config, "cs4231", 0));
253 cs4231.irq().set("mb:pic8259_master", FUNC(pic8259_device::ir5_w));
254 cs4231.drq().set("mb:dma8237_1", FUNC(am9517a_device::dreq1_w));
255
256 subdevice<am9517a_device>("mb:dma8237_1")->out_iow_callback<1>().set("cs4231", FUNC(ad1848_device::dack_w));
257
258 // remove the keyboard controller and use the HLE one which allow keys to be unmapped
259 config.device_remove("mb:keybc");
260 config.device_remove("mb:pc_kbdc");
261 kbdc8042_device &kbdc(KBDC8042(config, "kbdc"));
262 kbdc.set_keyboard_type(kbdc8042_device::KBDC8042_STANDARD);
263 kbdc.system_reset_callback().set_inputline(m_maincpu, INPUT_LINE_RESET);
264 kbdc.gate_a20_callback().set_inputline(m_maincpu, INPUT_LINE_A20);
265 kbdc.input_buffer_full_callback().set("mb:pic8259_master", FUNC(pic8259_device::ir1_w));
266
267 ds12885_device &rtc(DS12885(config.replace(), "mb:rtc"));
268 rtc.irq().set("mb:pic8259_slave", FUNC(pic8259_device::ir0_w));
269 rtc.set_century_index(0x32);
270 #endif
271 /* internal ram */
272 RAM(config, RAM_TAG).set_default_size("32M"); // Early XL games had 8 MB RAM, 6000 and later require 32MB
273
274 /* bankdev for dxxxx */
275 ADDRESS_MAP_BANK(config, "dbank").set_map(&mtxl_state::dbank_map).set_options(ENDIANNESS_LITTLE, 32, 32, 0x10000);
276
277 /* Flash ROM */
278 AMD_29F040(config, "flash");
279
280 /* Security key */
281 DS1205(config, "multikey");
282
283 #ifdef REAL_PCI_CHIPSET
284 /* PCI root */
285 PCI_ROOT(config, ":pci");
286 // FIXME: This MCFG fragment does not compile. -R
287 //MCFG_SIS85C496_ADD(":pci:05.0", ":maincpu", 32*1024*1024)
288 #endif
289 }
290
at486hd(machine_config & config)291 void mtxl_state::at486hd(machine_config &config)
292 {
293 I486DX4(config, m_maincpu, 33000000);
294 m_maincpu->set_addrmap(AS_PROGRAM, &mtxl_state::at32_map);
295 m_maincpu->set_addrmap(AS_IO, &mtxl_state::at32_io);
296 #ifndef REAL_PCI_CHIPSET
297 m_maincpu->set_irq_acknowledge_callback("mb:pic8259_master", FUNC(pic8259_device::inta_cb));
298
299 AT_MB(config, "mb", 0);
300 NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
301
302 // on board devices
303 ISA16_SLOT(config, "board1", 0, "mb:isabus", pc_isa16_cards, "ide", true).set_option_machine_config("ide", hdd); // FIXME: determine ISA bus clock
304 ISA16_SLOT(config, "isa1", 0, "mb:isabus", pc_isa16_cards, "svga_dm", true); // original is a gd-5440
305
306 ns16550_device &uart(NS16550(config, "ns16550", XTAL(1'843'200)));
307 uart.out_tx_callback().set("microtouch", FUNC(microtouch_device::rx));
308 uart.out_int_callback().set("mb:pic8259_master", FUNC(pic8259_device::ir4_w));
309
310 MICROTOUCH(config, "microtouch", 9600).stx().set(uart, FUNC(ins8250_uart_device::rx_w));
311
312 ad1848_device &cs4231(AD1848(config, "cs4231", 0));
313 cs4231.irq().set("mb:pic8259_master", FUNC(pic8259_device::ir5_w));
314 cs4231.drq().set("mb:dma8237_1", FUNC(am9517a_device::dreq1_w));
315
316 subdevice<am9517a_device>("mb:dma8237_1")->out_iow_callback<1>().set("cs4231", FUNC(ad1848_device::dack_w));
317
318 // remove the keyboard controller and use the HLE one which allow keys to be unmapped
319 config.device_remove("mb:keybc");
320 config.device_remove("mb:pc_kbdc");
321 kbdc8042_device &kbdc(KBDC8042(config, "kbdc"));
322 kbdc.set_keyboard_type(kbdc8042_device::KBDC8042_STANDARD);
323 kbdc.system_reset_callback().set_inputline(m_maincpu, INPUT_LINE_RESET);
324 kbdc.gate_a20_callback().set_inputline(m_maincpu, INPUT_LINE_A20);
325 kbdc.input_buffer_full_callback().set("mb:pic8259_master", FUNC(pic8259_device::ir1_w));
326
327 ds12885_device &rtc(DS12885(config.replace(), "mb:rtc"));
328 rtc.irq().set("mb:pic8259_slave", FUNC(pic8259_device::ir0_w));
329 rtc.set_century_index(0x32);
330 #endif
331 /* internal ram */
332 RAM(config, RAM_TAG).set_default_size("32M"); // Early XL games had 8 MB RAM, 6000 and later require 32MB
333
334 /* bankdev for dxxxx */
335 ADDRESS_MAP_BANK(config, "dbank").set_map(&mtxl_state::dbank_map).set_options(ENDIANNESS_LITTLE, 32, 32, 0x10000);
336
337 /* Flash ROM */
338 AMD_29F040(config, "flash");
339
340 /* Security key */
341 DS1205(config, "multikey");
342
343 #ifdef REAL_PCI_CHIPSET
344 /* PCI root */
345 PCI_ROOT(config, ":pci");
346 // FIXME: This MCFG fragment does not compile. -R
347 //MCFG_SIS85C496_ADD(":pci:05.0", ":maincpu", 32*1024*1024)
348 #endif
349 }
350
351 #ifdef REAL_PCI_CHIPSET
352 #define MOTHERBOARD_ROMS \
353 ROM_REGION32_LE(0x20000, ":pci:05.0", 0) \
354 ROM_LOAD( "094572516 bios - 486.bin", 0x000000, 0x020000, CRC(1c0b3ba0) SHA1(ff86dd6e476405e716ac7a4de4a216d2d2b49f15))
355 #else
356 #define MOTHERBOARD_ROMS \
357 ROM_REGION32_LE(0x20000, "bios", 0) \
358 ROM_LOAD("prom.mb", 0x10000, 0x10000, BAD_DUMP CRC(e44bfd3c) SHA1(c07ec94e11efa30e001f39560010112f73cc0016) ) \
359 ROM_REGION(0x80, "mb:rtc", 0) \
360 ROM_LOAD("mb_rtc", 0, 0x80, BAD_DUMP CRC(b724e5d3) SHA1(45a19ec4201d2933d033689b7a01a0260962fb0b))
361 #endif
362
363 ROM_START( mtouchxl )
364 MOTHERBOARD_ROMS
365
366 ROM_REGION32_LE(0x100000, "ioboard", 0)
367 ROM_LOAD( "sa3014-03_u12-r3", 0x000000, 0x100000, CRC(5a14b68a) SHA1(351a3ae14c335ac0b52e6f4976f9819c11a668f9) )
368
369 ROM_REGION(192, "multikey", ROMREGION_ERASE00)
370 ROM_LOAD( "multikey", 0x000000, 0x0000c0, BAD_DUMP CRC(2bdaf557) SHA1(be7f5cab5b6565f7bf8066282cfe3b42c7d7b7fd) )
371
372 DISK_REGION("board1:ide:ide:0:cdrom")
373 DISK_IMAGE_READONLY("r1", 0, SHA1(874545bfc48eacba4c4887d1c45a40ebc7da456a))
374 ROM_END
375
376 ROM_START( mtchxl5k )
377 MOTHERBOARD_ROMS
378
379 ROM_REGION32_LE(0x100000, "ioboard", 0)
380 ROM_LOAD( "sa3014-03_u12-r3", 0x000000, 0x100000, CRC(5a14b68a) SHA1(351a3ae14c335ac0b52e6f4976f9819c11a668f9) )
381
382 ROM_REGION(192, "multikey", ROMREGION_ERASE00)
383 ROM_LOAD( "multikey", 0x000000, 0x0000c0, BAD_DUMP CRC(32cd3bab) SHA1(b31f05c3819c74a29a46bbcf4de3722bae874df2) )
384
385 DISK_REGION("board1:ide:ide:0:cdrom")
386 DISK_IMAGE_READONLY("r5i", 0, SHA1(e776a842b557f402e179862397b2ded5cf926702))
387 ROM_END
388
389 ROM_START( mtchxl5ko )
390 MOTHERBOARD_ROMS
391
392 ROM_REGION32_LE(0x100000, "ioboard", 0)
393 ROM_LOAD( "sa3014-03_u12-r3", 0x000000, 0x100000, CRC(5a14b68a) SHA1(351a3ae14c335ac0b52e6f4976f9819c11a668f9) )
394
395 ROM_REGION(192, "multikey", ROMREGION_ERASE00)
396 ROM_LOAD( "multikey", 0x000000, 0x0000c0, BAD_DUMP CRC(32cd3bab) SHA1(b31f05c3819c74a29a46bbcf4de3722bae874df2) )
397
398 DISK_REGION("board1:ide:ide:0:cdrom")
399 DISK_IMAGE_READONLY("r5b", 0, SHA1(37c2562053f0f4ed18c72a8ea04be371a6ac8413))
400 ROM_END
401
402 ROM_START( mtchxl5ko2 )
403 MOTHERBOARD_ROMS
404
405 ROM_REGION32_LE(0x100000, "ioboard", 0)
406 ROM_LOAD( "sa3014-03_u12-r3", 0x000000, 0x100000, CRC(5a14b68a) SHA1(351a3ae14c335ac0b52e6f4976f9819c11a668f9) )
407
408 ROM_REGION(192, "multikey", ROMREGION_ERASE00)
409 ROM_LOAD( "multikey", 0x000000, 0x0000c0, BAD_DUMP CRC(32cd3bab) SHA1(b31f05c3819c74a29a46bbcf4de3722bae874df2) )
410
411 DISK_REGION("board1:ide:ide:0:cdrom")
412 DISK_IMAGE_READONLY("r5e", 0, SHA1(a07dc6da346bee999f822a3517ea1d65a68dd4a2))
413 ROM_END
414
415 ROM_START( mtchxl6k )
416 MOTHERBOARD_ROMS
417
418 ROM_REGION32_LE(0x100000, "ioboard", 0)
419 ROM_LOAD( "sa3014-04_u12-r00.u12", 0x000000, 0x100000, CRC(2a6fbca4) SHA1(186eb052cb9b77ffe6ee4cb50c1b580532fd8f47) )
420
421 ROM_REGION(192, "multikey", 0)
422 ROM_LOAD( "multikey", 0, 192, BAD_DUMP CRC(d54ed86c) SHA1(83557dc604b2c7e8ab0787a3c3d73e1fb2556515) ) // hand made
423
424 DISK_REGION("board1:ide:ide:0:cdrom")
425 DISK_IMAGE_READONLY("r07", 0, SHA1(95599e181d9249db09464420522180d753857f3b))
426 ROM_END
427
428 ROM_START( mtchxl6ko4 )
429 MOTHERBOARD_ROMS
430
431 ROM_REGION32_LE(0x100000, "ioboard", 0)
432 ROM_LOAD( "sa3014-04_u12-r00.u12", 0x000000, 0x100000, CRC(2a6fbca4) SHA1(186eb052cb9b77ffe6ee4cb50c1b580532fd8f47) )
433
434 ROM_REGION(192, "multikey", 0)
435 ROM_LOAD( "multikey", 0, 192, BAD_DUMP CRC(d54ed86c) SHA1(83557dc604b2c7e8ab0787a3c3d73e1fb2556515) ) // hand made
436
437 DISK_REGION("board1:ide:ide:0:cdrom")
438 DISK_IMAGE_READONLY("r04", 0, SHA1(c4a40bb84de4a54fd4ee6f5d2179a1cb9fac2b09))
439 ROM_END
440
441 ROM_START( mtchxl6ko )
442 MOTHERBOARD_ROMS
443
444 ROM_REGION32_LE(0x100000, "ioboard", 0)
445 ROM_LOAD( "sa3014-04_u12-r00.u12", 0x000000, 0x100000, CRC(2a6fbca4) SHA1(186eb052cb9b77ffe6ee4cb50c1b580532fd8f47) )
446
447 ROM_REGION(192, "multikey", 0)
448 ROM_LOAD( "multikey", 0, 192, BAD_DUMP CRC(d54ed86c) SHA1(83557dc604b2c7e8ab0787a3c3d73e1fb2556515) ) // hand made
449
450 DISK_REGION("board1:ide:ide:0:cdrom")
451 DISK_IMAGE_READONLY("r02", 0, SHA1(eaaf26d2b700f16138090de7f372b40b93e8dba9))
452 ROM_END
453
454 ROM_START( mtchxlgld )
455 MOTHERBOARD_ROMS
456
457 ROM_REGION32_LE(0x100000, "ioboard", 0)
458 ROM_LOAD( "sa3014-04_u12-r00.u12", 0x000000, 0x100000, CRC(2a6fbca4) SHA1(186eb052cb9b77ffe6ee4cb50c1b580532fd8f47) )
459
460 ROM_REGION(0x8000, "nvram", 0)
461 ROM_LOAD( "u12-nvram-ds1235", 0x000000, 0x008000, CRC(b3b5379d) SHA1(91b3d8b7eb2df127ba35700317aa1aac14e49bb9) )
462
463 ROM_REGION(192, "multikey", ROMREGION_ERASE00)
464 ROM_LOAD( "multikey", 0x000000, 0x0000c0, BAD_DUMP CRC(b7c85d00) SHA1(c91dcafd8138d504acdc6ce9621f6cc3119cdb67) )
465
466 DISK_REGION("board1:ide:ide:0:cdrom")
467 DISK_IMAGE_READONLY("r01", 0, SHA1(9946bb14d3f77eadbbc606ca9c79f233e402189b))
468 ROM_END
469
470 ROM_START( mtchxlgldo )
471 MOTHERBOARD_ROMS
472
473 ROM_REGION32_LE(0x100000, "ioboard", 0)
474 ROM_LOAD( "sa3014-04_u12-r00.u12", 0x000000, 0x100000, CRC(2a6fbca4) SHA1(186eb052cb9b77ffe6ee4cb50c1b580532fd8f47) )
475
476 ROM_REGION(0x8000, "nvram", 0)
477 ROM_LOAD( "u12-nvram-ds1235", 0x000000, 0x008000, CRC(b3b5379d) SHA1(91b3d8b7eb2df127ba35700317aa1aac14e49bb9) )
478
479 ROM_REGION(192, "multikey", ROMREGION_ERASE00)
480 ROM_LOAD( "multikey", 0x000000, 0x0000c0, BAD_DUMP CRC(b7c85d00) SHA1(c91dcafd8138d504acdc6ce9621f6cc3119cdb67) )
481
482 DISK_REGION("board1:ide:ide:0:cdrom")
483 DISK_IMAGE_READONLY("r00", 0, SHA1(635e267f1abea060ce813eb7e78b88d57ea3f951))
484 ROM_END
485
486 ROM_START( mtchxlti )
487 MOTHERBOARD_ROMS
488
489 ROM_REGION32_LE(0x100000, "ioboard", ROMREGION_ERASE00)
490
491 ROM_REGION(0x8000, "nvram", ROMREGION_ERASE00)
492
493 ROM_REGION(192, "multikey", ROMREGION_ERASE00)
494
495 DISK_REGION("board1:ide:ide:0:hdd")
496 DISK_IMAGE_READONLY("r00", 0, SHA1(8e9a2f9e670f02139cee11b7e8f758639d8b2838))
497 ROM_END
498
499 /***************************************************************************
500
501 Game driver(s)
502
503 ***************************************************************************/
504
505 /* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME */
506 // Any indicates this is from a CD-R at a trade show that was claimed to be a prototype, but R1 is several versions in?
507 COMP( 1997, mtouchxl, 0, 0, at486, mtouchxl, mtxl_state, empty_init, "Merit Industries", "MegaTouch XL (Version R1, prototype?)", 0 )
508 COMP( 1998, mtchxl5k, 0, 0, at486, mtouchxl, mtxl_state, empty_init, "Merit Industries", "MegaTouch XL Super 5000 (Version R5I)", MACHINE_NOT_WORKING )
509 COMP( 1998, mtchxl5ko, mtchxl5k, 0, at486, mtouchxl, mtxl_state, empty_init, "Merit Industries", "MegaTouch XL Super 5000 (Version R5B)", MACHINE_NOT_WORKING )
510 COMP( 1998, mtchxl5ko2, mtchxl5k, 0, at486, mtouchxl, mtxl_state, empty_init, "Merit Industries", "MegaTouch XL Super 5000 (Version R5E)", MACHINE_NOT_WORKING )
511 COMP( 1999, mtchxl6k, 0, 0, at486, mtouchxl, mtxl_state, empty_init, "Merit Industries", "MegaTouch XL 6000 (Version r07)", 0 )
512 COMP( 1999, mtchxl6ko4, mtchxl6k, 0, at486, mtouchxl, mtxl_state, empty_init, "Merit Industries", "MegaTouch XL 6000 (Version r04)", 0 )
513 COMP( 1999, mtchxl6ko, mtchxl6k, 0, at486, mtouchxl, mtxl_state, empty_init, "Merit Industries", "MegaTouch XL 6000 (Version r02)", 0 )
514 COMP( 2000, mtchxlgld, 0, 0, at486, mtouchxl, mtxl_state, empty_init, "Merit Industries", "MegaTouch XL Gold (Version r01)", MACHINE_NOT_WORKING )
515 COMP( 2000, mtchxlgldo, mtchxlgld, 0, at486, mtouchxl, mtxl_state, empty_init, "Merit Industries", "MegaTouch XL Gold (Version r00)", MACHINE_NOT_WORKING )
516 // this is a cracked operator bootleg, but the original files exist on the disk and could be replaced to create an imperfect non-cracked dump
517 COMP( 2002, mtchxlti, 0, 0, at486hd, mtouchxl, mtxl_state, empty_init, "bootleg", "MegaTouch XL Titanium (Version r0?, cracked)", MACHINE_NOT_WORKING )
518