1 // license:LGPL-2.1+
2 // copyright-holders:Angelo Salese
3 /***************************************************************************
4 
5     Nintendo Super System
6 
7     driver by Angelo Salese, based off info from Noca$h
8 
9     TODO:
10     - EEPROM doesn't save?
11     - Fix sound CPU halt / reset lines, particularly needed by this to work
12       correctly;
13     - Fix continue behaviour, might be the same issue as the one above.
14     - Various M50458 bits
15     - OSD should actually super-impose with the SNES video somehow;
16 
17     Notes:
18     - Multi-Cart BIOS works only with F-Zero, Super Tennis and Super Mario
19       World;
20 
21 ***************************************************************************
22 
23 Nintendo Super System Hardware Overview
24 Nintendo, 1991/1992
25 
26 This system is basically a Super Nintendo with a timer.
27 The main board has 3 slots on it and can accept up to 3 plug-in carts. The player
28 can choose to play any of the available games, although I'm not sure why anyone
29 would have wanted to pay money to play these games when the home SNES was selling
30 well and most kids had one.... possibly one of the reasons it failed in the arcades.
31 The control panel was also just some SNES pads mounted into the arcade machine
32 control panel.... not very usable as-is, very cheaply presented and probably
33 another reason why it failed in the arcades.
34 
35 PCB Layouts
36 -----------
37 NSS-01-CPU MADE IN JAPAN
38 (C) 1991 Nintendo
39 |----------------------------------------------------|
40 |           HA13001             AN5836               |
41 |     SL4          SL2  CL2          SL3             |
42 |-|                CL1  SL1                          |
43   |         |--------------|                         |
44 |-|        14.31818MHz     |         SL5             |
45 |           |    M50458    |                         |
46 |   IR3P32A |              |          |-|  |-|  |-|  |
47 |J          | VC1          |          | |  | |  | |  |
48 |A          |              |          | |  | |  | |  |
49 |M          |     CN6      |          | |  | |  | |  |
50 |M          |-------------21.4772MHz  | |  | |  | |  |
51 |A             |-------|   |-------|  | |  | |  | |  |
52 |      84256   |S-PPU1 |   |S-CPU  |  | |  | |  | |  |
53 |              |5C77-01|   |5A22-02|  | |  | |  | |  |
54 |-|            |-------|   |-------|  | |  | |  | |  |
55   |                                   | |  | |  | |  |
56 |-|            |-------|   |-------|  | |  | |  | |  |
57 |      84256   |S-PPU2 |   |S-WRAM |  | |  | |  | |  |
58 |CN4           |5C78-01|   |LH68120|  | |  | |  | |  |
59 |              |-------|   |-------|  | |  | |  | |  |
60 |                                     | |  | |  | |  |
61 |                                     | |  | |  | |  |
62 |CN3                                  | |  | |  | |  |
63 |                                     | |  | |  | |  |
64 |                             4MHz    |-|  |-|  |-|  |
65 |                                    CN11 CN12  CN13 |
66 |                             Z84C0006               |
67 |CN5                                      LH5168     |
68 |                                                    |
69 |                M6M80011                            |
70 |                                                    |
71 |                               S-3520               |
72 |CN2                       32.678kHz   *MM1026       |
73 |                               5.5V    NSS-C_IC14_02|
74 |----------------------------------------------------|
75 Notes:
76       The main board has many surface mounted logic chips and transistors on the solder side of the PCB
77       which are not documented here. The parts side comprises mainly RAM and custom Nintendo ICs
78 
79       IR3P32A       - Sharp IR3P32A Special Function TV Interface Circuit, Conversion of color diff sig. & lumin. to RGB (NDIP30)
80       M50458        - Mitsubishi M50458-001SP On-Screen Display (OSD) Chip (NDIP32). Clock signal 14.31818MHz on pins 28 and 29
81       VC1           - Potentiometer connected to M50458. Turning the pot changes the horizontal width of the OSD menu towards the right
82                       side only. The left edge of the OSD menu does not move. So this is a right horizontal stretch adjustment pot.
83       HA13001       - Hitachi Dual 5.5W Power Amplifier IC
84       AN5836        - Matsushita AN5836 DC Volume and Tone Control IC (SIL12)
85       84256         - Fujitsu MB84256-10L 32k x8 SRAM (SOP28)
86       LH5168        - Sharp LH5168N-10L 8k x8 SRAM (SOP28)
87       Z84C0006      - Zilog Z84C0006FEC Z80 CPU, clock input 4.000MHz (QFP44)
88       M6M80011      - Mitsubishi M6M80011 64 x16 Serial EEPROM (DIP8). Pinout..... 1 CS, 2 CLK, 3 DATA IN, 4 DATA OUT, 5 VSS, 6 RESET, 7 RDY, 8 VCC
89       S-3520        - Seiko Epson S-3520 Real Time Clock (SOIC14)
90       5.5V          - 5.5 volt supercap
91       MM1026        - Mitsumi Monolithic MM1026BF System Reset IC with Battery Backup (SOIC8)
92                       * This IC is located on the solder side of the PCB
93       VSync         - 60.0980Hz
94       HSync         - 15.3844kHz
95       NSS-C_IC14_02 - 27C256 EPROM (BIOS, DIP28)
96       CN11/12/13    - 50 pin connectors for game carts
97       CN2           - 10 pin connector
98       CN3           - 13 pin connector
99       CN4           - 8 pin connector
100       CN5           - 7 pin connector
101       CN6           - 24 pin connector for plug in custom sound module
102       Custom IC's   - S-CPU (QFP100)
103                       S-PPU1 (QFP100)
104                       S-PPU2 (QFP100)
105                       S-WRAM (SOP64)
106       SL* / CL*       - Jumper pads
107                       SL1 open
108                       SL2 open
109                       SL3 open
110                       SL4 open
111                       SL5 shorted
112                       CL1 shorted
113                       CL2 shorted
114 
115 Custom Sound Module (plugs into CN6)
116 ------------------------------------
117 Note - This board is encased in a metal shield which is soldered together.
118 
119 MITSUMI ELEC CO. LTD.
120 (C) 1990 Nintendo Co. Ltd.
121 |-----------------------|
122 |  CN1                  |
123 |            JRC2904    |---|
124 |  |-------|                |
125 |  |S-SMP  |                |
126 |  |       |  D6376         |
127 |  |-------|         51832  |
128 |                           |
129 |  |-------|                |
130 |  |S-DSP  |                |
131 |  |       |     51832      |
132 |  |-------|                |
133 |---|                       |
134     |                       |
135     |-----------------------|
136 Notes:
137       Note: Without this PCB, the board will boot up and work, displaying the game
138       selection menu, but once the game tries to load attract mode, the PCB resets.
139 
140       JRC2904 - Japan Radio Co. JRC2904 Dual Low Power Op Amp (SOIC8)
141       D6376   - NEC D6376 Audio 2-Channel 16-Bit D/A Converter (SOIC16)
142       51832   - Toshiba TC51832FL-12 32k x8 SRAM (SOP28)
143       CN1     - 24 pin connector to plug in custom sound module to main board
144       S-SMP   - Stamped 'Nintendo S-SMP (M) SONY (C) Nintendo '89' custom sound chip (QFP80)
145       S-DSP   - Stamped 'Nintendo S-DSP (M) (C) SONY '89' custom sound DSP (QFP80)
146 
147 Game Carts
148 ----------
149 There are 3 types of carts. The carts have only a few components on them, including some
150 ROMs/sockets, a few logic chips/resistors/caps, a DIPSW8 block, one unknown DIP8 chip
151 (with it's surface scratched) and some solder-jumper pads to config the ROM types.
152 The unknown DIP8 chip is different per game also. There is a sticker on top with a 2-digit
153 game code (I.E. MW/AT/L3 etc). The unknown DIP8 chip is used for protection.
154 
155 NSS-01-ROM-A
156 |-------------------------------------------------------|
157 |     SL3  CL1                                          |
158 |     CL3  SL1  IC1_PRG_ROM     IC3_INST_ROM       IC4  |
159 |CL4  SL2  SL5                                          |
160 |SL4  CL2  CL5                                          |
161 |--|                                                 |--|
162    |-------------------------------------------------|
163 Notes:
164       IC1 - Program ROM
165       IC2 - Instruction ROM
166       IC4 - Unknown DIP8 chip
167 
168 Game Name            IC1             IC1 Type    IC3            IC3 Type    Jumpers
169 -------------------------------------------------------------------------------------------------------
170 Super Mario World    NSS-MW-0_PRG    LH534J      NSS-R_IC3_MW   27C256      CL1 CL2 CL3 CL4 CL5 - Short
171                                                                             SL1 SL2 SL3 SL4 SL5 - Open
172 Super Mario World    NSS-R__IC1__MW  ?LH534J?    NSS-R_IC3_MW   27C256      CL1 CL2 CL3 CL4 CL5 - Short
173                                                                             SL1 SL2 SL3 SL4 SL5 - Open
174 Super Tennis         NSS-ST-0        LH534J      NSS-R_IC3_ST   27C256      CL1 CL2 CL3 CL4 CL5 - Short
175                                                                             SL1 SL2 SL3 SL4 SL5 - Open
176 Super Soccer         NSS-R__IC1__FS  TC574000    NSS-R_IC3_FS   27C256      CL1 CL2 CL3 CL4 CL5 - Open
177                                                                             SL1 SL2 SL3 SL4 SL5 - Short
178 -------------------------------------------------------------------------------------------------------
179 Note - By setting the jumpers to 'Super Soccer', the other 2 games can use standard EPROMs if required.
180 
181 LH534J is a 512k x 8-bit (4MBit) MaskROM with a non-standard pinout.
182 An adapter can be made easily to read them as a 27C040.
183 
184   Sharp LH534J           Common 27C040
185     +--\/--+               +--\/--+
186 A17 |1   32| +5V       VPP |1   32| +5V
187 A18 |2   31| /OE       A16 |2   31| A18
188 A15 |3   30| NC        A15 |3   30| A17
189 A12 |4   29| A14       A12 |4   29| A14
190  A7 |5   28| A13       A7  |5   28| A13
191  A6 |6   27| A8        A6  |6   27| A8
192  A5 |7   26| A9        A5  |7   26| A9
193  A4 |8   25| A11       A4  |8   25| A11
194  A3 |9   24| A16       A3  |9   24| OE/
195  A2 |10  23| A10       A2  |10  23| A10
196  A1 |11  22| /CE       A1  |11  22| CE/,PGM/
197  A0 |12  21| D7        A0  |12  21| D7
198  D0 |13  20| D6        D0  |13  20| D6
199  D1 |14  19| D5        D1  |14  19| D5
200  D2 |15  18| D4        D2  |15  18| D4
201 GND |16  17| D3        GND |16  17| D3
202     +------+               +------+
203 
204 NSS-01-ROM-B
205 |-------------------------------------------------------|
206 |  BAT1  SL3 CL1 CL2 SL5 CL6 CL7                        |
207 |        CL3 SL1 SL2 CL5 SL6 SL7                        |
208 |                 CL4 SL4                               |
209 |                   IC1                                 |
210 |                                                       |
211 |                                                       |
212 |                   IC2_PRG_ROM      IC7_INST_ROM  IC9  |
213 |                                                       |
214 |                                                       |
215 |--|                                                 |--|
216    |-------------------------------------------------|
217 Notes:
218       Battery is populated on this board, type CR2032 3V coin battery
219       IC1 - LH5168 8k x8 SRAM (DIP28)
220       IC2 - Program ROM
221       IC7 - Instruction ROM
222       IC9 - Unknown DIP8 chip
223 
224 Game Name            IC2             IC2 Type    IC7            IC7 Type    Jumpers
225 ---------------------------------------------------------------------------------------------------------------
226 F-Zero               NSS-FZ-0        LH534J      NSS-R_IC3_FZ   27C256      CL1 CL2 CL3 CL4 CL5 CL6 CL7 - Short
227                                                                             SL1 SL2 SL3 SL4 SL5 SL6 SL7 - Open
228 ---------------------------------------------------------------------------------------------------------------
229 
230 NSS-01-ROM-C
231 |-------------------------------------------------------|
232 |  BAT1 CL19 SL22   IC1_SRAM                    DIPSW8  |
233 |       CL18 SL21                                       |
234 |       CL17 SL20                                       |
235 |       CL15 SL16   IC2_PRG_ROM-1                       |
236 |       SL12                                            |
237 |       CL13 SL14                                       |
238 |       CL5  SL11                                       |
239 |       CL6  SL10   IC3_PRG_ROM-0    IC8_INST_ROM  IC10 |
240 |       CL3  SL9                                        |
241 |       CL4  SL8                                        |
242 |   SL1 CL2  SL7                                        |
243 |--|                                                 |--|
244    |-------------------------------------------------|
245 Notes:
246       Battery is not populated on this board for any games
247       IC1   - 6116 2k x8 SRAM, not populated (DIP24)
248       IC2/3 - Program ROM
249       IC8   - Instruction ROM
250       IC10  - Unknown DIP8 chip
251 
252 Game Name       IC2            IC2 Type   IC3            IC3 Type    IC8            IC8 Type    Jumpers
253 ---------------------------------------------------------------------------------------------------------------------------------------------------------
254 Actraiser       NSS-R_IC2_AR   TC574000   NSS-R_IC3_AR   TC574000    NSS-R_IC8_AR   27C256      CL2 CL3 CL4 CL5 CL6 CL12 CL13 CL15 CL17 CL18 CL19 - Short
255                                                                                                 SL1 SL7 SL8 SL9 SL10 SL11 SL12 SL14 SL16 SL20 SL21 SL22 - Open
256 Addams Family   NSS-R_IC2_AF   TC574000   NSS-R_IC3_AF   TC574000    NSS-R_IC8_AF   27C256      All games use the above jumper configuration.
257 Amazing Tennis  NSS-R_IC2_AT   TC574000   NSS-R_IC3_AT   TC574000    NSS-R_IC8_AT   27C256
258 Irem Skins Game NSS-R_IC2_MT   TC574000   NSS-R_IC3_MT   TC574000    NSS-R_IC8_MT   27C256
259 Lethal Weapon   NSS-R_IC2_L3   TC574000   NSS-R_IC3_L3   TC574000    NSS-R_IC8_L3   27C256
260 NCAA Basketball NSS-R_IC2_DU   TC574000   NSS-R_IC3_DU   TC574000    NSS-R_IC8_DU   27C256
261 Robocop 3       NSS-R_IC2_R3   TC574000   NSS-R_IC3_R3   TC574000    NSS-R_IC8_R3   27C256
262 ---------------------------------------------------------------------------------------------------------------------------------------------------------
263 
264 NSS-01-ROM-C
265 Sticker - NSS-X1-ROM-C (this is just a ROM-C board with a sticker over the top)
266                        (the differences being the SRAM and battery are populated)
267 |-------------------------------------------------------|
268 |  BAT1 CL19 SL22   IC1_SRAM                    DIPSW8  |
269 |       CL18 SL21                                       |
270 |       CL17 SL20                                       |
271 |       CL15 SL16   IC2_PRG_ROM-1                       |
272 |       SL12                                            |
273 |       CL13 SL14                                       |
274 |       CL5  SL11                                       |
275 |       CL6  SL10   IC3_PRG_ROM-0    IC8_INST_ROM  IC10 |
276 |       CL3  SL9                                        |
277 |       CL4  SL8                                        |
278 |   SL1 CL2  SL7                                        |
279 |--|                                                 |--|
280    |-------------------------------------------------|
281 Notes:
282       Battery is populated on this board, type CR2032 3V coin battery
283       IC1   - 6116 2k x8 SRAM, populated (DIP24)
284       IC2/3 - Program ROM
285       IC8   - Instruction ROM
286       IC10  - Unknown DIP8 chip
287 
288 Game Name    IC2            IC2 Type   IC3            IC3 Type    IC8           IC8 Type    Jumpers
289 -----------------------------------------------------------------------------------------------------------------------------------------------------
290 Contra III   CONTRA_III_1   TC574000   CONTRA_III_0   TC574000    GAME1_NSSU    27C256      CL2 CL3 CL4 CL5 CL6 CL12 CL13 CL15 CL17 CL18 CL19 - Short
291                                                                                             SL1 SL7 SL8 SL9 SL10 SL11 SL12 SL14 SL16 SL20 SL21 SL22 - Open
292 -----------------------------------------------------------------------------------------------------------------------------------------------------
293 
294 ***************************************************************************/
295 
296 #include "emu.h"
297 #include "includes/snes.h"
298 
299 #include "cpu/z80/z80.h"
300 #include "machine/m6m80011ap.h"
301 #include "machine/s3520cf.h"
302 #include "machine/rp5h01.h"
303 #include "video/m50458.h"
304 #include "emupal.h"
305 #include "rendlay.h"
306 #include "speaker.h"
307 
308 
309 class nss_state : public snes_state
310 {
311 public:
nss_state(const machine_config & mconfig,device_type type,const char * tag)312 	nss_state(const machine_config &mconfig, device_type type, const char *tag)
313 		: snes_state(mconfig, type, tag)
314 		, m_bioscpu(*this, "bios")
315 		, m_m50458(*this, "m50458")
316 		, m_s3520cf(*this, "s3520cf")
317 		, m_rp5h01(*this, "rp5h01")
318 		, m_palette(*this, "palette")
319 	{ }
320 
321 	void nss(machine_config &config);
322 
323 	void init_nss();
324 
325 	DECLARE_READ_LINE_MEMBER(game_over_flag_r);
326 
327 private:
328 	required_device<cpu_device> m_bioscpu;
329 	required_device<m50458_device> m_m50458;
330 	required_device<s3520cf_device> m_s3520cf;
331 	required_device<rp5h01_device> m_rp5h01;
332 	optional_device<palette_device> m_palette;
333 
334 	uint8_t m_wram_wp_flag;
335 	std::unique_ptr<uint8_t[]> m_wram;
336 	bool m_nmi_enable;
337 	uint8_t m_cart_sel;
338 	uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
339 
340 	uint8_t ram_wp_r(offs_t offset);
341 	void ram_wp_w(offs_t offset, uint8_t data);
342 	uint8_t nss_prot_r();
343 	void nss_prot_w(uint8_t data);
344 
345 	uint8_t port_00_r();
346 	void port_00_w(uint8_t data);
347 	void port_01_w(uint8_t data);
348 	void port_02_w(uint8_t data);
349 	void port_03_w(uint8_t data);
350 	void port_04_w(uint8_t data);
351 	void port_07_w(uint8_t data);
352 
353 	virtual void machine_start() override;
354 	virtual void machine_reset() override;
355 	DECLARE_WRITE_LINE_MEMBER(nss_vblank_irq);
356 	void bios_io_map(address_map &map);
357 	void bios_map(address_map &map);
358 	void snes_map(address_map &map);
359 	void spc_map(address_map &map);
360 };
361 
362 
363 
screen_update(screen_device & screen,bitmap_rgb32 & bitmap,const rectangle & cliprect)364 uint32_t nss_state::screen_update( screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect )
365 {
366 	m_m50458->screen_update(screen,bitmap,cliprect);
367 	return 0;
368 }
369 
370 
371 
snes_map(address_map & map)372 void nss_state::snes_map(address_map &map)
373 {
374 	map(0x000000, 0x7dffff).rw(FUNC(nss_state::snes_r_bank1), FUNC(nss_state::snes_w_bank1));
375 	map(0x7e0000, 0x7fffff).ram().share("wram");                 /* 8KB Low RAM, 24KB High RAM, 96KB Expanded RAM */
376 	map(0x800000, 0xffffff).rw(FUNC(nss_state::snes_r_bank2), FUNC(nss_state::snes_w_bank2));    /* Mirror and ROM */
377 }
378 
spc_map(address_map & map)379 void nss_state::spc_map(address_map &map)
380 {
381 	map(0x0000, 0xffff).ram().share("aram");
382 }
383 
384 /* NSS specific */
385 /*
386 Notes of interest:
387 
388 nss_smw
389 
390 bp 2914 onward is a crc check with the Instruction ROM
391 c0fe - c0ff pointers to the checksum
392 
393 bp 6b9e EEPROM write
394 bp 6bf9 EEPROM read
395 8080 - 8081 EEPROM checksummed value
396 
397 8700 - 870c  EEPROM2 checksummed value (0x8707 value and'ed with 0x03)
398 bp 6f8d check the EEPROM2 results
399 870d EEPROM2 result of checksum
400 
401 New notes:
402 
403 0x3a7 is the protection check
404 
405 0x8000 work RAM is for cart 1
406 0x8100 work RAM is for cart 2
407 0x8200 work RAM is for cart 3
408 
409 */
410 /*
411 noca$h info @ nocash.emubase.de/fullsnes.htm
412 map
413 0x0000 - 0x7fff BIOS
414 0x8000 - 0x8fff RAM
415 0x9000 - 0x9fff RAM with write protection
416 0xa000          EEPROM Read
417 0xc000 - 0xdfff instruction ROM
418 0xe000          EEPROM Write
419 0xe000 - 0xffff PROM Input & Output & Program Code (protection RP5H01, used also in earlier Nintendo systems)
420 Data Write:
421   7-5  Unknown/unused
422   4    PROM Test Mode (0=Low=6bit Address, 1=High=7bit Address)
423   3    PROM Clock     (0=Low, 1=High) ;increment address on 1-to-0 transition
424   2-1  Unknown/unused
425   0    PROM Address Reset (0=High=Reset to zero, 1=Low=No Change)
426 
427 Data Read and Opcode Fetch:
428 
429   7-5  Always set (MSBs of RST Opcode)
430   4    PROM Counter Out (0=High=One, 1=Low=Zero) ;PROM Address Bit5
431   3    PROM Data Out    (0=High=One, 1=Low=Zero)
432   2-0  Always set (LSBs of RST Opcode)
433 
434 i/o
435 Input
436 0x00 Joypad
437 0x01 Front-Panel Buttons and Game Over Flag
438   7   From SNES Port 4016h.W.Bit2 (0=Game Over Flag, 1=Normal) (Inverted!)
439 0x02 Coin and Service Button Inputs
440   7-3 Unknown/unused (maybe the (unused) Test button hides here)
441   2   Service Button (1=Pressed: Add Credit; with INST button: Config)
442   1   Coin Input 2   (1=Coin inserted in coin-slot 2)
443   0   Coin Input 1   (1=Coin inserted in coin-slot 1)
444 0x03 RTC
445 Output
446 0x00/0x80 NMI Control and RAM protect
447 0x01/0x81 Unknown and Slot Select
448 0x02/0x82 RTC and OSD
449 0x03/0x83 Unknown and LED control
450 0x84 Coin Counter Outputs
451 0x05 Unknown
452 0x07 SNES Watchdog / Acknowledge SNES Joypad Read Flag
453 
454 SNES part:
455 0x4100 DSW
456 0x4016 bit 0 Joypad Strobe?
457 0x4016 bit 2 Game Over Flag
458 
459 
460 
461 */
462 
ram_wp_r(offs_t offset)463 uint8_t nss_state::ram_wp_r(offs_t offset)
464 {
465 	return m_wram[offset];
466 }
467 
ram_wp_w(offs_t offset,uint8_t data)468 void nss_state::ram_wp_w(offs_t offset, uint8_t data)
469 {
470 	if(m_wram_wp_flag)
471 		m_wram[offset] = data;
472 }
473 
474 
nss_prot_r()475 uint8_t nss_state::nss_prot_r()
476 {
477 	int data = 0xe7;
478 
479 	if (m_cart_sel == 0)
480 	{
481 		data |= ((~m_rp5h01->counter_r()) << 4) & 0x10;  /* D4 */
482 		data |= (m_rp5h01->data_r() << 3) & 0x08;        /* D3 */
483 	}
484 
485 	return data;
486 }
487 
nss_prot_w(uint8_t data)488 void nss_state::nss_prot_w(uint8_t data)
489 {
490 	if (m_cart_sel == 0)
491 	{
492 		m_rp5h01->test_w(data & 0x10);     /* D4 */
493 		m_rp5h01->clock_w(data & 0x08);    /* D3 */
494 		m_rp5h01->cs_w(~data & 0x01);
495 	}
496 
497 	ioport("EEPROMOUT")->write(data, 0xff);
498 }
499 
500 
bios_map(address_map & map)501 void nss_state::bios_map(address_map &map)
502 {
503 	map(0x0000, 0x7fff).rom();
504 	map(0x8000, 0x8fff).ram();
505 	map(0x9000, 0x9fff).rw(FUNC(nss_state::ram_wp_r), FUNC(nss_state::ram_wp_w));
506 	map(0xa000, 0xa000).portr("EEPROMIN");
507 	map(0xc000, 0xdfff).rom().region("ibios_rom", 0x6000);
508 	map(0xe000, 0xffff).rw(FUNC(nss_state::nss_prot_r), FUNC(nss_state::nss_prot_w));
509 }
510 
port_00_r()511 uint8_t nss_state::port_00_r()
512 {
513 /*
514     x--- ----   SNES Watchdog (0=SNES did read Joypads, 1=Didn't do so) (ack via 07h.W)
515     -x-- ----   Vblank or Vsync or so       (0=What, 1=What?)
516     --x- ----   Button "Joypad Button B?"   (0=Released, 1=Pressed)
517     ---x ----   Button "Joypad Button A"    (0=Released, 1=Pressed)
518     ---- x---   Button "Joypad Down"        (0=Released, 1=Pressed)
519     ---- -x--   Button "Joypad Up"          (0=Released, 1=Pressed)
520     ---- --x-   Button "Joypad Left"        (0=Released, 1=Pressed)
521     ---- ---x   Button "Joypad Right"       (0=Released, 1=Pressed)
522 */
523 	uint8_t res;
524 
525 	res = (m_joy_flag) << 7;
526 	// TODO: reads from SNES screen output, correct?
527 	res|= (m_screen->vblank() & 1) << 6;
528 	res|= (BIT(ioport("SERIAL1_DATA1")->read(), 15) << 5);
529 	res|= (BIT(ioport("SERIAL1_DATA1")->read(),  7) << 4);
530 	res|= (BIT(ioport("SERIAL1_DATA1")->read(), 10) << 3);
531 	res|= (BIT(ioport("SERIAL1_DATA1")->read(), 11) << 2);
532 	res|= (BIT(ioport("SERIAL1_DATA1")->read(),  9) << 1);
533 	res|= (BIT(ioport("SERIAL1_DATA1")->read(),  8) << 0);
534 
535 	return res;
536 }
537 
port_00_w(uint8_t data)538 void nss_state::port_00_w(uint8_t data)
539 {
540 /*
541     xxxx ---- Unknown/unused      (should be always 0)
542     ---- x--- Maybe SNES CPU/PPU reset (usually same as Port 01h.W.Bit1)
543     ---- -x-- RAM at 9000h-9FFFh  (0=Disable/Protect, 1=Enable/Unlock)
544     ---- --x- Looks like maybe somehow NMI Related ?    ;\or one of these is PC10-style
545     ---- ---x Looks like NMI Enable                     ;/hardware-watchdog reload?
546 */
547 	m_wram_wp_flag = (data & 4) >> 2;
548 	m_nmi_enable = data & 1;
549 	if (!m_nmi_enable)
550 		m_bioscpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
551 
552 }
553 
port_01_w(uint8_t data)554 void nss_state::port_01_w(uint8_t data)
555 {
556 /*
557     x--- ---- Maybe SNES Joypad Enable? (0=Disable/Demo, 1=Enable/Game)
558     -x-- ---- Unknown/unused        (should be always 0)
559     --x- ---- SNES Sound Mute       (0=Normal, 1=Mute) (for optional mute in demo mode)
560     ---x ---- Unknown  ;from INST-ROM flag! (Lo/HiROM, 2-player, zapper, volume or so?)
561     ---- xx-- Slot Select        (0..2 for Slot 1..3) (mapping to both SNES and Z80)
562     ---- --x- Maybe SNES CPU pause?  (cleared on deposit coin to continue) (1=Run)
563     ---- ---x Maybe SNES CPU/PPU reset?   (0=Reset, 1=Run)
564 */
565 	m_input_disabled = BIT(data, 7) ^ 1;
566 	m_s_dsp->set_volume((data & 0x20) ? 0.0 : 100.0);
567 
568 	m_cart_sel = (data & 0xc) >> 2;
569 
570 	m_maincpu->set_input_line(INPUT_LINE_HALT, (data & 2) ? CLEAR_LINE : ASSERT_LINE);
571 	m_soundcpu->set_input_line(INPUT_LINE_HALT, (data & 2) ? CLEAR_LINE : ASSERT_LINE);
572 	m_maincpu->set_input_line(INPUT_LINE_RESET, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
573 	m_soundcpu->set_input_line(INPUT_LINE_RESET, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
574 	/* also reset the device */
575 	if (!(data & 1))
576 		m_s_dsp->reset();
577 }
578 
port_02_w(uint8_t data)579 void nss_state::port_02_w(uint8_t data)
580 {
581 /*
582     x--- ----  OSD Clock ?       (usually same as Bit6)  ;\Chip Select when Bit6=Bit7 ?
583     -x-- ----  OSD Clock ?       (usually same as Bit7)  ;/
584     --x- ----  OSD Data Out      (0=Low=Zero, 1=High=One)
585     ---x ----  OSD Special       (?)  ... or just /CS ? (or software index DC3F/DD3F?)
586     ---- x---  RTC /CLK          (0=Low=Clock,  1=High=Idle)              ;S-3520
587     ---- -x--  RTC Data Out      (0=Low=Zero,   1=High=One)
588     ---- --x-  RTC Direction     (0=Low=Write,  1=High=Read)
589     ---- ---x  RTC /CS           (0=Low/Select, 1=High/No)
590 */
591 //  printf("%02x\n",data & 0xf);
592 	ioport("RTC_OSD")->write(data, 0xff);
593 }
594 
port_03_w(uint8_t data)595 void nss_state::port_03_w(uint8_t data)
596 {
597 /*
598     x--- ----     Layer SNES Enable?             (used by token proc, see 7A46h) SNES?
599     -x-- ----     Layer OSD Enable?
600     --xx ---- Unknown/unused (should be always 0)
601     ---- x---   LED Instructions (0=Off, 1=On)  ;-glows in demo (prompt for INST button)
602     ---- -x--   LED Game 3       (0=Off, 1=On)  ;\
603     ---- --x-   LED Game 2       (0=Off, 1=On)  ; blinked when enough credits inserted
604     ---- ---x   LED Game 1       (0=Off, 1=On)  ;/
605 
606 */
607 //  popmessage("%02x",data);
608 }
609 
port_04_w(uint8_t data)610 void nss_state::port_04_w(uint8_t data)
611 {
612 	machine().bookkeeping().coin_counter_w(0, (data >> 0) & 1);
613 	machine().bookkeeping().coin_counter_w(1, (data >> 1) & 1);
614 }
615 
port_07_w(uint8_t data)616 void nss_state::port_07_w(uint8_t data)
617 {
618 	m_joy_flag = 1;
619 }
620 
bios_io_map(address_map & map)621 void nss_state::bios_io_map(address_map &map)
622 {
623 	map.global_mask(0x7);
624 	map(0x00, 0x00).r(FUNC(nss_state::port_00_r)).w(FUNC(nss_state::port_00_w));
625 	map(0x01, 0x01).portr("FP").w(FUNC(nss_state::port_01_w));
626 	map(0x02, 0x02).portr("SYSTEM").w(FUNC(nss_state::port_02_w));
627 	map(0x03, 0x03).portr("RTC").w(FUNC(nss_state::port_03_w));
628 	map(0x04, 0x04).w(FUNC(nss_state::port_04_w));
629 	map(0x07, 0x07).w(FUNC(nss_state::port_07_w));
630 }
631 
machine_start()632 void nss_state::machine_start()
633 {
634 	snes_state::machine_start();
635 
636 	m_is_nss = 1;
637 	m_wram = make_unique_clear<uint8_t[]>(0x1000);
638 }
639 
640 
READ_LINE_MEMBER(nss_state::game_over_flag_r)641 READ_LINE_MEMBER(nss_state::game_over_flag_r)
642 {
643 	return m_game_over_flag;
644 }
645 
646 static INPUT_PORTS_START( snes )
647 	PORT_START("SYSTEM")
648 	PORT_BIT( 0xf8, IP_ACTIVE_HIGH, IPT_UNKNOWN )
649 	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SERVICE1 )
650 	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 )
651 	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
652 
653 	PORT_START("FP")
PORT_READ_LINE_MEMBER(nss_state,game_over_flag_r)654 	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(nss_state, game_over_flag_r)
655 	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON13 ) PORT_NAME("Restart Button")
656 	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON12 ) PORT_NAME("Page Up Button")
657 	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON11 ) PORT_NAME("Page Down Button")
658 	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON10 ) PORT_NAME("Instructions Button")
659 	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON9 ) PORT_NAME("Game 3 Button")
660 	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON8 ) PORT_NAME("Game 2 Button")
661 	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON7 ) PORT_NAME("Game 1 Button")
662 
663 	PORT_START("EEPROMIN")
664 	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("m6m80011ap", m6m80011ap_device, read_bit)
665 	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("m6m80011ap", m6m80011ap_device, ready_line )
666 	PORT_BIT( 0x3f, IP_ACTIVE_HIGH, IPT_UNKNOWN )
667 
668 	PORT_START("EEPROMOUT")
669 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("m6m80011ap", m6m80011ap_device, set_clock_line)
670 	PORT_BIT( 0x08, IP_ACTIVE_HIGH,IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("m6m80011ap", m6m80011ap_device, write_bit)
671 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("m6m80011ap", m6m80011ap_device, set_cs_line)
672 
673 	PORT_START("RTC_OSD")
674 	PORT_BIT( 0x80, IP_ACTIVE_LOW,  IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("m50458", m50458_device, set_clock_line)
675 	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("m50458", m50458_device, write_bit)
676 	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("m50458", m50458_device, set_cs_line)
677 	PORT_BIT( 0x08, IP_ACTIVE_LOW,  IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("s3520cf", s3520cf_device, set_clock_line)
678 	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("s3520cf", s3520cf_device, write_bit)
679 	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("s3520cf", s3520cf_device, set_dir_line)
680 	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("s3520cf", s3520cf_device, set_cs_line)
681 
682 	PORT_START("RTC")
683 	PORT_BIT( 0xfe, IP_ACTIVE_HIGH, IPT_UNKNOWN )
684 	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("s3520cf", s3520cf_device, read_bit)
685 
686 	PORT_START("SERIAL1_DATA1")
687 	PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("P1 Button B") PORT_PLAYER(1)
688 	PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_NAME("P1 Button Y") PORT_PLAYER(1)
689 	PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_NAME("P1 Select")
690 	PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_START1 ) PORT_NAME("P1 Start")
691 	PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
692 	PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
693 	PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
694 	PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
695 	PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_NAME("P1 Button A") PORT_PLAYER(1)
696 	PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_NAME("P1 Button X") PORT_PLAYER(1)
697 	PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_BUTTON6 ) PORT_NAME("P1 Button L") PORT_PLAYER(1)
698 	PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("P1 Button R") PORT_PLAYER(1)
699 	PORT_BIT( 0x000f, IP_ACTIVE_HIGH, IPT_UNUSED )
700 
701 	PORT_START("SERIAL2_DATA1")
702 	PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("P2 Button B") PORT_PLAYER(2)
703 	PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_NAME("P2 Button Y") PORT_PLAYER(2)
704 	PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_SERVICE2 ) PORT_NAME("P2 Select")
705 	PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_START2 ) PORT_NAME("P2 Start")
706 	PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
707 	PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
708 	PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
709 	PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
710 	PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_NAME("P2 Button A") PORT_PLAYER(2)
711 	PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_NAME("P2 Button X") PORT_PLAYER(2)
712 	PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_BUTTON6 ) PORT_NAME("P2 Button L") PORT_PLAYER(2)
713 	PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("P2 Button R") PORT_PLAYER(2)
714 	PORT_BIT( 0x000f, IP_ACTIVE_HIGH, IPT_UNUSED )
715 
716 	PORT_START("SERIAL1_DATA2")
717 	PORT_BIT( 0xffff, IP_ACTIVE_HIGH, IPT_UNUSED )
718 
719 	PORT_START("SERIAL2_DATA2")
720 	PORT_BIT( 0xffff, IP_ACTIVE_HIGH, IPT_UNUSED )
721 
722 	PORT_START("DSW")
723 	PORT_DIPNAME( 0x03, 0x00, DEF_STR( Difficulty ) )
724 	PORT_DIPSETTING(    0x00, DEF_STR( Normal ) )
725 	PORT_DIPSETTING(    0x03, DEF_STR( Hard )  )
726 	PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Lives ) )
727 	PORT_DIPSETTING(    0x0c, "2" )
728 	PORT_DIPSETTING(    0x08, "3" )
729 	PORT_DIPSETTING(    0x04, "4" )
730 	PORT_DIPSETTING(    0x00, "5" )
731 	PORT_DIPNAME( 0x30, 0x00, "Time limit per level?" ) // taken from the scan of nss_adam
732 	PORT_DIPSETTING(    0x10, "104 sec." )
733 	PORT_DIPSETTING(    0x20, "112 sec." )
734 	PORT_DIPSETTING(    0x00, "120 sec." )
735 	PORT_DIPSETTING(    0x30, "? sec." )
736 	PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
737 	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
738 	PORT_DIPSETTING(    0x40, DEF_STR( On ) )
739 	PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
740 	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
741 	PORT_DIPSETTING(    0x80, DEF_STR( On ) )
742 
743 #if SNES_LAYER_DEBUG
744 	PORT_START("DEBUG1")
745 	PORT_CONFNAME( 0x03, 0x00, "Select BG1 priority" )
746 	PORT_CONFSETTING(    0x00, "All" )
747 	PORT_CONFSETTING(    0x01, "BG1B (lower) only" )
748 	PORT_CONFSETTING(    0x02, "BG1A (higher) only" )
749 	PORT_CONFNAME( 0x0c, 0x00, "Select BG2 priority" )
750 	PORT_CONFSETTING(    0x00, "All" )
751 	PORT_CONFSETTING(    0x04, "BG2B (lower) only" )
752 	PORT_CONFSETTING(    0x08, "BG2A (higher) only" )
753 	PORT_CONFNAME( 0x30, 0x00, "Select BG3 priority" )
754 	PORT_CONFSETTING(    0x00, "All" )
755 	PORT_CONFSETTING(    0x10, "BG3B (lower) only" )
756 	PORT_CONFSETTING(    0x20, "BG3A (higher) only" )
757 	PORT_CONFNAME( 0xc0, 0x00, "Select BG4 priority" )
758 	PORT_CONFSETTING(    0x00, "All" )
759 	PORT_CONFSETTING(    0x40, "BG4B (lower) only" )
760 	PORT_CONFSETTING(    0x80, "BG4A (higher) only" )
761 
762 	PORT_START("DEBUG2")
763 	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Toggle BG 1") PORT_CODE(KEYCODE_1_PAD) PORT_TOGGLE
764 	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Toggle BG 2") PORT_CODE(KEYCODE_2_PAD) PORT_TOGGLE
765 	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Toggle BG 3") PORT_CODE(KEYCODE_3_PAD) PORT_TOGGLE
766 	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Toggle BG 4") PORT_CODE(KEYCODE_4_PAD) PORT_TOGGLE
767 	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Toggle Objects") PORT_CODE(KEYCODE_5_PAD) PORT_TOGGLE
768 	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Toggle Main/Sub") PORT_CODE(KEYCODE_6_PAD) PORT_TOGGLE
769 	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Toggle Color Math") PORT_CODE(KEYCODE_7_PAD) PORT_TOGGLE
770 	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Toggle Windows") PORT_CODE(KEYCODE_8_PAD) PORT_TOGGLE
771 
772 	PORT_START("DEBUG3")
773 	PORT_BIT( 0x4, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Toggle Mosaic") PORT_CODE(KEYCODE_9_PAD) PORT_TOGGLE
774 	PORT_CONFNAME( 0x70, 0x00, "Select OAM priority" )
775 	PORT_CONFSETTING(    0x00, "All" )
776 	PORT_CONFSETTING(    0x10, "OAM0 only" )
777 	PORT_CONFSETTING(    0x20, "OAM1 only" )
778 	PORT_CONFSETTING(    0x30, "OAM2 only" )
779 	PORT_CONFSETTING(    0x40, "OAM3 only" )
780 	PORT_CONFNAME( 0x80, 0x00, "Draw sprite in reverse order" )
781 	PORT_CONFSETTING(    0x00, DEF_STR( Off ) )
782 	PORT_CONFSETTING(    0x80, DEF_STR( On ) )
783 
784 	PORT_START("DEBUG4")
785 	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Toggle Mode 0 draw") PORT_TOGGLE
786 	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Toggle Mode 1 draw") PORT_TOGGLE
787 	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Toggle Mode 2 draw") PORT_TOGGLE
788 	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Toggle Mode 3 draw") PORT_TOGGLE
789 	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Toggle Mode 4 draw") PORT_TOGGLE
790 	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Toggle Mode 5 draw") PORT_TOGGLE
791 	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Toggle Mode 6 draw") PORT_TOGGLE
792 	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Toggle Mode 7 draw") PORT_TOGGLE
793 #endif
794 INPUT_PORTS_END
795 
796 
797 WRITE_LINE_MEMBER(nss_state::nss_vblank_irq)
798 {
799 	if (state && m_nmi_enable)
800 		m_bioscpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero);
801 }
802 
machine_reset()803 void nss_state::machine_reset()
804 {
805 	snes_state::machine_reset();
806 
807 	/* start with both CPUs disabled */
808 	m_maincpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
809 	m_soundcpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
810 
811 	/* reset the security chip */
812 	m_rp5h01->enable_w(1);
813 	m_rp5h01->enable_w(0);
814 	m_rp5h01->reset_w(0);
815 	m_rp5h01->reset_w(1);
816 
817 	m_game_over_flag = 1;
818 	m_joy_flag = 1;
819 }
820 
nss(machine_config & config)821 void nss_state::nss(machine_config &config)
822 {
823 	/* base snes hardware */
824 	_5A22(config, m_maincpu, MCLK_NTSC);   /* 2.68Mhz, also 3.58Mhz */
825 	m_maincpu->set_addrmap(AS_PROGRAM, &nss_state::snes_map);
826 
827 	// runs at 24.576 MHz / 12 = 2.048 MHz
828 	S_SMP(config, m_soundcpu, XTAL(24'576'000) / 12);
829 	m_soundcpu->set_addrmap(AS_DATA, &nss_state::spc_map);
830 	m_soundcpu->dsp_io_read_callback().set(m_s_dsp, FUNC(s_dsp_device::dsp_io_r));
831 	m_soundcpu->dsp_io_write_callback().set(m_s_dsp, FUNC(s_dsp_device::dsp_io_w));
832 
833 	config.set_perfect_quantum(m_maincpu);
834 
835 	/* nss hardware */
836 	Z80(config, m_bioscpu, 4000000);
837 	m_bioscpu->set_addrmap(AS_PROGRAM, &nss_state::bios_map);
838 	m_bioscpu->set_addrmap(AS_IO, &nss_state::bios_io_map);
839 
840 	M50458(config, m_m50458, 4000000, "osd"); /* TODO: correct clock */
841 	S3520CF(config, m_s3520cf); /* RTC */
842 	RP5H01(config, m_rp5h01, 0);
843 	M6M80011AP(config, "m6m80011ap");
844 
845 	/* sound hardware */
846 	SPEAKER(config, "lspeaker").front_left();
847 	SPEAKER(config, "rspeaker").front_right();
848 
849 	S_DSP(config, m_s_dsp, XTAL(24'576'000) / 12);
850 	m_s_dsp->set_addrmap(0, &nss_state::spc_map);
851 	m_s_dsp->add_route(0, "lspeaker", 1.00);
852 	m_s_dsp->add_route(1, "rspeaker", 1.00);
853 
854 	/* video hardware */
855 	/* TODO: the screen should actually superimpose, but for the time being let's just separate outputs */
856 	config.set_default_layout(layout_dualhsxs);
857 
858 	// SNES PPU
859 	SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
860 	m_screen->set_raw(DOTCLK_NTSC * 2, SNES_HTOTAL * 2, 0, SNES_SCR_WIDTH * 2, SNES_VTOTAL_NTSC, 0, SNES_SCR_HEIGHT_NTSC);
861 	m_screen->set_video_attributes(VIDEO_VARIABLE_WIDTH);
862 	m_screen->set_screen_update(FUNC(snes_state::screen_update));
863 	m_screen->screen_vblank().set(FUNC(nss_state::nss_vblank_irq));
864 
865 	SNES_PPU(config, m_ppu, MCLK_NTSC);
866 	m_ppu->open_bus_callback().set([this] { return snes_open_bus_r(); }); // lambda because overloaded function name
867 	m_ppu->set_screen("screen");
868 
869 	// NSS
870 	screen_device &osd(SCREEN(config, "osd", SCREEN_TYPE_RASTER));
871 	osd.set_refresh_hz(60);
872 	osd.set_vblank_time(ATTOSECONDS_IN_USEC(2500));
873 	osd.set_size(288+22, 216+22);
874 	osd.set_visarea(0, 288-1, 0, 216-1);
875 	osd.set_screen_update(FUNC(nss_state::screen_update));
876 }
877 
878 /***************************************************************************
879 
880   Game driver(s)
881 
882 ***************************************************************************/
883 
884 #define NSS_BIOS \
885 	ROM_REGION(0x8000,         "bios",  0)      /* Bios CPU */ \
886 	ROM_SYSTEM_BIOS( 0, "single", "Nintendo Super System (Single Cart BIOS)" ) \
887 	ROMX_LOAD("nss-ic14.02.ic14", 0x00000, 0x8000, CRC(e06cb58f) SHA1(62f507e91a2797919a78d627af53f029c7d81477), ROM_BIOS(0) )   /* bios */ \
888 	ROM_SYSTEM_BIOS( 1, "multi", "Nintendo Super System (Multi Cart BIOS)" ) \
889 	ROMX_LOAD("nss-c.ic14"  , 0x00000, 0x8000, CRC(a8e202b3) SHA1(b7afcfe4f5cf15df53452dc04be81929ced1efb2), ROM_BIOS(1) )   /* bios */ \
890 	ROM_SYSTEM_BIOS( 2, "single3", "Nintendo Super System (Single Cart BIOS v3, hack?)" ) \
891 	ROMX_LOAD("nss-v3.ic14" , 0x00000, 0x8000, CRC(ac385b53) SHA1(e3942f9d508c3c8074c3c3941376c37ca68b8e54), ROM_BIOS(2) )   /* bios */
892 
893 
ROM_START(nss)894 ROM_START( nss )
895 	NSS_BIOS
896 	ROM_REGION( 0x100000, "user3", ROMREGION_ERASEFF )
897 
898 	/* instruction / data rom for bios */
899 	ROM_REGION( 0x8000, "ibios_rom", ROMREGION_ERASEFF )
900 ROM_END
901 
902 ROM_START( nss_actr )
903 	NSS_BIOS
904 	ROM_REGION( 0x100000, "user3", 0 )
905 	ROM_LOAD( "act-rais.ic3", 0x00000, 0x80000, CRC(c9f788c2) SHA1(fba2331fd5bcbe51d74115528fd3a9becf072e8d) )
906 	ROM_LOAD( "act-rais.ic2", 0x80000, 0x80000, CRC(4df9cc63) SHA1(3e98d9693d60d125a1257ba79701f27bda688261) )
907 
908 	/* instruction / data rom for bios */
909 	ROM_REGION( 0x8000, "ibios_rom", 0 )
910 	ROM_LOAD( "act-rais.ic8", 0x0000, 0x8000, CRC(08b38ce6) SHA1(4cbb7fd28d98ffef0f17747201625883af954e3a) )
911 
912 	ROM_REGION( 0x10, "rp5h01", 0 )
913 	ROM_LOAD( "security.prm", 0x00, 0x10, CRC(4b74ac55) SHA1(51ea71b06367b4956a4b737385e2d4d15bd43980) )
914 ROM_END
915 
916 ROM_START( nss_con3 )
917 	NSS_BIOS
918 	ROM_REGION( 0x100000, "user3", 0 )
919 	ROM_LOAD( "contra3.ic3", 0x00000, 0x80000, CRC(33b03501) SHA1(c7f4835d5ec4983e487b00f0b4c49fede2f03b9c) )
920 	ROM_LOAD( "contra3.ic2", 0x80000, 0x80000, CRC(2f3e3b5b) SHA1(0186b92f022701f6ae29984252e6d346acf6550b) )
921 
922 	/* instruction / data rom for bios */
923 	ROM_REGION( 0x8000, "ibios_rom", 0 )
924 	ROM_LOAD( "contra3.ic8", 0x0000, 0x8000, CRC(0fbfa23b) SHA1(e7a1a78a58c64297e7b9623350ec57aed8035a4f) )
925 
926 	ROM_REGION( 0x10, "rp5h01", ROMREGION_ERASE00 )
927 	ROM_LOAD( "security.prm", 0x00, 0x10, CRC(e97e4b00) SHA1(70e8382a93137353f5d0b905db2e9af50c52ce0b) )
928 ROM_END
929 
930 ROM_START( nss_adam )
931 	NSS_BIOS
932 	ROM_REGION( 0x100000, "user3", 0 )
933 	ROM_LOAD( "addams.ic3", 0x00000, 0x80000, CRC(44643930) SHA1(a45204b2eb13c6befca30d130061b5b8ba054270) )
934 	ROM_LOAD( "addams.ic2", 0x80000, 0x80000, CRC(6196adcf) SHA1(a450f278a37d5822f607aa3631831a461e8b147e) )
935 
936 	/* instruction / data rom for bios */
937 	ROM_REGION( 0x8000, "ibios_rom", 0 )
938 	ROM_LOAD( "addams.ic8", 0x0000, 0x8000, CRC(57c7f72c) SHA1(2e3642b4b5438f6c535d6d1eb668e1663062cf78) )
939 
940 	ROM_REGION( 0x10, "rp5h01", 0 )
941 	ROM_LOAD( "security.prm", 0x00, 0x10, CRC(154d10c2) SHA1(6829e149c341b753ee9bc72055c0634db4e81884) )
942 ROM_END
943 
944 ROM_START( nss_aten )
945 	NSS_BIOS
946 	ROM_REGION( 0x100000, "user3", 0 )
947 	ROM_LOAD( "amtennis.ic3", 0x00000, 0x80000, CRC(aeabaf2a) SHA1(b355e0a322b57454e767785a49c14d4c7f492488) )
948 	ROM_LOAD( "amtennis.ic2", 0x80000, 0x80000, CRC(7738c5f2) SHA1(eb0089e9724c7b3834d9f6c47b92f5a1bb26fc77) )
949 
950 	/* instruction / data rom for bios */
951 	ROM_REGION( 0x8000, "ibios_rom", 0 )
952 	ROM_LOAD( "amtennis.ic8", 0x0000, 0x8000, CRC(d2cd3926) SHA1(49fc253b1b9497ef1374c7db0bd72c163ffb07e7) )
953 
954 	ROM_REGION( 0x10, "rp5h01", 0 )
955 	ROM_LOAD( "security.prm", 0x00, 0x10,CRC(3e640fa2) SHA1(ac530610a9d4979f070d5f57dfd4886c530aa20f) )
956 ROM_END
957 
958 ROM_START( nss_rob3 )
959 	NSS_BIOS
960 	ROM_REGION( 0x100000, "user3", 0 )
961 	ROM_LOAD( "robocop3.ic3", 0x00000, 0x80000, CRC(60916c42) SHA1(462d9645210a58bfd5204bd209eae2cdadb4493e) )
962 	ROM_LOAD( "robocop3.ic2", 0x80000, 0x80000, CRC(a94e1b56) SHA1(7403d70504310ad5949a3b45b4a1e71e7d2bce77) )
963 
964 	/* instruction / data rom for bios */
965 	ROM_REGION( 0x8000, "ibios_rom", 0 )
966 	ROM_LOAD( "robocop3.ic8", 0x0000, 0x8000, CRC(90d13c51) SHA1(6751dab14b7d178350ac333f07dd2c3852e4ae23) )
967 
968 	ROM_REGION( 0x10, "rp5h01", 0 )
969 	ROM_LOAD( "security.prm", 0x00, 0x10, CRC(eb9a75de) SHA1(58f028c3f28eb4155215f4e154323e01e0fd4297) )
970 ROM_END
971 
972 ROM_START( nss_ncaa )
973 	NSS_BIOS
974 	ROM_REGION( 0x100000, "user3", 0 )
975 	ROM_LOAD( "ncaa.ic3", 0x00000, 0x80000, CRC(ef49ad8c) SHA1(4c40f3746b995b53f006434b9ccec06d8fe16e1f) )
976 	ROM_LOAD( "ncaa.ic2", 0x80000, 0x80000, CRC(83ef6936) SHA1(8e0f38c763861e33684c6ddb742385b0522af78a) )
977 
978 	/* instruction / data rom for bios */
979 	ROM_REGION( 0x8000, "ibios_rom", 0 )
980 	ROM_LOAD( "ncaa.ic8", 0x0000, 0x8000, CRC(b9fa28d5) SHA1(bc538bcff5c19eae4becc6582b5c111d287b76fa) )
981 
982 	ROM_REGION( 0x10, "rp5h01", 0 )
983 	ROM_LOAD( "security.prm", 0x00, 0x10, CRC(a2e9ad5b) SHA1(a41f82451fc185f8e989a0d4f38700dc7813bb50) )
984 ROM_END
985 
986 ROM_START( nss_skin )
987 	NSS_BIOS
988 	ROM_REGION( 0x100000, "user3", 0 )
989 	ROM_LOAD( "skins.ic3", 0x00000, 0x80000, CRC(ee1bb84d) SHA1(549ad9319e94a5d75cd4af017e63ea93ab407c87) )
990 	ROM_LOAD( "skins.ic2", 0x80000, 0x80000, CRC(365fd19e) SHA1(f60d7ac39fe83fb98730e73fbef410c90a4ff35b) )
991 
992 	/* instruction / data rom for bios */
993 	ROM_REGION( 0x8000, "ibios_rom", 0 )
994 	ROM_LOAD( "skins.ic8", 0x0000, 0x8000, CRC(9f33d5ce) SHA1(4d279ad3665bd94c7ca9cb2778572bed42c5b298) )
995 
996 	ROM_REGION( 0x10, "rp5h01", 0 )
997 	ROM_LOAD( "security.prm", 0x00, 0x10, CRC(86f8cd1d) SHA1(d567d194058568f4ae32b7726e433918b06bca54) )
998 ROM_END
999 
1000 ROM_START( nss_lwep )
1001 	NSS_BIOS
1002 	ROM_REGION( 0x100000, "user3", 0 )
1003 	ROM_LOAD( "nss-lw.ic3", 0x00000, 0x80000, CRC(32564666) SHA1(bf371218fa303ce95eab09fb6017a522071dcd7e) )
1004 	ROM_LOAD( "nss-lw.ic2", 0x80000, 0x80000, CRC(86365042) SHA1(f818024c6f858fd2780396b6c83d3a37a97fa08a) )
1005 
1006 	/* instruction / data rom for bios */
1007 	ROM_REGION( 0x8000, "ibios_rom", 0 )
1008 	ROM_LOAD( "nss-lw.ic8", 0x0000, 0x8000, CRC(1acc1d5d) SHA1(4c8b100ac5847915aaf3b5bfbcb4f632606c97de) )
1009 
1010 	ROM_REGION( 0x10, "rp5h01", 0 )
1011 	ROM_LOAD( "security.prm", 0x00, 0x10, CRC(e9755c14) SHA1(d8dbebf3536dcbd18c50ba11a6b729dc7085f74b) )
1012 ROM_END
1013 
1014 ROM_START( nss_ssoc )
1015 	NSS_BIOS
1016 	ROM_REGION( 0x100000, "user3", 0 )
1017 	ROM_LOAD( "s-soccer.ic1", 0x00000, 0x80000,  CRC(70b7f50e) SHA1(92856118528995e3a0b7d22340d440bef5fd61ac) )
1018 
1019 	/* instruction / data rom for bios */
1020 	ROM_REGION( 0x8000, "ibios_rom", 0 )
1021 	ROM_LOAD( "s-soccer.ic3", 0x0000, 0x8000, CRC(c09211c3) SHA1(b274a57f93ae0a8774664df3d3615fb7dbecfa2e) )
1022 
1023 	ROM_REGION( 0x10, "rp5h01", 0 )
1024 	ROM_LOAD( "security.prm", 0x00, 0x10, CRC(e41c4204) SHA1(529ca7df78ecf154a095dc1b627783c43c817a45) )
1025 ROM_END
1026 
1027 ROM_START( nss_smw )
1028 	NSS_BIOS
1029 	ROM_REGION( 0x100000, "user3", 0 )
1030 	ROM_LOAD( "nss-mw-0_prg.ic1", 0x000000, 0x80000, CRC(c46766f2) SHA1(06a6efc246c6fdb83efab1d402d61d2179a84494) )
1031 	// Note: this rom appears with 2 variations: LH534J mask rom with "NSS-MW-0 // PRG" silkscreen
1032 	// or ?LH534J mask rom? with "NSS-R // IC1 // MW" label sticker
1033 
1034 	/* instruction / data rom for bios */
1035 	ROM_REGION( 0x8000, "ibios_rom", 0 )
1036 	ROM_LOAD( "nss-r__ic3__mw.ic3", 0x0000, 0x8000, CRC(f2c5466e) SHA1(e116f01342fcf359498ed8750741c139093b1fb2) )
1037 
1038 	ROM_REGION( 0x10, "rp5h01", 0 )
1039 	ROM_LOAD( "security.prm", 0x00, 0x10, CRC(fd700dca) SHA1(6805cefb1856c3498b7a7a049c0d09858afac47c) ) // Labeled "MW" on yellow sticker
1040 ROM_END
1041 
1042 ROM_START( nss_fzer )
1043 	NSS_BIOS
1044 	ROM_REGION( 0x100000, "user3", 0 )
1045 	ROM_LOAD( "nss-fz-0.ic2", 0x000000, 0x100000, CRC(e9b3cdf1) SHA1(ab616eecd292b94ca74c55446bddd23e9dc3e3bb) )
1046 
1047 	/* instruction / data rom for bios */
1048 	ROM_REGION( 0x8000, "ibios_rom", 0 )
1049 	ROM_LOAD( "fz.ic7", 0x0000, 0x8000, CRC(48ae570d) SHA1(934f9fec47dcf9e49936388968d2db50c69950da) )
1050 
1051 	ROM_REGION( 0x10, "rp5h01", 0 )
1052 	ROM_LOAD( "security.prm", 0x00, 0x10, CRC(9650a7d0) SHA1(59d57ab2720cff3a24105a7250560c41def45acc) )
1053 ROM_END
1054 
1055 ROM_START( nss_sten )
1056 	NSS_BIOS
1057 	ROM_REGION( 0x100000, "user3", 0 )
1058 	ROM_LOAD( "nss-st-0.ic1", 0x000000, 0x100000, CRC(f131611f) SHA1(0797936e1fc9e705cd7e029097fc013a58e69002) )
1059 
1060 	/* instruction / data rom for bios */
1061 	ROM_REGION( 0x8000, "ibios_rom", 0 )
1062 	ROM_LOAD( "st.ic3", 0x0000, 0x8000, CRC(8880596e) SHA1(ec6d68fc2f51f7d94f496cd72cf898db65324542) )
1063 
1064 	ROM_REGION( 0x10, "rp5h01", 0 )
1065 	ROM_LOAD( "security.prm", 0x00, 0x10, CRC(2fd8475b) SHA1(38af97734649b90e0ea74cb1daeaa431e4295eb9) )
1066 ROM_END
1067 
1068 void nss_state::init_nss()
1069 {
1070 	uint8_t *PROM = memregion("rp5h01")->base();
1071 
1072 	for (int i = 0; i < 0x10; i++)
1073 		PROM[i] = bitswap<8>(PROM[i],0,1,2,3,4,5,6,7) ^ 0xff;
1074 
1075 	init_snes();
1076 }
1077 
1078 GAME( 199?, nss,       0,     nss,      snes, nss_state, init_snes, ROT0, "Nintendo",                    "Nintendo Super System BIOS", MACHINE_IS_BIOS_ROOT )
1079 GAME( 1992, nss_actr,  nss,   nss,      snes, nss_state, init_nss,  ROT0, "Enix",                        "Act Raiser (Nintendo Super System)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND )
1080 GAME( 1992, nss_adam,  nss,   nss,      snes, nss_state, init_nss,  ROT0, "Ocean",                       "The Addams Family (Nintendo Super System)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND )
1081 GAME( 1992, nss_aten,  nss,   nss,      snes, nss_state, init_nss,  ROT0, "Absolute Entertainment Inc.", "David Crane's Amazing Tennis (Nintendo Super System)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
1082 GAME( 1992, nss_con3,  nss,   nss,      snes, nss_state, init_nss,  ROT0, "Konami",                      "Contra 3: The Alien Wars (Nintendo Super System)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
1083 GAME( 1992, nss_lwep,  nss,   nss,      snes, nss_state, init_nss,  ROT0, "Ocean",                       "Lethal Weapon (Nintendo Super System)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
1084 GAME( 1992, nss_ncaa,  nss,   nss,      snes, nss_state, init_nss,  ROT0, "Sculptured Software Inc.",    "NCAA Basketball (Nintendo Super System)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
1085 GAME( 1992, nss_rob3,  nss,   nss,      snes, nss_state, init_nss,  ROT0, "Ocean",                       "Robocop 3 (Nintendo Super System)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
1086 GAME( 1992, nss_skin,  nss,   nss,      snes, nss_state, init_nss,  ROT0, "Irem",                        "Skins Game (Nintendo Super System)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) // can't start
1087 GAME( 1992, nss_ssoc,  nss,   nss,      snes, nss_state, init_nss,  ROT0, "Human Inc.",                  "Super Soccer (Nintendo Super System)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
1088 GAME( 1991, nss_smw,   nss,   nss,      snes, nss_state, init_nss,  ROT0, "Nintendo",                    "Super Mario World (Nintendo Super System)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
1089 GAME( 1991, nss_fzer,  nss,   nss,      snes, nss_state, init_nss,  ROT0, "Nintendo",                    "F-Zero (Nintendo Super System)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
1090 GAME( 1991, nss_sten,  nss,   nss,      snes, nss_state, init_nss,  ROT0, "Nintendo",                    "Super Tennis (Nintendo Super System)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
1091