1 // license:BSD-3-Clause
2 // copyright-holders:Roberto Fresca
3 /******************************************************************************
4
5 Wild Poker
6 TAB Austria.
7
8 Preliminary driver by Roberto Fresca.
9
10
11 Games running in this hardware:
12
13 * Wild Poker (ver. D 1.01), 199?, TAB Austria.
14
15
16 The HD63484 ACRTC support is incomplete,
17 due to the preliminary emulation state.
18
19 *******************************************************************************
20
21 Hardware Notes:
22 ---------------
23
24 CPU:
25 - 1x MC68000P12 ; 68000 CPU @ 12 MHz, from Motorola.
26 - 1x D8751H ; 8751 MCU (3.6864 MHz?)
27
28 Sound device:
29 - 1x AY8930 ; Sound IC, from Microchip Technology.
30
31 Video:
32 - 1x HD63484CP8 @ 8MHz ; Advanced CRT Controller (ACRTC), from Hitachi Semiconductor.
33 - 1x HD63485CP64 ; Hitachi - Graphic Memory Interface Controller (GMIC).
34 - 2x HD63486CP32 ; Hitachi - Graphic Video Attribute Controller (GVAC).
35
36 Other:
37 - 1x MC68681 ; Motorola - Dual Asynchronous Receiver/Transmitter.
38 - 4x XTALs.... ; 3.6864 / 12.000 / 26.000 / 24.000 MHz.
39
40 .--------.
41 PCB Layout: --+--------+--
42 .---------------------------------------------------------------------------------------+ +-----------------------------------------------------.
43 | | DB9 | |
44 | .--------. .--------. | | .--------. |
45 | |::::::::| |::::::::| '--------' |74HCT32P| |
46 | '--------' '--------' '--------' |
47 | .--------. .---------. .----------. .--------. .----------. .----------. .--------. |
48 | |LT1084CN| |SN75116N | | MM57410N | |74HCT14P| |74HCT245P | |74HCT245P | |74HCT86P| .-------. |
49 | '--------' '---------' '----------' '--------' '----------' '----------' '--------' |XTAL 3 | |
50 | .--------. .-------. | | |
51 | .--------. .---------. .-..-. | | |DM74S04| '-------' |
52 | | PC617 | |74HCT14P | | || | .----------------. '--------' '-------' |
53 | '--------' '---------' '-''-' | inmos 8941-C | |
54 |.--. .---------. .---------. .-----------. .--------. .---------------. | IMS G176P-50 | .----------. .----------. |
55 ||..| |ULN2803A | |74HCT533P| |PC74HC245P | |74HCT125| | HYUNDAI | | | |HY53C464LS| |HY53C464LS| |
56 ||..| '---------' '---------' '-----------' '--------' | HY6264LP-10 | '----------------' '----------' '----------' |
57 ||..| .------------------------. | 9040D KOREA | .-------------. .-------------. .----------. .----------. |
58 ||..| .---------. .---------. | AY8930 /P | '---------------' | | | | |HY53C464LS| |HY53C464LS| |
59 ||..| |ULN2803A | |74HCT533P| | 9019CCA | | | | | '----------' '----------' |
60 ||..| '---------' '---------' | TAIWAN | .---------------. | IE1 U | | 9117 | .----------. .----------. |
61 ||..| '------------------------' | HYUNDAI | | HD63484CP8 | | HD63486CP32 | |HY53C464LS| |HY53C464LS| |
62 ||..| .---------. .---------. | HY6264LP-10 | | | | | '----------' '----------' |
63 ||..| |ULN2803A | |74HCT533P| .--------. .--------. | 9040D KOREA | | Japan| | Japan| .----------. .----------. |
64 ||..| '---------' '---------' .---.|8 1| |8 1| '---------------' | | | | |HY53C464LS| |HY53C464LS| |
65 |'--' | || DSW1 | | DSW2 | | | | | '----------' '----------' |
66 | .---------. .---------. '---''--------' '--------' '-------------' '-------------' |
67 |.--. |ULN2803A | |74HCT533P| |
68 ||..| '---------' '---------' .------------------------. .----------. .----------. |
69 ||..| |D8751H | |HY53C464LS| |HY53C464LS| |
70 ||..| |L0381103 | .-------------. .-------------. '----------' '----------' |
71 ||..| .--------. .---------. | VD1.00 | .------------------. | | | | .----------. .----------. |
72 ||..| |MDP1603 | |74HCT245P| '------------------------' |D27C020 | | | | | |HY53C464LS| |HY53C464LS| |
73 |'--' '--------' '---------' .-------. .-------. | | | 9109 | | 9117 | '----------' '----------' |
74 | |XTAL 1 | |XTAL 2 | | VD / 1.01 / 3 | | HD63485CP64 | | HD63486CP32 | .----------. .----------. |
75 |.--. .--------. .---------. | | | | '------------------' | | | | |HY53C464LS| |HY53C464LS| |
76 ||..| |MDP1603 | |74HCT245P| '-------' '-------' | Japan| | Japan| '----------' '----------' |
77 ||..| '--------' '---------' .------------------------. | | | | .----------. .----------. |
78 ||..| | MC68681P | | | | | |HY53C464LS| |HY53C464LS| |
79 ||..| .--------. .---------. | 2C98R | '-------------' '-------------' '----------' '----------' |
80 ||..| |MDP1603 | |74HCT245P| | QQPQ9051 | |
81 ||..| '--------' '---------' '------------------------' .------------------. .--------. .--------. |
82 ||..| .--------. .--------. |D27C020 | | | | | |
83 ||..| .--------. .---------. |8 1| |74HCT147| | | '--------' '--------' |
84 ||..| |MDP1603 | |74HCT245P| | DSW3 | '--------' | VD / 1.01 / 1 | .--------. .--------. |
85 ||..| '--------' '---------' '--------' '------------------' |74HCT138| |74HCT74P| |
86 |'--' .----------. .-------. '--------' '--------' .------.
87 | .---------------------------------------. | GAL16V8S | |74HCT74| | |
88 | .-------. | | '----------' '-------' .--------. .--------. | |
89 | | | | MC68000P12 | .--------. .------. |74HCT138| |74HCT21P| | |
90 | |Battery| | 2C91E | |74HCT04P| |XTAL 4| '--------' '--------' | |
91 | | | | QZUZ9102 | '--------' | | .--------. .--------. | |
92 | | | | | .--------. '------' |74HCT138| |74HCT161| | |
93 | '-------' '---------------------------------------' |74HCT14P| '--------' '--------' | |
94 | '--------' .-------. .--------. .--------. | |
95 | .--. .--. |74HCT08| |74HCT21 | |1 8| | |
96 | |TL| |TL| '-------' '--------' | DSW4 | | |
97 | '--' '--' ======================================== '--------' '------'
98 | | |::::::::::::::::::::::::::::::::::::| | |
99 | | |::::::::::::::::::::::::::::::::::::| | |
100 | ======================================== |
101 '------------------------------------------------------------------------------------------------------------------------------------------------------'
102
103 XTAL 1: 3.6864 MHz.
104 XTAL 2: 12.000 MHz.
105 XTAL 3: 26.000 MHz.
106 XTAL 4: 24.000 MHz.
107
108 TL: TL7705ACP
109
110
111 DSW1: DSW2: DSW3: DSW4:
112 .--------. .--------. .--------. .--------.
113 1| oo oooo|8 1|oooooooo|8 1|oooooooo|8 1| o |8 ON
114 |--------| |--------| |--------| |--------|
115 |o o | | | | | |oo ooooo| OFF
116 '--------' '--------' '--------' '--------'
117
118
119 *******************************************************************************
120
121 *** Game Notes ***
122
123 Nothing yet...
124
125
126 *******************************************************************************
127
128 ---------------------------------
129 *** Memory Map (preliminary) ***
130 ---------------------------------
131
132 00000 - 7FFFF ; ROM space.
133
134
135 *******************************************************************************
136
137 DRIVER UPDATES:
138
139 [2012-06-11]
140
141 - Initial release.
142 - Pre-defined Xtals.
143 - Added ASCII PCB layout.
144 - Started a preliminary memory map.
145 - Added technical notes.
146
147
148 TODO:
149
150 - Improve memory map.
151 - ACRTC support.
152 - GFX decode.
153 - Sound support.
154 - A lot!.
155
156
157 *******************************************************************************/
158
159 #include "emu.h"
160 #include "cpu/m68000/m68000.h"
161 #include "machine/clock.h"
162 #include "machine/ds2401.h"
163 #include "machine/mc68681.h"
164 #include "machine/nvram.h"
165 #include "sound/ay8910.h"
166 #include "sound/dac.h"
167 #include "video/hd63484.h"
168 #include "video/ramdac.h"
169 #include "emupal.h"
170 #include "screen.h"
171 #include "speaker.h"
172
173
174 #define MAIN_CLOCK XTAL(12'000'000)
175 #define AY_CLOCK MAIN_CLOCK / 8
176 #define SEC_CLOCK XTAL(3'686'400)
177 #define AUX1_CLOCK XTAL(26'000'000)
178 #define AUX2_CLOCK XTAL(24'000'000)
179
180
181 class wildpkr_state : public driver_device
182 {
183 public:
wildpkr_state(const machine_config & mconfig,device_type type,const char * tag)184 wildpkr_state(const machine_config &mconfig, device_type type, const char *tag) :
185 driver_device(mconfig, type, tag),
186 m_maincpu(*this, "maincpu"),
187 m_duart(*this, "duart"),
188 m_id(*this, "id"),
189 m_dac(*this, "dac"),
190 m_dac_clock(*this, "dacclock"),
191 m_nvram(*this, "nvram")
192 { }
193
194 void wildpkr(machine_config &config);
195 void tabpkr(machine_config &config);
196
197 void init_wildpkr();
198
199 protected:
200 virtual void machine_start() override;
201 virtual void video_start() override;
202
203 private:
204 required_device<cpu_device> m_maincpu;
205 required_device<mc68681_device> m_duart;
206 optional_device<ds2401_device> m_id;
207 optional_device<dac_byte_interface> m_dac;
208 optional_device<clock_device> m_dac_clock;
209
210 optional_shared_ptr<u16> m_nvram;
211
212 u16 m_clock_rate;
213
214 void wildpkr_palette(palette_device &palette) const;
215 u8 unknown_read8();
216 void unknown_write8(u8 data);
217 void nvram_w(offs_t offset, u16 data);
218 u16 id_serial_r();
219 void id_serial_w(u16 data);
220 void out0_w(u16 data);
221 void out1_w(u16 data);
222 void dac_w(u8 data);
223 void clock_start_w(u16 data);
224 void clock_rate_w(u16 data);
225 void unknown_trigger_w(u16 data);
226 u16 tabpkr_irq_ack(offs_t offset);
227 void cpu_space_map(address_map &map);
228 void hd63484_map(address_map &map);
229 void ramdac_map(address_map &map);
230 void tabpkr_map(address_map &map);
231 void wildpkr_map(address_map &map);
232 };
233
234
235 /*************************
236 * Video Hardware *
237 *************************/
238
video_start()239 void wildpkr_state::video_start()
240 {
241 }
242
wildpkr_palette(palette_device & palette) const243 void wildpkr_state::wildpkr_palette(palette_device &palette) const
244 {
245 }
246
247
248 /*************************
249 * ACRTC Access *
250 *************************/
251
252
253 /*************************
254 * Misc Handlers *
255 *************************/
256
unknown_read8()257 u8 wildpkr_state::unknown_read8()
258 {
259 return 0xff;
260 }
261
unknown_write8(u8 data)262 void wildpkr_state::unknown_write8(u8 data)
263 {
264 }
265
nvram_w(offs_t offset,u16 data)266 void wildpkr_state::nvram_w(offs_t offset, u16 data)
267 {
268 m_nvram[offset] = data | 0xff00;
269 }
270
id_serial_r()271 u16 wildpkr_state::id_serial_r()
272 {
273 return m_id->read();
274 }
275
id_serial_w(u16 data)276 void wildpkr_state::id_serial_w(u16 data)
277 {
278 m_id->write(data & 1);
279 }
280
out0_w(u16 data)281 void wildpkr_state::out0_w(u16 data)
282 {
283 }
284
out1_w(u16 data)285 void wildpkr_state::out1_w(u16 data)
286 {
287 }
288
dac_w(u8 data)289 void wildpkr_state::dac_w(u8 data)
290 {
291 m_dac->write(data);
292 }
293
clock_start_w(u16 data)294 void wildpkr_state::clock_start_w(u16 data)
295 {
296 if (data != 0 && m_clock_rate != 0)
297 m_dac_clock->set_clock_scale(1.0 / m_clock_rate);
298 else
299 m_dac_clock->set_clock_scale(0.0);
300 }
301
clock_rate_w(u16 data)302 void wildpkr_state::clock_rate_w(u16 data)
303 {
304 m_clock_rate = data;
305 }
306
unknown_trigger_w(u16 data)307 void wildpkr_state::unknown_trigger_w(u16 data)
308 {
309 }
310
311 /*************************
312 * Memory Map *
313 *************************/
314
wildpkr_map(address_map & map)315 void wildpkr_state::wildpkr_map(address_map &map)
316 {
317 map(0x000000, 0x0fffff).rom();
318 map(0x100000, 0x113fff).ram();
319 map(0x800000, 0x800003).rw("acrtc", FUNC(hd63484_device::read16), FUNC(hd63484_device::write16));
320 map(0x800080, 0x80009f).rw(m_duart, FUNC(mc68681_device::read), FUNC(mc68681_device::write)).umask16(0x00ff);
321 map(0x800180, 0x800180).r(FUNC(wildpkr_state::unknown_read8));
322 map(0x800181, 0x800181).w(FUNC(wildpkr_state::unknown_write8));
323 map(0x800200, 0x800200).w("ramdac", FUNC(ramdac_device::index_w));
324 map(0x800202, 0x800202).w("ramdac", FUNC(ramdac_device::pal_w));
325 map(0x800204, 0x800204).w("ramdac", FUNC(ramdac_device::mask_w));
326 map(0x800280, 0x800280).w("aysnd", FUNC(ay8930_device::data_w));
327 map(0x800282, 0x800282).w("aysnd", FUNC(ay8930_device::address_w));
328 map(0x800285, 0x800285).r("aysnd", FUNC(ay8930_device::data_r)); // (odd!)
329 map(0x800286, 0x800289).nopw();
330 }
331
tabpkr_map(address_map & map)332 void wildpkr_state::tabpkr_map(address_map &map)
333 {
334 map(0x000000, 0x2fffff).rom();
335 map(0x300000, 0x303fff).ram();
336 map(0x400000, 0x400fff).ram().w(FUNC(wildpkr_state::nvram_w)).share("nvram");
337 map(0x500000, 0x500003).rw("acrtc", FUNC(hd63484_device::read16), FUNC(hd63484_device::write16));
338 map(0x500021, 0x500021).rw("ramdac", FUNC(ramdac_device::index_r), FUNC(ramdac_device::index_w));
339 map(0x500023, 0x500023).rw("ramdac", FUNC(ramdac_device::pal_r), FUNC(ramdac_device::pal_w));
340 map(0x500025, 0x500025).rw("ramdac", FUNC(ramdac_device::mask_r), FUNC(ramdac_device::mask_w));
341 map(0x500040, 0x50005f).rw(m_duart, FUNC(mc68681_device::read), FUNC(mc68681_device::write)).umask16(0x00ff);
342 map(0x500060, 0x500061).rw(FUNC(wildpkr_state::id_serial_r), FUNC(wildpkr_state::id_serial_w));
343 map(0x600000, 0x600001).portr("IN0").w(FUNC(wildpkr_state::out0_w));
344 map(0x600002, 0x600003).portr("IN1").w(FUNC(wildpkr_state::out1_w));
345 map(0x600004, 0x600005).portr("IN2");
346 map(0x600004, 0x600004).w(FUNC(wildpkr_state::dac_w));
347 map(0x700000, 0x700001).w(FUNC(wildpkr_state::clock_start_w));
348 map(0x700002, 0x700003).w(FUNC(wildpkr_state::clock_rate_w));
349 map(0x700004, 0x700007).w(FUNC(wildpkr_state::unknown_trigger_w));
350 map(0x70000a, 0x70000b).nopw(); // only writes 0 at POST
351 }
352
hd63484_map(address_map & map)353 void wildpkr_state::hd63484_map(address_map &map)
354 {
355 map(0x00000, 0x3ffff).ram();
356 }
357
358 /* Unknown R/W:
359
360
361 */
362
363
364 /*************************
365 * Input Ports *
366 *************************/
367
INPUT_PORTS_START(wildpkr)368 static INPUT_PORTS_START( wildpkr )
369 INPUT_PORTS_END
370
371 static INPUT_PORTS_START( tabpkr )
372 PORT_START("IN0")
373 PORT_BIT(0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN)
374 PORT_BIT(0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN)
375 PORT_BIT(0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN)
376 PORT_BIT(0x0008, IP_ACTIVE_LOW, IPT_UNKNOWN)
377 PORT_BIT(0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN)
378 PORT_BIT(0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN)
379 PORT_BIT(0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN)
380 PORT_BIT(0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN)
381 PORT_BIT(0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN)
382 PORT_BIT(0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN)
383 PORT_BIT(0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN)
384 PORT_BIT(0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN)
385 PORT_BIT(0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN)
386 PORT_BIT(0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN)
387 PORT_BIT(0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN)
388 PORT_BIT(0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN)
389
390 PORT_START("IN1")
391 PORT_BIT(0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN)
392 PORT_BIT(0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN)
393 PORT_BIT(0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN)
394 PORT_BIT(0x0008, IP_ACTIVE_LOW, IPT_UNKNOWN)
395 PORT_BIT(0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN)
396 PORT_BIT(0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN)
397 PORT_BIT(0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN)
398 PORT_BIT(0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN)
399 PORT_BIT(0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN)
400 PORT_BIT(0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN)
401 PORT_BIT(0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN)
402 PORT_BIT(0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN)
403 PORT_BIT(0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN)
404 PORT_BIT(0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN)
405 PORT_BIT(0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN)
406 PORT_BIT(0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN)
407
408 PORT_START("IN2")
409 PORT_BIT(0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN)
410 PORT_BIT(0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN)
411 PORT_BIT(0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN)
412 PORT_BIT(0x0008, IP_ACTIVE_LOW, IPT_UNKNOWN)
413 PORT_BIT(0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN)
414 PORT_BIT(0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN)
415 PORT_BIT(0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN)
416 PORT_BIT(0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN)
417 PORT_BIT(0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN)
418 PORT_BIT(0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN)
419 PORT_BIT(0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN)
420 PORT_BIT(0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN)
421 PORT_BIT(0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN)
422 PORT_BIT(0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN)
423 PORT_BIT(0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN)
424 PORT_BIT(0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN)
425 INPUT_PORTS_END
426
427
428 /*************************
429 * Machine Start *
430 *************************/
431
432 void wildpkr_state::machine_start()
433 {
434 /*
435 ACRTC memory:
436
437 00000-3ffff = RAM
438 40000-7ffff = ROM
439 80000-bffff = unused
440 c0000-fffff = unused
441 */
442 m_clock_rate = 0;
443 }
444
445
ramdac_map(address_map & map)446 void wildpkr_state::ramdac_map(address_map &map)
447 {
448 map(0x000, 0x3ff).rw("ramdac", FUNC(ramdac_device::ramdac_pal_r), FUNC(ramdac_device::ramdac_rgb666_w));
449 }
450
451
cpu_space_map(address_map & map)452 void wildpkr_state::cpu_space_map(address_map &map)
453 {
454 map(0xfffff2, 0xffffff).r(FUNC(wildpkr_state::tabpkr_irq_ack));
455 }
456
tabpkr_irq_ack(offs_t offset)457 u16 wildpkr_state::tabpkr_irq_ack(offs_t offset)
458 {
459 m_maincpu->set_input_line(offset+1, CLEAR_LINE);
460
461 if (offset+1 == 2)
462 return m_duart->get_irq_vector();
463 else
464 return m68000_device::autovector(offset+1);
465 }
466
467
468 /*************************
469 * Machine Drivers *
470 *************************/
471
wildpkr(machine_config & config)472 void wildpkr_state::wildpkr(machine_config &config)
473 {
474 /* basic machine hardware */
475 M68000(config, m_maincpu, MAIN_CLOCK);
476 m_maincpu->set_addrmap(AS_PROGRAM, &wildpkr_state::wildpkr_map);
477 //m_maincpu->set_vblank_int("screen", FUNC(wildpkr_state::irq2_line_hold)); // guess
478
479 MC68681(config, m_duart, SEC_CLOCK);
480
481 screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
482 screen.set_refresh_hz(60);
483 screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500));
484 screen.set_size(384, 280);
485 screen.set_visarea(0, 384-1, 0, 280-1);
486 screen.set_screen_update("acrtc", FUNC(hd63484_device::update_screen));
487 screen.set_palette("palette");
488
489 HD63484(config, "acrtc", 0).set_addrmap(0, &wildpkr_state::hd63484_map);
490
491 ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, "palette"));
492 ramdac.set_addrmap(0, &wildpkr_state::ramdac_map);
493
494 PALETTE(config, "palette", FUNC(wildpkr_state::wildpkr_palette), 256);
495
496 /* sound hardware */
497 SPEAKER(config, "mono").front_center();
498 AY8930(config, "aysnd", AY_CLOCK).add_route(ALL_OUTPUTS, "mono", 0.50);
499 }
500
501
tabpkr(machine_config & config)502 void wildpkr_state::tabpkr(machine_config &config)
503 {
504 /* basic machine hardware */
505 M68000(config, m_maincpu, XTAL(24'000'000) / 2);
506 m_maincpu->set_addrmap(AS_PROGRAM, &wildpkr_state::tabpkr_map);
507 m_maincpu->set_periodic_int(FUNC(wildpkr_state::irq3_line_assert), attotime::from_hz(60*256));
508 m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &wildpkr_state::cpu_space_map);
509
510 NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1); // DS1220Y
511
512 MC68681(config, m_duart, 3686400);
513 m_duart->irq_cb().set_inputline(m_maincpu, M68K_IRQ_2, ASSERT_LINE);
514
515 DS2401(config, m_id, 0);
516
517 CLOCK(config, m_dac_clock, 1500000); // base rate derived from program code
518 m_dac_clock->signal_handler().set_inputline(m_maincpu, M68K_IRQ_5, ASSERT_LINE);
519
520 screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
521 screen.set_refresh_hz(60);
522 screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500));
523 screen.set_size(384, 280);
524 screen.set_visarea(0, 384-1, 0, 280-1);
525 screen.set_screen_update("acrtc", FUNC(hd63484_device::update_screen));
526 screen.set_palette("palette");
527 screen.screen_vblank().set_inputline(m_maincpu, M68K_IRQ_4, ASSERT_LINE);
528
529 HD63484(config, "acrtc", 0).set_addrmap(0, &wildpkr_state::hd63484_map);
530
531 ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, "palette"));
532 ramdac.set_addrmap(0, &wildpkr_state::ramdac_map);
533
534 PALETTE(config, "palette", FUNC(wildpkr_state::wildpkr_palette), 256);
535
536 /* sound hardware */
537 SPEAKER(config, "mono").front_center();
538 AD557(config, m_dac, 0).add_route(ALL_OUTPUTS, "mono", 0.50);
539 }
540
541
542 /*************************
543 * Rom Load *
544 *************************/
545
546 ROM_START( wildpkr )
547 ROM_REGION( 0x100000, "maincpu", 0 )
CRC(d19d5609)548 ROM_LOAD16_BYTE( "vd_1.01_3.bin", 0x000000, 0x40000, CRC(d19d5609) SHA1(87eedb7daaa8ac33c0a73e4e849b9a0f76152261) )
549 ROM_LOAD16_BYTE( "vd_1.01_1.bin", 0x000001, 0x40000, CRC(f10644ab) SHA1(5872fe41b8c7fec5e83011abdf82a85f064b734f) )
550
551 ROM_REGION( 0x1000, "mcu", 0 )
552 ROM_LOAD( "d8751h", 0x0000, 0x1000, NO_DUMP )
553
554 ROM_REGION( 0x0200, "plds", 0 )
555 ROM_LOAD( "gal6v8s.bin", 0x0000, 0x0117, CRC(389c63a7) SHA1(4ebb26a001ed14a9e96dd268ed1c7f298f0c086b) )
556 ROM_END
557
558 /* seems to be different hardware, but same basic video chips, keep here or move?
559
560 cpu 68000-16
561 Xtal 24Mhaz
562 cpu ram 2x 6264
563
564 Audio DAC AD557JN
565
566 video area
567 insg176p-66 ramdac?
568 hd63487cp Memory interface and video attribute controller
569 hd63484cp8 advanced CRT controller
570 4x km44c258cz-10 rams
571
572 */
573
574 ROM_START( tabpkr ) // Royal Poker V 1.85 Oct 29 1996 12:20:07
575 ROM_REGION( 0x300000, "maincpu", ROMREGION_ERASEFF )
576 ROM_LOAD16_BYTE( "rop1851.bin", 0x000001, 0x80000, CRC(fbe13fa8) SHA1(7c19b6b4d9a9935b6feb70b6261bafc6d9afb59f) )
577 ROM_LOAD16_BYTE( "rop1853.bin", 0x000000, 0x80000, CRC(e0c312b4) SHA1(57c64c82f723067b7b2f9bf3fdaf5aedeb4f9dc3) )
578 // are these missing, or just unpopulated but checked anyway?
579 /* reads 0x100000 - 0x1fffff ? - 2x sockets for same type of roms as above */
580 /* reads 0x200000 - 0x2fffff ? - 1x socket for larger ROM? */
581
582 ROM_REGION(8, "id", 0)
583 ROM_LOAD("ds2401.bin", 0, 8, NO_DUMP)
584 // Dummy data to appease POST
585 ROM_FILL(0, 1, 0x66)
586 ROM_FILL(1, 1, 0xfa)
587 ROM_FILL(2, 1, 0xce)
588 ROM_FILL(3, 1, 0xde)
589 ROM_FILL(4, 1, 0xad)
590 ROM_FILL(5, 1, 0xbe)
591 ROM_FILL(6, 1, 0xef)
592 ROM_FILL(7, 1, 0x01)
593 ROM_END
594
595
596
597 /*************************
598 * Driver Init *
599 *************************/
600
601 void wildpkr_state::init_wildpkr()
602 {
603 }
604
605
606 /*************************
607 * Game Drivers *
608 *************************/
609
610 // YEAR NAME PARENT MACHINE INPUT STATE INIT ROT COMPANY FULLNAME FLAGS
611 GAME( 199?, wildpkr, 0, wildpkr, wildpkr, wildpkr_state, init_wildpkr, ROT0, "TAB Austria", "Wild Poker (ver. D 1.01)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION )
612 GAME( 1996, tabpkr, 0, tabpkr, tabpkr, wildpkr_state, init_wildpkr, ROT0, "TAB Austria", "Royal Poker V 1.85", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION )
613