1 // license:BSD-3-Clause
2 // copyright-holders:David Haywood
3 #ifndef MAME_VIDEO_NAMCOS21_DSP_H
4 #define MAME_VIDEO_NAMCOS21_DSP_H
5 
6 #pragma once
7 
8 #include "cpu/tms32025/tms32025.h"
9 #include "video/namcos21_3d.h"
10 
11 #define WINRUN_MAX_POLY_PARAM (1+256*3)
12 
13 #define PTRAM_SIZE 0x20000
14 
15 class namcos21_dsp_device : public device_t
16 {
17 public:
18 	namcos21_dsp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
19 
20 	// config
set_renderer_tag(T && tag)21 	template <typename T> void set_renderer_tag(T &&tag) { m_renderer.set_tag(std::forward<T>(tag)); }
22 
23 	void winrun_dspbios_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
24 	uint16_t winrun_68k_dspcomram_r(offs_t offset);
25 	void winrun_68k_dspcomram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
26 	uint16_t winrun_dspcomram_control_r(offs_t offset);
27 	void winrun_dspcomram_control_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
28 
29 	void pointram_control_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
30 	uint16_t pointram_data_r();
31 	void pointram_data_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
32 
33 protected:
34 	// device-level overrides
35 	virtual void device_start() override;
36 	virtual void device_reset() override;
37 
38 	virtual void device_add_mconfig(machine_config &config) override;
39 
40 	void winrun_dsp_data(address_map &map);
41 	void winrun_dsp_io(address_map &map);
42 	void winrun_dsp_program(address_map &map);
43 private:
44 
45 	required_device<cpu_device> m_dsp;
46 	required_shared_ptr<uint16_t> m_winrun_dspbios;
47 	required_shared_ptr<uint16_t> m_winrun_polydata;
48 	required_region_ptr<uint16_t> m_ptrom16;
49 
50 	required_device<namcos21_3d_device> m_renderer;
51 	std::unique_ptr<uint8_t[]> m_pointram;
52 	int m_pointram_idx;
53 	uint16_t m_pointram_control;
54 
55 	uint16_t m_winrun_dspcomram_control[8];
56 	std::unique_ptr<uint16_t[]> m_winrun_dspcomram;
57 	uint16_t m_winrun_poly_buf[WINRUN_MAX_POLY_PARAM];
58 	int m_winrun_poly_index;
59 	uint32_t m_winrun_pointrom_addr;
60 	int m_winrun_dsp_alive;
61 
62 	void winrun_flush_poly();
63 
64 	int m_poly_frame_width;
65 	int m_poly_frame_height;
66 
67 	uint16_t winrun_cuskey_r();
68 	void winrun_cuskey_w(uint16_t data);
69 	uint16_t winrun_dspcomram_r(offs_t offset);
70 	void winrun_dspcomram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
71 	uint16_t winrun_table_r(offs_t offset);
72 	void winrun_dsp_complete_w(uint16_t data);
73 	void winrun_dsp_render_w(uint16_t data);
74 	uint16_t winrun_poly_reset_r();
75 	void winrun_dsp_pointrom_addr_w(offs_t offset, uint16_t data);
76 	uint16_t winrun_dsp_pointrom_data_r();
77 
78 	TIMER_CALLBACK_MEMBER(suspend_callback);
79 	emu_timer *m_suspend_timer;
80 
81 };
82 
83 DECLARE_DEVICE_TYPE(NAMCOS21_DSP, namcos21_dsp_device)
84 
85 #endif // MAME_VIDEO_NAMCOS21_DSP_H
86