1 // license:BSD-3-Clause
2 // copyright-holders:Angelo Salese, Mariusz Wojcieszek
3 /*****************************************************************************
4  *
5  * Sega SCUDSP emulator
6  *
7  *****************************************************************************/
8 
9 #ifndef MAME_CPU_SCUDSP_SCUDSP_H
10 #define MAME_CPU_SCUDSP_SCUDSP_H
11 
12 #pragma once
13 
14 enum
15 {
16 	SCUDSP_PC=1,
17 	SCUDSP_FLAGS,
18 	SCUDSP_DELAY,
19 	SCUDSP_TOP,
20 	SCUDSP_LOP,
21 	SCUDSP_RX,
22 	SCUDSP_MUL,
23 	SCUDSP_RY,
24 	SCUDSP_ALU,
25 	SCUDSP_PH,
26 	SCUDSP_PL,
27 	SCUDSP_ACH,
28 	SCUDSP_ACL,
29 	SCUDSP_RA0,
30 	SCUDSP_WA0,
31 	SCUDSP_RA,
32 	SCUDSP_CT0,
33 	SCUDSP_CT1,
34 	SCUDSP_CT2,
35 	SCUDSP_CT3
36 };
37 
38 
39 #define SCUDSP_RESET        INPUT_LINE_RESET    /* Non-Maskable */
40 
41 class scudsp_cpu_device : public cpu_device
42 {
43 public:
44 	// construction/destruction
45 	scudsp_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
46 
out_irq_callback()47 	auto out_irq_callback() { return m_out_irq_cb.bind(); }
in_dma_callback()48 	auto in_dma_callback() { return m_in_dma_cb.bind(); }
out_dma_callback()49 	auto out_dma_callback() { return m_out_dma_cb.bind(); }
50 
51 	/* port 0 */
52 	uint32_t program_control_r();
53 	void program_control_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
54 	/* port 1 */
55 	void program_w(uint32_t data);
56 	/* port 2 */
57 	void ram_address_control_w(uint32_t data);
58 	/* port 3 */
59 	uint32_t ram_address_r();
60 	void ram_address_w(uint32_t data);
61 
62 	void data_map(address_map &map);
63 	void program_map(address_map &map);
64 protected:
65 	// device-level overrides
66 	virtual void device_start() override;
67 	virtual void device_reset() override;
68 
69 	// device_execute_interface overrides
execute_min_cycles()70 	virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
execute_max_cycles()71 	virtual uint32_t execute_max_cycles() const noexcept override { return 7; }
execute_input_lines()72 	virtual uint32_t execute_input_lines() const noexcept override { return 0; }
73 	virtual void execute_run() override;
74 	virtual void execute_set_input(int inputnum, int state) override;
75 
76 	// device_memory_interface overrides
77 	virtual space_config_vector memory_space_config() const override;
78 
79 	// device_state_interface overrides
80 	virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
81 
82 	// device_disasm_interface overrides
83 	virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
84 
85 	devcb_write_line     m_out_irq_cb;
86 	devcb_read16         m_in_dma_cb;
87 	devcb_write16        m_out_dma_cb;
88 
89 private:
90 	union SCUDSPREG32 {
91 		int32_t  si;
92 		uint32_t ui;
93 	};
94 
95 	union SCUDSPREG16 {
96 		int16_t  si;
97 		uint16_t ui;
98 	};
99 
100 	address_space_config m_program_config;
101 	address_space_config m_data_config;
102 
103 	uint8_t   m_pc;   /* registers */
104 	uint32_t  m_flags;  /* flags */
105 	uint8_t   m_ra;
106 	uint8_t   m_ct0,m_ct1,m_ct2,m_ct3;
107 	uint8_t   m_delay;                                   /* Delay */
108 	uint8_t   m_top;                                     /*Jump Command memory*/
109 	uint16_t  m_lop;                                    /*Counter Register*/   /*12-bits*/
110 	SCUDSPREG32 m_rx;                                /*X-Bus register*/
111 	int64_t   m_mul;                                     /*Multiplier register*//*48-bits*/
112 	SCUDSPREG32 m_ry;                                /*Y-Bus register*/
113 	int64_t   m_alu;                                    /*ALU register*/       /*48-bits*/
114 	SCUDSPREG16 m_ph;                                /*ALU high register*/
115 	SCUDSPREG32 m_pl;                                /*ALU low register*/
116 	SCUDSPREG16 m_ach;                               /*ALU external high register*/
117 	SCUDSPREG32 m_acl;                               /*ALU external low register*/
118 	uint32_t  m_ra0,m_wa0;                                /*DSP DMA registers*/
119 	struct{
120 		uint32_t src, dst;
121 		uint16_t add;
122 		uint16_t size, update, ex, dir, count;
123 	}m_dma;
124 	address_space *m_program;
125 	address_space *m_data;
126 	int m_icount;
127 	uint8_t m_update_mul;
128 
129 	uint32_t scudsp_get_source_mem_reg_value( uint32_t mode );
130 	uint32_t scudsp_get_source_mem_value(uint8_t mode);
131 	void scudsp_set_dest_mem_reg( uint32_t mode, uint32_t value );
132 	void scudsp_set_dest_mem_reg_2( uint32_t mode, uint32_t value );
133 	uint32_t scudsp_compute_condition( uint32_t condition );
134 	uint32_t scudsp_get_mem_source_dma( uint32_t memcode, uint32_t counter );
135 	void scudsp_set_dest_dma_mem( uint32_t memcode, uint32_t value, uint32_t counter );
136 
137 	void scudsp_illegal(uint32_t opcode);
138 	void scudsp_operation(uint32_t opcode);
139 	void scudsp_move_immediate(uint32_t opcode);
140 	void scudsp_dma(uint32_t opcode);
141 	void scudsp_jump(uint32_t opcode);
142 	void scudsp_loop(uint32_t opcode);
143 	void scudsp_end(uint32_t opcode);
144 	void scudsp_exec_dma();
145 };
146 
147 
148 DECLARE_DEVICE_TYPE(SCUDSP, scudsp_cpu_device)
149 
150 #endif // MAME_CPU_SCUDSP_SCUDSP_H
151