1 // license:BSD-3-Clause
2 // copyright-holders:Tony La Porta, hap
3 	/**************************************************************************\
4 	*                Texas Instruments TMS320x25 DSP Emulator                  *
5 	*                                                                          *
6 	*                 Copyright Tony La Porta                                  *
7 	*                      Written for the MAME project.                       *
8 	*                                                                          *
9 	*      Note :  This is a word based microcontroller, with addressing       *
10 	*              architecture based on the Harvard addressing scheme.        *
11 	*                                                                          *
12 	*  Three versions of the chip are available, and they are:                 *
13 	*  TMS320C25   Internal ROM one time programmed at TI                      *
14 	*  TMS320E25   Internal ROM programmable as a normal EPROM                 *
15 	*  TMS320P25   Internal ROM programmable once as a normal EPROM only       *
16 	*  These devices can also be used as a MicroController with external ROM   *
17 	*                                                                          *
18 	\***************************************************************************/
19 
20 #ifndef MAME_TMS32025_TMS32025_H
21 #define MAME_TMS32025_TMS32025_H
22 
23 #pragma once
24 
25 
26 /****************************************************************************
27  *  Interrupt constants
28  */
29 
30 #define TMS32025_INT0             0         /* External INT0 */
31 #define TMS32025_INT1             1         /* External INT1 */
32 #define TMS32025_INT2             2         /* External INT2 */
33 #define TMS32025_TINT             3         /* Internal Timer interrupt */
34 #define TMS32025_RINT             4         /* Serial Port receive  interrupt */
35 #define TMS32025_XINT             5         /* Serial Port transmit interrupt */
36 #define TMS32025_TRAP             6         /* Trap instruction */
37 #define TMS32025_INT_NONE         -1
38 
39 /* Non-irq line */
40 #define TMS32025_FSX              7         /* Frame synchronisation */
41 
42 enum
43 {
44 	TMS32025_PC=1,
45 	TMS32025_PFC,  TMS32025_STR0, TMS32025_STR1, TMS32025_IFR,
46 	TMS32025_RPTC, TMS32025_ACC,  TMS32025_PREG, TMS32025_TREG,
47 	TMS32025_AR0,  TMS32025_AR1,  TMS32025_AR2,  TMS32025_AR3,
48 	TMS32025_AR4,  TMS32025_AR5,  TMS32025_AR6,  TMS32025_AR7,
49 	TMS32025_STK0, TMS32025_STK1, TMS32025_STK2, TMS32025_STK3,
50 	TMS32025_STK4, TMS32025_STK5, TMS32025_STK6, TMS32025_STK7,
51 	TMS32025_DRR,  TMS32025_DXR,  TMS32025_TIM,  TMS32025_PRD,
52 	TMS32025_IMR,  TMS32025_GREG
53 };
54 
55 
56 /****************************************************************************
57  *  Public Functions
58  */
59 
60 
61 class tms32025_device : public cpu_device
62 {
63 public:
64 	// construction/destruction
65 	tms32025_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
66 	tms32025_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
67 
68 	// configuration helpers
bio_in_cb()69 	auto bio_in_cb() { return m_bio_in.bind(); }
hold_in_cb()70 	auto hold_in_cb() { return m_hold_in.bind(); }
hold_ack_out_cb()71 	auto hold_ack_out_cb() { return m_hold_ack_out.bind(); }
xf_out_cb()72 	auto xf_out_cb() { return m_xf_out.bind(); }
dr_in_cb()73 	auto dr_in_cb() { return m_dr_in.bind(); }
dx_out_cb()74 	auto dx_out_cb() { return m_dx_out.bind(); }
75 
set_mp_mc(bool state)76 	void set_mp_mc(bool state) { m_mp_mc = state; }
77 
78 	//void tms32025_program(address_map &map);
79 	void tms32025_data(address_map &map);
80 	void tms32026_data(address_map &map);
81 protected:
82 	tms32025_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor prgmap, address_map_constructor datamap);
83 
84 	// device-level overrides
85 	virtual void device_start() override;
86 	virtual void device_reset() override;
87 
88 	// device_execute_interface overrides
execute_min_cycles()89 	virtual uint32_t execute_min_cycles() const noexcept override { return 4; }
execute_max_cycles()90 	virtual uint32_t execute_max_cycles() const noexcept override { return 20; }
execute_input_lines()91 	virtual uint32_t execute_input_lines() const noexcept override { return 6; }
92 	virtual void execute_run() override;
93 	virtual void execute_set_input(int inputnum, int state) override;
94 
95 	// device_memory_interface overrides
96 	virtual space_config_vector memory_space_config() const override;
97 
98 	// device_state_interface overrides
99 	virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
100 
101 	// device_disasm_interface overrides
102 	virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
103 
104 	virtual const tiny_rom_entry *device_rom_region() const override;
105 
106 	void common_reset();
107 
108 	address_space_config m_program_config;
109 	address_space_config m_data_config;
110 	address_space_config m_io_config;
111 
112 	required_shared_ptr<uint16_t> m_b0;
113 	required_shared_ptr<uint16_t> m_b1;
114 	required_shared_ptr<uint16_t> m_b2;
115 	optional_shared_ptr<uint16_t> m_b3;
116 
117 	memory_access<16, 1, -1, ENDIANNESS_BIG>::cache m_cache;
118 	memory_access<16, 1, -1, ENDIANNESS_BIG>::specific m_program;
119 	memory_access<16, 1, -1, ENDIANNESS_BIG>::specific m_data;
120 	memory_access<16, 1, -1, ENDIANNESS_BIG>::specific m_io;
121 
122 	typedef void ( tms32025_device::*opcode_func ) ();
123 	struct tms32025_opcode
124 	{
125 		uint8_t       cycles;
126 		opcode_func function;
127 	};
128 	static const tms32025_opcode s_opcode_main[256];
129 	static const tms32025_opcode s_opcode_CE_subset[256];
130 	static const tms32025_opcode s_opcode_Dx_subset[8];
131 
132 	devcb_read16 m_bio_in;
133 	devcb_read16 m_hold_in;
134 	devcb_write16 m_hold_ack_out;
135 	devcb_write16 m_xf_out;
136 	devcb_read16 m_dr_in;
137 	devcb_write16 m_dx_out;
138 
139 
140 	/******************** CPU Internal Registers *******************/
141 	uint16_t  m_PREVPC;     /* previous program counter */
142 	uint16_t  m_PC;
143 	uint16_t  m_PFC;
144 	uint16_t  m_STR0, m_STR1;
145 	uint8_t   m_IFR;
146 	uint8_t   m_RPTC;
147 	PAIR    m_ACC;
148 	PAIR    m_Preg;
149 	uint16_t  m_Treg;
150 	uint16_t  m_AR[8];
151 	uint16_t  m_STACK[8];
152 	PAIR    m_ALU;
153 	uint16_t  m_drr, m_dxr, m_tim, m_prd, m_imr, m_greg;
154 
155 	uint16_t m_fixed_STR1;
156 
157 	uint8_t   m_timerover;
158 
159 	/********************** Status data ****************************/
160 	PAIR    m_opcode;
161 	int     m_idle;
162 	int     m_hold;
163 	int     m_external_mem_access;    /** required for hold mode. Implement it ! */
164 	int     m_init_load_addr;         /* 0=No, 1=Yes, 2=Once for repeat mode */
165 	int     m_tms32025_irq_cycles;
166 	int     m_tms32025_dec_cycles;
167 
168 	PAIR    m_oldacc;
169 	uint32_t  m_memaccess;
170 	int     m_icount;
171 	int     m_mHackIgnoreARP;          /* special handling for lst, lst1 instructions */
172 	int     m_waiting_for_serial_frame;
173 	bool    m_mp_mc;
174 
175 	uint16_t drr_r();
176 	void drr_w(uint16_t data);
177 	uint16_t dxr_r();
178 	void dxr_w(uint16_t data);
179 	uint16_t tim_r();
180 	void tim_w(uint16_t data);
181 	uint16_t prd_r();
182 	void prd_w(uint16_t data);
183 	uint16_t imr_r();
184 	void imr_w(uint16_t data);
185 	uint16_t greg_r();
186 	void greg_w(uint16_t data);
187 
188 	inline void CLR0(uint16_t flag);
189 	inline void SET0(uint16_t flag);
190 	inline void CLR1(uint16_t flag);
191 	inline void SET1(uint16_t flag);
192 	inline void MODIFY_DP(int data);
193 	inline void MODIFY_PM(int data);
194 	inline void MODIFY_ARP(int data);
195 	uint16_t reverse_carry_add(uint16_t arg0, uint16_t arg1 );
196 	inline void MODIFY_AR_ARP();
197 	inline void CALCULATE_ADD_CARRY();
198 	inline void CALCULATE_SUB_CARRY();
199 	inline void CALCULATE_ADD_OVERFLOW(int32_t addval);
200 	inline void CALCULATE_SUB_OVERFLOW(int32_t subval);
201 	inline uint16_t POP_STACK();
202 	inline void PUSH_STACK(uint16_t data);
203 	inline void SHIFT_Preg_TO_ALU();
204 	inline void GETDATA(int shift,int signext);
205 	inline void PUTDATA(uint16_t data);
206 	inline void PUTDATA_SST(uint16_t data);
207 	void opcodes_CE();
208 	void opcodes_Dx();
209 	void illegal();
210 	void abst();
211 	void add();
212 	void addc();
213 	void addh();
214 	void addk();
215 	void adds();
216 	void addt();
217 	void adlk();
218 	void adrk();
219 	void and_();
220 	void andk();
221 	void apac();
222 	void br();
223 	void bacc();
224 	void banz();
225 	void bbnz();
226 	void bbz();
227 	void bc();
228 	void bgez();
229 	void bgz();
230 	void bioz();
231 	void bit();
232 	void bitt();
233 	void blez();
234 	void blkd();
235 	void blkp();
236 	void blz();
237 	void bnc();
238 	void bnv();
239 	void bnz();
240 	void bv();
241 	void bz();
242 	void cala();
243 	void call();
244 	void cmpl();
245 	void cmpr();
246 	virtual void cnfd();
247 	virtual void cnfp();
248 	virtual void conf();
249 	void dint();
250 	void dmov();
251 	void eint();
252 	void fort();
253 	void idle();
254 	void in();
255 	void lac();
256 	void lack();
257 	void lact();
258 	void lalk();
259 	void lar_ar0();
260 	void lar_ar1();
261 	void lar_ar2();
262 	void lar_ar3();
263 	void lar_ar4();
264 	void lar_ar5();
265 	void lar_ar6();
266 	void lar_ar7();
267 	void lark_ar0();
268 	void lark_ar1();
269 	void lark_ar2();
270 	void lark_ar3();
271 	void lark_ar4();
272 	void lark_ar5();
273 	void lark_ar6();
274 	void lark_ar7();
275 	void ldp();
276 	void ldpk();
277 	void lph();
278 	void lrlk();
279 	void lst();
280 	void lst1();
281 	void lt();
282 	void lta();
283 	void ltd();
284 	void ltp();
285 	void lts();
286 	void mac();
287 	void macd();
288 	void mar();
289 	void mpy();
290 	void mpya();
291 	void mpyk();
292 	void mpys();
293 	void mpyu();
294 	void neg();
295 	void norm();
296 	void or_();
297 	void ork();
298 	void out();
299 	void pac();
300 	void pop();
301 	void popd();
302 	void pshd();
303 	void push();
304 	void rc();
305 	void ret();
306 	void rfsm();
307 	void rhm();
308 	void rol();
309 	void ror();
310 	void rovm();
311 	void rpt();
312 	void rptk();
313 	void rsxm();
314 	void rtc();
315 	void rtxm();
316 	void rxf();
317 	void sach();
318 	void sacl();
319 	void sar_ar0();
320 	void sar_ar1();
321 	void sar_ar2();
322 	void sar_ar3();
323 	void sar_ar4();
324 	void sar_ar5();
325 	void sar_ar6();
326 	void sar_ar7();
327 	void sblk();
328 	void sbrk_ar();
329 	void sc();
330 	void sfl();
331 	void sfr();
332 	void sfsm();
333 	void shm();
334 	void sovm();
335 	void spac();
336 	void sph();
337 	void spl();
338 	void spm();
339 	void sqra();
340 	void sqrs();
341 	void sst();
342 	void sst1();
343 	void ssxm();
344 	void stc();
345 	void stxm();
346 	void sub();
347 	void subb();
348 	void subc();
349 	void subh();
350 	void subk();
351 	void subs();
352 	void subt();
353 	void sxf();
354 	void tblr();
355 	void tblw();
356 	void trap();
357 	void xor_();
358 	void xork();
359 	void zalh();
360 	void zalr();
361 	void zals();
362 	inline int process_IRQs();
363 	inline void process_timer(int clocks);
364 };
365 
366 
367 class tms32026_device : public tms32025_device
368 {
369 public:
370 	// construction/destruction
371 	tms32026_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
372 
373 protected:
374 	virtual void device_reset() override;
375 	virtual void cnfd() override;
376 	virtual void cnfp() override;
377 	virtual void conf() override;
378 };
379 
380 DECLARE_DEVICE_TYPE(TMS32025, tms32025_device)
381 DECLARE_DEVICE_TYPE(TMS32026, tms32026_device)
382 
383 #endif // MAME_TMS32025_TMS32025_H
384