1 // license:BSD-3-Clause 2 // copyright-holders:Olivier Galibert 3 #ifndef MAME_MACHINE_WD_FDC_H 4 #define MAME_MACHINE_WD_FDC_H 5 6 #pragma once 7 8 #include "fdc_pll.h" 9 10 class floppy_image_device; 11 12 /* 13 * The Western Digital floppy controller family 14 * 15 16 * Chip Bus SCtrl SCmp Len HLO Motor Rdy MFM clock ENMF 58 pll 17 18 * fd1771 inverted n n y y n y n 2MHz n n analog 19 20 * fd1781 inverted n n y y n y y 1/2MHz n n analog 21 22 * fd1791 inverted n y n y n y y 1/2MHz n n analog 23 * fd1792 inverted n y n y n y n 1/2MHz n n analog 24 * fd1793 normal n y n y n y y 1/2MHz n n analog 25 * fd1794 normal n y n y n y n 1/2MHz n n analog 26 * fd1795 inverted y n y y n y y 1/2MHz n n analog 27 * fd1797 normal y n y y n y y 1/2MHz n n analog 28 29 * mb8866 inverted n n n y n y y 1/2MHz n n analog (fd1791 compatible) 30 * mb8876 inverted n y n y n y y 1/2MHz n n analog (fd1791-01/02 compatible) 31 * mb8877 normal n y n y n y y 1/2MHz n n analog (fd1793 compatible) 32 33 * fd1761 inverted n y n y n y y 1MHz n n analog 34 * fd1763 normal n y n y n y y 1MHz n n analog 35 * fd1765 inverted y n y y n y y 1MHz n n analog 36 * fd1767 normal y n y y n y y 1MHz n n analog 37 38 * wd2791 inverted n y n y n y y 1/2MHz y y analog 39 * wd2793 normal n y n y n y y 1/2MHz y y analog 40 * wd2795 inverted y n y y n y y 1/2MHz n y analog 41 * wd2797 normal y n y y n y y 1/2MHz n y analog 42 43 * wd1770 normal n n n n y n y 8Mhz n n digital 44 * wd1772 normal n n n n y n y 8MHz n n digital 45 * wd1773 normal n y n n n y y 8MHz n n digital 46 47 */ 48 49 50 class wd_fdc_device_base : public device_t { 51 public: intrq_wr_callback()52 auto intrq_wr_callback() { return intrq_cb.bind(); } drq_wr_callback()53 auto drq_wr_callback() { return drq_cb.bind(); } hld_wr_callback()54 auto hld_wr_callback() { return hld_cb.bind(); } enp_wr_callback()55 auto enp_wr_callback() { return enp_cb.bind(); } sso_wr_callback()56 auto sso_wr_callback() { return sso_cb.bind(); } ready_wr_callback()57 auto ready_wr_callback() { return ready_cb.bind(); } enmf_rd_callback()58 auto enmf_rd_callback() { return enmf_cb.bind(); } 59 mon_wr_callback()60 auto mon_wr_callback() { return mon_cb.bind(); } 61 62 void soft_reset(); 63 64 DECLARE_WRITE_LINE_MEMBER(dden_w); 65 void set_floppy(floppy_image_device *floppy); 66 void set_force_ready(bool force_ready); 67 void set_disable_motor_control(bool _disable_motor_control); 68 69 void cmd_w(uint8_t val); 70 uint8_t status_r(); 71 72 void track_w(uint8_t val); 73 uint8_t track_r(); 74 75 void sector_w(uint8_t val); 76 uint8_t sector_r(); 77 78 void data_w(uint8_t val); 79 uint8_t data_r(); 80 81 void write(offs_t reg, uint8_t val); 82 uint8_t read(offs_t reg); 83 84 DECLARE_READ_LINE_MEMBER(intrq_r); 85 DECLARE_READ_LINE_MEMBER(drq_r); 86 87 DECLARE_READ_LINE_MEMBER(hld_r); 88 DECLARE_WRITE_LINE_MEMBER(hlt_w); 89 90 DECLARE_READ_LINE_MEMBER(enp_r); 91 92 DECLARE_WRITE_LINE_MEMBER(mr_w); 93 94 void index_callback(floppy_image_device *floppy, int state); 95 96 protected: 97 wd_fdc_device_base(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); 98 99 // Chip-specific configuration flags 100 bool disable_mfm; 101 bool enmf; 102 bool has_enmf; 103 bool inverted_bus; 104 bool side_control; 105 bool side_compare; 106 bool head_control; 107 int hld_timeout; 108 bool motor_control; 109 bool ready_hooked; 110 int clock_ratio; 111 const int *step_times; 112 int delay_register_commit; 113 int delay_command_commit; 114 bool spinup_on_interrupt; 115 116 static constexpr int fd179x_step_times[4] = { 6000, 12000, 20000, 30000 }; 117 static constexpr int fd176x_step_times[4] = { 12000, 24000, 40000, 60000 }; 118 119 virtual void device_start() override; 120 virtual void device_reset() override; 121 virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; 122 123 virtual int calc_sector_size(uint8_t size, uint8_t command) const; 124 virtual int settle_time() const; 125 126 virtual void pll_reset(bool fm, bool enmf, const attotime &when) = 0; 127 virtual void pll_start_writing(const attotime &tm) = 0; 128 virtual void pll_commit(floppy_image_device *floppy, const attotime &tm) = 0; 129 virtual void pll_stop_writing(floppy_image_device *floppy, const attotime &tm) = 0; 130 virtual int pll_get_next_bit(attotime &tm, floppy_image_device *floppy, const attotime &limit) = 0; 131 virtual bool pll_write_next_bit(bool bit, attotime &tm, floppy_image_device *floppy, const attotime &limit) = 0; 132 virtual void pll_save_checkpoint() = 0; 133 virtual void pll_retrieve_checkpoint() = 0; 134 135 private: 136 enum { TM_GEN, TM_CMD, TM_TRACK, TM_SECTOR }; 137 138 // State machine general behaviour: 139 // 140 // There are three levels of state. 141 // 142 // Main state is associated to (groups of) commands. They're set 143 // by a *_start() function below, and the associated _continue() 144 // function can then be called at pretty much any time. 145 // 146 // Sub state is the state of execution within a command. The 147 // principle is that the *_start() function selects the initial 148 // substate, then the *_continue() function decides what to do, 149 // possibly changing state. Eventually it can: 150 // - decide to wait for an event (timer, index) 151 // - end the command with command_end() 152 // - start a live state (see below) 153 // 154 // In the first case, it must first switch to a waiting 155 // sub-state, then return. The waiting sub-state must just 156 // return immediately when *_continue is called. Eventually the 157 // event handler function will advance the state machine to 158 // another sub-state, and things will continue synchronously. 159 // 160 // On command end it's also supposed to return immediately. 161 // 162 // The last option is to switch to the next sub-state, start a 163 // live state with live_start() then return. The next sub-state 164 // will only be called once the live state is finished. 165 // 166 // Live states change continually depending on the disk contents 167 // until the next externally discernable event is found. They 168 // are checkpointing, run until an event is found, then they wait 169 // for it. When an event eventually happens, the changes are 170 // either committed or replayed until the sync event time. 171 // 172 // The transition to IDLE is only done on a synced event. Some 173 // other transitions, such as activating drq, are also done after 174 // syncing without exiting live mode. Syncing in live mode is 175 // done by calling live_delay() with the state to change to after 176 // syncing. 177 178 enum { 179 // General "doing nothing" state 180 IDLE, 181 182 // Main states - the commands 183 RESTORE, 184 SEEK, 185 STEP, 186 READ_SECTOR, 187 READ_TRACK, 188 READ_ID, 189 WRITE_TRACK, 190 WRITE_SECTOR, 191 192 // Sub states, plus the reset-time restore request 193 194 SPINUP, 195 SPINUP_WAIT, 196 SPINUP_DONE, 197 198 SETTLE_WAIT, 199 SETTLE_DONE, 200 201 DATA_LOAD_WAIT, 202 DATA_LOAD_WAIT_DONE, 203 204 SEEK_MOVE, 205 SEEK_WAIT_STEP_TIME, 206 SEEK_WAIT_STEP_TIME_DONE, 207 SEEK_WAIT_STABILIZATION_TIME, 208 SEEK_WAIT_STABILIZATION_TIME_DONE, 209 SEEK_DONE, 210 211 WAIT_INDEX, 212 WAIT_INDEX_DONE, 213 214 SCAN_ID, 215 SCAN_ID_FAILED, 216 217 SECTOR_READ, 218 SECTOR_WRITE, 219 TRACK_DONE, 220 221 INITIAL_RESTORE, 222 DUMMY, 223 224 // Live states 225 226 SEARCH_ADDRESS_MARK_HEADER, 227 READ_HEADER_BLOCK_HEADER, 228 READ_DATA_BLOCK_HEADER, 229 READ_ID_BLOCK_TO_LOCAL, 230 READ_ID_BLOCK_TO_DMA, 231 READ_ID_BLOCK_TO_DMA_BYTE, 232 SEARCH_ADDRESS_MARK_DATA, 233 SEARCH_ADDRESS_MARK_DATA_FAILED, 234 READ_SECTOR_DATA, 235 READ_SECTOR_DATA_BYTE, 236 READ_TRACK_DATA, 237 READ_TRACK_DATA_BYTE, 238 WRITE_TRACK_DATA, 239 WRITE_BYTE, 240 WRITE_BYTE_DONE, 241 WRITE_SECTOR_PRE, 242 WRITE_SECTOR_PRE_BYTE 243 }; 244 245 struct live_info { 246 enum { PT_NONE, PT_CRC_1, PT_CRC_2 }; 247 248 attotime tm; 249 int state, next_state; 250 uint16_t shift_reg; 251 uint16_t crc; 252 int bit_counter, byte_counter, previous_type; 253 bool data_separator_phase, data_bit_context; 254 uint8_t data_reg; 255 uint8_t idbuf[6]; 256 }; 257 258 enum { 259 S_BUSY = 0x01, 260 S_DRQ = 0x02, 261 S_IP = 0x02, 262 S_TR00 = 0x04, 263 S_LOST = 0x04, 264 S_CRC = 0x08, 265 S_RNF = 0x10, 266 S_HLD = 0x20, 267 S_SPIN = 0x20, // WD1770, WD1772 268 S_DDM = 0x20, 269 S_WF = 0x20, // WD1773 270 S_WP = 0x40, 271 S_NRDY = 0x80, 272 S_MON = 0x80 // WD1770, WD1772 273 }; 274 275 enum { 276 I_RDY = 0x01, 277 I_NRDY = 0x02, 278 I_IDX = 0x04, 279 I_IMM = 0x08 280 }; 281 282 283 floppy_image_device *floppy; 284 285 emu_timer *t_gen, *t_cmd, *t_track, *t_sector; 286 287 bool dden, status_type_1, intrq, drq, hld, hlt, enp, mr; 288 bool force_ready, disable_motor_control; 289 int main_state, sub_state; 290 uint8_t command, track, sector, data, status, intrq_cond; 291 int last_dir; 292 293 int counter, motor_timeout, sector_size; 294 295 int cmd_buffer, track_buffer, sector_buffer; 296 297 live_info cur_live, checkpoint_live; 298 299 devcb_write_line intrq_cb, drq_cb, hld_cb, enp_cb, sso_cb, ready_cb; 300 devcb_read_line enmf_cb; 301 devcb_write_line mon_cb; 302 303 uint8_t format_last_byte; 304 int format_last_byte_count; 305 std::string format_description_string; 306 307 void delay_cycles(emu_timer *tm, int cycles); 308 309 // Device timer subfunctions 310 void do_cmd_w(); 311 void do_track_w(); 312 void do_sector_w(); 313 void do_generic(); 314 315 316 // Main-state handling functions 317 void seek_start(int state); 318 void seek_continue(); 319 320 void read_sector_start(); 321 void read_sector_continue(); 322 323 void read_track_start(); 324 void read_track_continue(); 325 326 void read_id_start(); 327 void read_id_continue(); 328 329 void write_track_start(); 330 void write_track_continue(); 331 332 void write_sector_start(); 333 void write_sector_continue(); 334 335 void interrupt_start(); 336 337 void general_continue(); 338 void command_end(); 339 340 void spinup(); 341 void ready_callback(floppy_image_device *floppy, int state); 342 bool sector_matches() const; 343 bool is_ready(); 344 345 void live_start(int live_state); 346 void live_abort(); 347 void checkpoint(); 348 void rollback(); 349 void live_delay(int state); 350 void live_sync(); 351 void live_run(attotime limit = attotime::never); 352 bool read_one_bit(const attotime &limit); 353 bool write_one_bit(const attotime &limit); 354 355 void live_write_raw(uint16_t raw); 356 void live_write_mfm(uint8_t mfm); 357 void live_write_fm(uint8_t fm); 358 359 void set_drq(); 360 void drop_drq(); 361 362 void set_hld(); 363 void drop_hld(); 364 365 void update_sso(); 366 }; 367 368 class wd_fdc_analog_device_base : public wd_fdc_device_base { 369 protected: 370 wd_fdc_analog_device_base(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); 371 372 virtual void pll_reset(bool fm, bool enmf, const attotime &when) override; 373 virtual void pll_start_writing(const attotime &tm) override; 374 virtual void pll_commit(floppy_image_device *floppy, const attotime &tm) override; 375 virtual void pll_stop_writing(floppy_image_device *floppy, const attotime &tm) override; 376 virtual int pll_get_next_bit(attotime &tm, floppy_image_device *floppy, const attotime &limit) override; 377 virtual bool pll_write_next_bit(bool bit, attotime &tm, floppy_image_device *floppy, const attotime &limit) override; 378 virtual void pll_save_checkpoint() override; 379 virtual void pll_retrieve_checkpoint() override; 380 381 private: 382 fdc_pll_t cur_pll, checkpoint_pll; 383 }; 384 385 class wd_fdc_digital_device_base : public wd_fdc_device_base { 386 protected: 387 wd_fdc_digital_device_base(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); 388 389 static constexpr int wd_digital_step_times[4] = { 12000, 24000, 40000, 60000 }; 390 391 virtual void pll_reset(bool fm, bool enmf, const attotime &when) override; 392 virtual void pll_start_writing(const attotime &tm) override; 393 virtual void pll_commit(floppy_image_device *floppy, const attotime &tm) override; 394 virtual void pll_stop_writing(floppy_image_device *floppy, const attotime &tm) override; 395 virtual int pll_get_next_bit(attotime &tm, floppy_image_device *floppy, const attotime &limit) override; 396 virtual bool pll_write_next_bit(bool bit, attotime &tm, floppy_image_device *floppy, const attotime &limit) override; 397 virtual void pll_save_checkpoint() override; 398 virtual void pll_retrieve_checkpoint() override; 399 400 private: 401 struct digital_pll_t { 402 uint16_t counter; 403 uint16_t increment; 404 uint16_t transition_time; 405 uint8_t history; 406 uint8_t slot; 407 uint8_t phase_add, phase_sub, freq_add, freq_sub; 408 attotime ctime; 409 410 attotime delays[42]; 411 412 attotime write_start_time; 413 attotime write_buffer[32]; 414 int write_position; 415 416 void set_clock(const attotime &period); 417 void reset(const attotime &when); 418 int get_next_bit(attotime &tm, floppy_image_device *floppy, const attotime &limit); 419 bool write_next_bit(bool bit, attotime &tm, floppy_image_device *floppy, const attotime &limit); 420 void start_writing(const attotime &tm); 421 void commit(floppy_image_device *floppy, const attotime &tm); 422 void stop_writing(floppy_image_device *floppy, const attotime &tm); 423 }; 424 425 digital_pll_t cur_pll, checkpoint_pll; 426 }; 427 428 class fd1771_device : public wd_fdc_analog_device_base { 429 public: 430 fd1771_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 431 432 protected: 433 virtual int calc_sector_size(uint8_t size, uint8_t command) const override; 434 }; 435 436 class fd1781_device : public wd_fdc_analog_device_base { 437 public: 438 fd1781_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 439 440 protected: 441 virtual int calc_sector_size(uint8_t size, uint8_t command) const override; 442 }; 443 444 class fd1791_device : public wd_fdc_analog_device_base { 445 public: 446 fd1791_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 447 }; 448 449 class fd1792_device : public wd_fdc_analog_device_base { 450 public: 451 fd1792_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 452 }; 453 454 class fd1793_device : public wd_fdc_analog_device_base { 455 public: 456 fd1793_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 457 }; 458 459 class kr1818vg93_device : public wd_fdc_analog_device_base { 460 public: 461 kr1818vg93_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 462 }; 463 464 class fd1794_device : public wd_fdc_analog_device_base { 465 public: 466 fd1794_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 467 }; 468 469 class fd1795_device : public wd_fdc_analog_device_base { 470 public: 471 fd1795_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 472 473 protected: 474 virtual int calc_sector_size(uint8_t size, uint8_t command) const override; 475 }; 476 477 class fd1797_device : public wd_fdc_analog_device_base { 478 public: 479 fd1797_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 480 481 protected: 482 virtual int calc_sector_size(uint8_t size, uint8_t command) const override; 483 }; 484 485 class mb8866_device : public wd_fdc_analog_device_base { 486 public: 487 mb8866_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 488 }; 489 490 class mb8876_device : public wd_fdc_analog_device_base { 491 public: 492 mb8876_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 493 }; 494 495 class mb8877_device : public wd_fdc_analog_device_base { 496 public: 497 mb8877_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 498 }; 499 500 class fd1761_device : public wd_fdc_analog_device_base { 501 public: 502 fd1761_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 503 }; 504 505 class fd1763_device : public wd_fdc_analog_device_base { 506 public: 507 fd1763_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 508 }; 509 510 class fd1765_device : public wd_fdc_analog_device_base { 511 public: 512 fd1765_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 513 514 protected: 515 virtual int calc_sector_size(uint8_t size, uint8_t command) const override; 516 }; 517 518 class fd1767_device : public wd_fdc_analog_device_base { 519 public: 520 fd1767_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 521 522 protected: 523 virtual int calc_sector_size(uint8_t size, uint8_t command) const override; 524 }; 525 526 class wd2791_device : public wd_fdc_analog_device_base { 527 public: 528 wd2791_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); DECLARE_WRITE_LINE_MEMBER(enmf_w)529 DECLARE_WRITE_LINE_MEMBER(enmf_w) { enmf = state ? false : true; } 530 }; 531 532 class wd2793_device : public wd_fdc_analog_device_base { 533 public: 534 wd2793_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); DECLARE_WRITE_LINE_MEMBER(enmf_w)535 DECLARE_WRITE_LINE_MEMBER(enmf_w) { enmf = state ? false : true; } 536 }; 537 538 class wd2795_device : public wd_fdc_analog_device_base { 539 public: 540 wd2795_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 541 542 protected: 543 virtual int calc_sector_size(uint8_t size, uint8_t command) const override; 544 }; 545 546 class wd2797_device : public wd_fdc_analog_device_base { 547 public: 548 wd2797_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 549 550 protected: 551 virtual int calc_sector_size(uint8_t size, uint8_t command) const override; 552 }; 553 554 class wd1770_device : public wd_fdc_digital_device_base { 555 public: 556 wd1770_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 557 }; 558 559 class wd1772_device : public wd_fdc_digital_device_base { 560 public: 561 wd1772_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 562 563 protected: 564 virtual int settle_time() const override; 565 }; 566 567 class wd1773_device : public wd_fdc_digital_device_base { 568 public: 569 wd1773_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 570 }; 571 572 DECLARE_DEVICE_TYPE(FD1771, fd1771_device) 573 574 DECLARE_DEVICE_TYPE(FD1781, fd1781_device) 575 576 DECLARE_DEVICE_TYPE(FD1791, fd1791_device) 577 DECLARE_DEVICE_TYPE(FD1792, fd1792_device) 578 DECLARE_DEVICE_TYPE(FD1793, fd1793_device) 579 DECLARE_DEVICE_TYPE(KR1818VG93, kr1818vg93_device) 580 DECLARE_DEVICE_TYPE(FD1794, fd1794_device) 581 DECLARE_DEVICE_TYPE(FD1795, fd1795_device) 582 DECLARE_DEVICE_TYPE(FD1797, fd1797_device) 583 584 DECLARE_DEVICE_TYPE(MB8866, mb8866_device) 585 DECLARE_DEVICE_TYPE(MB8876, mb8876_device) 586 DECLARE_DEVICE_TYPE(MB8877, mb8877_device) 587 588 DECLARE_DEVICE_TYPE(FD1761, fd1761_device) 589 DECLARE_DEVICE_TYPE(FD1763, fd1763_device) 590 DECLARE_DEVICE_TYPE(FD1765, fd1765_device) 591 DECLARE_DEVICE_TYPE(FD1767, fd1767_device) 592 593 DECLARE_DEVICE_TYPE(WD2791, wd2791_device) 594 DECLARE_DEVICE_TYPE(WD2793, wd2793_device) 595 DECLARE_DEVICE_TYPE(WD2795, wd2795_device) 596 DECLARE_DEVICE_TYPE(WD2797, wd2797_device) 597 598 DECLARE_DEVICE_TYPE(WD1770, wd1770_device) 599 DECLARE_DEVICE_TYPE(WD1772, wd1772_device) 600 DECLARE_DEVICE_TYPE(WD1773, wd1773_device) 601 602 #endif // MAME_MACHINE_WD_FDC_H 603