1 // license:BSD-3-Clause
2 // copyright-holders:BUT
3 /*
4 
5 Chack'n Pop driver by BUT
6 
7 
8 Modified by Hau, Chack'n
9 
10 Chack'n Pop
11 Taito 1983
12 
13 PCB Layout
14 ----------
15 
16 Top board
17 
18 J1000045A
19 K1000220A
20  |------------------------|
21  |                        |
22  |             AO4_06.IC27|
23  |                        |
24  |                        |
25  |                        |
26  |                        |
27  |                        |
28  |                        |
29  |                        |
30  |                        |
31 |-|                       |
32 | |              Z80A     |
33 | |                       |
34 | | AO4_05.IC3   MSM2128  |
35 | |                       |
36 | |                       |
37 | |                       |
38 |-|                       |
39  |                        |
40  |------------------------|
41 Notes:
42       AO4_06.IC23 - Motorola MC68705P5 Micro-controller. Clock 3.000MHz [18/6]
43           MSM2128 - 2k x8 SRAM
44               Z80 - Clock 3.000MHz [18/6]
45 
46 
47 Middle Board
48 
49 J1000043A
50 K1000218A
51 M4200367A (sticker)
52 |-----------------------------------------------------|
53 | VOL  MB3731                                         |
54 |             MC14584                416  416        |-|
55 |                                    416  416        | |
56 |                    NE555           416  416        | |
57 |                                    416  416        | |
58 |    TD62003                         416  416        | |
59 |                                    416  416        | |
60 |2                                   416  416        | |
61 |2                                   416  416        |-|
62 |W                                                    |
63 |A                                                   |-|
64 |Y                                                   | |
65 |                        AO4_01.28                   | |
66 |    LM3900                                          | |
67 |         AY3-8910       AO4_02.27                   | |
68 |                    S                               | |
69 |         AY3-8910       AO4_03.26                   | |
70 |                                                    |-|
71 |DSWC  DSWA  DSWB        AO4_04.25                    |
72 |-----------------------------------------------------|
73 Notes:
74            S - Flat cable connector joining to top PCB
75          416 - NEC uPC416C 16k x1 DRAM
76     AY3-8910 - Clock 1.500MHz [18/12]
77        HSync - 15.1430kHz
78        VSync - 59.1828Hz
79 
80 
81 Bottom Board
82 
83 J1000044A
84 K1000219A
85 |-----------------------------------------------------|
86 |  AO4_07.IC15                                        |
87 |                                                    |-|
88 |  AO4_08.IC14                      2114             | |
89 |                 2114              2114             | |
90 |                                         AO4_09.IC98| |
91 |                 2114                               | |
92 |1                                        AO4_10.IC97| |
93 |8                                                   | |
94 |W                                        AO4-11.IC96|-|
95 |A                                        AO4-12.IC95 |
96 |Y                                                   |-|
97 |                                               18MHz| |
98 |                                                    | |
99 |                                                    | |
100 | HM2510     HM2510                                  | |
101 | HM2510     HM2510                                  | |
102 | HM2510     HM2510                                  | |
103 | HM2510     HM2510                                  |-|
104 | HM2510     HM2510                                   |
105 |-----------------------------------------------------|
106 Notes:
107       HM2510 - Hitachi HM2510 1k x1 SRAM
108         2114 - 1k x4 SRAM
109 
110 */
111 
112 #include "emu.h"
113 #include "includes/chaknpop.h"
114 
115 #include "cpu/z80/z80.h"
116 #include "cpu/m6805/m6805.h"
117 #include "sound/ay8910.h"
118 #include "screen.h"
119 #include "speaker.h"
120 
121 
122 /***************************************************************************
123 
124   Memory Handler(s)
125 
126 ***************************************************************************/
127 
mcu_status_r()128 uint8_t chaknpop_state::mcu_status_r()
129 {
130 	// bit 0 = when 1, MCU is ready to receive data from main CPU
131 	// bit 1 = when 1, MCU has sent data to the main CPU
132 	return
133 			((CLEAR_LINE == m_bmcu->host_semaphore_r()) ? 0x01 : 0x00) |
134 			((CLEAR_LINE != m_bmcu->mcu_semaphore_r()) ? 0x02 : 0x00);
135 }
136 
unknown_port_1_w(uint8_t data)137 void chaknpop_state::unknown_port_1_w(uint8_t data)
138 {
139 	//logerror("%s: write to unknown port 1: 0x%02x\n", machine().describe_context(), data);
140 }
141 
unknown_port_2_w(uint8_t data)142 void chaknpop_state::unknown_port_2_w(uint8_t data)
143 {
144 	//logerror("%s: write to unknown port 2: 0x%02x\n", machine().describe_context(), data);
145 }
146 
unknown_port_3_w(uint8_t data)147 void chaknpop_state::unknown_port_3_w(uint8_t data)
148 {
149 	//logerror("%s: write to unknown port 3: 0x%02x\n", machine().describe_context(), data);
150 }
151 
coinlock_w(uint8_t data)152 void chaknpop_state::coinlock_w(uint8_t data)
153 {
154 	logerror("%04x: coin lock %sable\n", m_maincpu->pc(), data ? "dis" : "en");
155 }
156 
157 
158 /***************************************************************************
159 
160   Memory Map(s)
161 
162 ***************************************************************************/
163 
chaknpop_map(address_map & map)164 void chaknpop_state::chaknpop_map(address_map &map)
165 {
166 	map(0x0000, 0x7fff).rom();
167 	map(0x8000, 0x87ff).ram();
168 	map(0x8800, 0x8800).rw(m_bmcu, FUNC(taito68705_mcu_device::data_r), FUNC(taito68705_mcu_device::data_w));
169 	map(0x8801, 0x8801).r(FUNC(chaknpop_state::mcu_status_r));
170 	map(0x8802, 0x8802).w(FUNC(chaknpop_state::unknown_port_3_w));
171 	map(0x8804, 0x8805).rw("ay1", FUNC(ay8910_device::data_r), FUNC(ay8910_device::address_data_w));
172 	map(0x8806, 0x8807).rw("ay2", FUNC(ay8910_device::data_r), FUNC(ay8910_device::address_data_w));
173 	map(0x8808, 0x8808).portr("DSWC");
174 	map(0x8809, 0x8809).portr("P1");
175 	map(0x880a, 0x880a).portr("SYSTEM");
176 	map(0x880b, 0x880b).portr("P2");
177 	map(0x880c, 0x880c).rw(FUNC(chaknpop_state::gfxmode_r), FUNC(chaknpop_state::gfxmode_w));
178 	map(0x880d, 0x880d).w(FUNC(chaknpop_state::coinlock_w));                              // coin lock out
179 	map(0x9000, 0x93ff).ram().w(FUNC(chaknpop_state::txram_w)).share("tx_ram");          // TX tilemap
180 	map(0x9800, 0x983f).ram().w(FUNC(chaknpop_state::attrram_w)).share("attr_ram");      // Color attribute
181 	map(0x9840, 0x98ff).ram().share("spr_ram"); // sprite
182 	map(0xa000, 0xbfff).rom();
183 	map(0xc000, 0xffff).bankrw("bank1");                               // bitmap plane 1-4
184 }
185 
186 /***************************************************************************
187 
188   Input Port(s)
189 
190 ***************************************************************************/
191 
192 static INPUT_PORTS_START( chaknpop )
193 	PORT_START("SYSTEM")
194 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
195 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
196 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 )  // LEFT COIN
197 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 )  // RIGHT COIN
198 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
199 	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
200 	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 )
201 	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_TILT )
202 
203 	PORT_START("P1")
204 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
205 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1)
206 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
207 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
208 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
209 	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
210 	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
211 	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
212 
213 	PORT_START("P2")
214 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
215 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
216 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
217 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
218 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
219 	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
220 	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
221 	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
222 
223 	PORT_START("DSWC")
224 	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Language ) )     PORT_DIPLOCATION("SWC:1")
225 	PORT_DIPSETTING(    0x00, DEF_STR( English ) )
226 	PORT_DIPSETTING(    0x01, DEF_STR( Japanese ) )
227 	PORT_DIPNAME( 0x02, 0x00, DEF_STR( Demo_Sounds ) )  PORT_DIPLOCATION("SWC:2")
228 	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
229 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
230 	PORT_DIPNAME( 0x04, 0x04, "Super Chack'n" )     PORT_DIPLOCATION("SWC:3")
231 	PORT_DIPSETTING(    0x04, "pi" )
232 	PORT_DIPSETTING(    0x00, "1st Chance" )
233 	PORT_DIPNAME( 0x08, 0x08, "Endless (Cheat)")        PORT_DIPLOCATION("SWC:4")
234 	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
235 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
236 	PORT_DIPNAME( 0x10, 0x10, "Credit Info" )       PORT_DIPLOCATION("SWC:5")
237 	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
238 	PORT_DIPSETTING(    0x10, DEF_STR( On ) )
239 	PORT_DIPNAME( 0x20, 0x20, "Show Year" )         PORT_DIPLOCATION("SWC:6")
240 	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
241 	PORT_DIPSETTING(    0x20, DEF_STR( On ) )
242 	PORT_DIPNAME( 0x40, 0x40, "Infinite (Cheat)")       PORT_DIPLOCATION("SWC:7")
243 	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
244 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
245 	PORT_DIPNAME( 0x80, 0x00, DEF_STR( Coinage ) )      PORT_DIPLOCATION("SWC:8")
246 	PORT_DIPSETTING(    0x00, "1 Way" )
247 	PORT_DIPSETTING(    0x80, "2 Way" )
248 
249 	PORT_START("DSWB")
250 	PORT_DIPNAME( 0x03, 0x03, DEF_STR( Bonus_Life ) )   PORT_DIPLOCATION("SWB:1,2")
251 	PORT_DIPSETTING(    0x00, "80k and every 100k" )
252 	PORT_DIPSETTING(    0x01, "60k and every 100k" )
253 	PORT_DIPSETTING(    0x02, "40k and every 100k" )
254 	PORT_DIPSETTING(    0x03, "20k and every 100k" )
255 	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Free_Play ) )    PORT_DIPLOCATION("SWB:3")
256 	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
257 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
258 	PORT_DIPNAME( 0x18, 0x08, DEF_STR( Lives ) )        PORT_DIPLOCATION("SWB:4,5")
259 	PORT_DIPSETTING(    0x00, "6" )
260 	PORT_DIPSETTING(    0x08, "3" )
261 	PORT_DIPSETTING(    0x10, "2" )
262 	PORT_DIPSETTING(    0x18, "1" )
263 	PORT_DIPNAME( 0x20, 0x00, "Training/Difficulty" )   PORT_DIPLOCATION("SWB:6")
264 	PORT_DIPSETTING(    0x20, "Off/Every 10 Min." )
265 	PORT_DIPSETTING(    0x00, "On/Every 7 Min." )
266 	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Flip_Screen ) )  PORT_DIPLOCATION("SWB:7")
267 	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
268 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
269 	PORT_DIPNAME( 0x80, 0x00, DEF_STR( Cabinet ) )      PORT_DIPLOCATION("SWB:8")
270 	PORT_DIPSETTING(    0x00, DEF_STR( Upright ) )
271 	PORT_DIPSETTING(    0x80, DEF_STR( Cocktail ) )
272 
273 	PORT_START("DSWA")
274 	PORT_DIPNAME(0x0f,  0x00, DEF_STR( Coin_A ) )       PORT_DIPLOCATION("SWA:1,2,3,4")
275 	PORT_DIPSETTING(    0x0f, DEF_STR( 9C_1C ) )
276 	PORT_DIPSETTING(    0x0e, DEF_STR( 8C_1C ) )
277 	PORT_DIPSETTING(    0x0d, DEF_STR( 7C_1C ) )
278 	PORT_DIPSETTING(    0x0c, DEF_STR( 6C_1C ) )
279 	PORT_DIPSETTING(    0x0b, DEF_STR( 5C_1C ) )
280 	PORT_DIPSETTING(    0x0a, DEF_STR( 4C_1C ) )
281 	PORT_DIPSETTING(    0x09, DEF_STR( 3C_1C ) )
282 	PORT_DIPSETTING(    0x08, DEF_STR( 2C_1C ) )
283 	PORT_DIPSETTING(    0x00, DEF_STR( 1C_1C ) )
284 	PORT_DIPSETTING(    0x01, DEF_STR( 1C_2C ) )
285 	PORT_DIPSETTING(    0x02, DEF_STR( 1C_3C ) )
286 	PORT_DIPSETTING(    0x03, DEF_STR( 1C_4C ) )
287 	PORT_DIPSETTING(    0x04, DEF_STR( 1C_5C ) )
288 	PORT_DIPSETTING(    0x05, DEF_STR( 1C_6C ) )
289 	PORT_DIPSETTING(    0x06, DEF_STR( 1C_7C ) )
290 	PORT_DIPSETTING(    0x07, DEF_STR( 1C_8C ) )
291 	PORT_DIPNAME(0xf0,  0x00, DEF_STR( Coin_B ) )       PORT_DIPLOCATION("SWA:5,6,7,8")
292 	PORT_DIPSETTING(    0xf0, DEF_STR( 9C_1C ) )
293 	PORT_DIPSETTING(    0xe0, DEF_STR( 8C_1C ) )
294 	PORT_DIPSETTING(    0xd0, DEF_STR( 7C_1C ) )
295 	PORT_DIPSETTING(    0xc0, DEF_STR( 6C_1C ) )
296 	PORT_DIPSETTING(    0xb0, DEF_STR( 5C_1C ) )
297 	PORT_DIPSETTING(    0xa0, DEF_STR( 4C_1C ) )
298 	PORT_DIPSETTING(    0x90, DEF_STR( 3C_1C ) )
299 	PORT_DIPSETTING(    0x80, DEF_STR( 2C_1C ) )
300 	PORT_DIPSETTING(    0x00, DEF_STR( 1C_1C ) )
301 	PORT_DIPSETTING(    0x10, DEF_STR( 1C_2C ) )
302 	PORT_DIPSETTING(    0x20, DEF_STR( 1C_3C ) )
303 	PORT_DIPSETTING(    0x30, DEF_STR( 1C_4C ) )
304 	PORT_DIPSETTING(    0x40, DEF_STR( 1C_5C ) )
305 	PORT_DIPSETTING(    0x50, DEF_STR( 1C_6C ) )
306 	PORT_DIPSETTING(    0x60, DEF_STR( 1C_7C ) )
307 	PORT_DIPSETTING(    0x70, DEF_STR( 1C_8C ) )
308 INPUT_PORTS_END
309 
310 
311 /***************************************************************************
312 
313   Machine Driver(s)
314 
315 ***************************************************************************/
316 
317 static const gfx_layout spritelayout =
318 {
319 	16,16,  /* 16*16 characters */
320 	256,    /* 256 characters */
321 	2,  /* 2 bits per pixel */
322 	{ 0, 0x2000*8 },    /* the two bitplanes are separated */
323 	{ 0, 1, 2, 3, 4, 5, 6, 7 ,
324 			8*8+0, 8*8+1, 8*8+2, 8*8+3, 8*8+4, 8*8+5, 8*8+6, 8*8+7 },
325 	{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
326 			16*8, 17*8, 18*8, 19*8, 20*8, 21*8, 22*8, 23*8 },
327 	32*8    /* every sprite takes 32 consecutive bytes */
328 };
329 
330 static const gfx_layout charlayout =
331 {
332 	8,8,    /* 8*8 characters */
333 	1024,   /* 1024 characters */
334 	2,  /* 2 bits per pixel */
335 	{ 0, 0x2000*8 },    /* the two bitplanes are separated */
336 	{ 0, 1, 2, 3, 4, 5, 6, 7 },
337 	{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
338 	8*8 /* every char takes 8 consecutive bytes */
339 };
340 
341 static GFXDECODE_START( gfx_chaknpop )
342 	GFXDECODE_ENTRY( "gfx1", 0, spritelayout, 0,  8 )
343 	GFXDECODE_ENTRY( "gfx2", 0, charlayout,   32, 8 )
344 GFXDECODE_END
345 
346 
machine_start()347 void chaknpop_state::machine_start()
348 {
349 	uint8_t *ROM = memregion("maincpu")->base();
350 
351 	membank("bank1")->configure_entries(0, 2, &ROM[0x10000], 0x4000);
352 
353 	save_item(NAME(m_gfxmode));
354 	save_item(NAME(m_flip_x));
355 	save_item(NAME(m_flip_y));
356 }
357 
machine_reset()358 void chaknpop_state::machine_reset()
359 {
360 	m_gfxmode = 0;
361 	m_flip_x = 0;
362 	m_flip_y = 0;
363 }
364 
chaknpop(machine_config & config)365 void chaknpop_state::chaknpop(machine_config &config)
366 {
367 	/* basic machine hardware */
368 	Z80(config, m_maincpu, XTAL(18'000'000) / 6);    // Verified on PCB
369 	m_maincpu->set_addrmap(AS_PROGRAM, &chaknpop_state::chaknpop_map);
370 	m_maincpu->set_vblank_int("screen", FUNC(chaknpop_state::irq0_line_hold));
371 
372 	TAITO68705_MCU(config, m_bmcu, XTAL(18'000'000) / 6);    // Verified on PCB
373 	config.set_maximum_quantum(attotime::from_hz(6000));  // 100 CPU slices per frame - a high value to ensure proper synchronization of the CPUs
374 
375 	/* video hardware */
376 	screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
377 	screen.set_refresh_hz(59.1828);
378 	screen.set_vblank_time(ATTOSECONDS_IN_USEC(0));
379 	screen.set_size(32*8, 32*8);
380 	screen.set_visarea(0*8, 32*8-1, 2*8, 30*8-1);
381 	screen.set_screen_update(FUNC(chaknpop_state::screen_update));
382 	screen.set_palette(m_palette);
383 
384 	GFXDECODE(config, m_gfxdecode, m_palette, gfx_chaknpop);
385 	PALETTE(config, m_palette, FUNC(chaknpop_state::chaknpop_palette), 1024);
386 
387 	/* sound hardware */
388 	SPEAKER(config, "mono").front_center();
389 
390 	ay8910_device &ay1(AY8910(config, "ay1", XTAL(18'000'000) / 12));  // Verified on PCB
391 	ay1.port_a_read_callback().set_ioport("DSWA");
392 	ay1.port_b_read_callback().set_ioport("DSWB");
393 	ay1.add_route(ALL_OUTPUTS, "mono", 0.15);
394 
395 	ay8910_device &ay2(AY8910(config, "ay2", XTAL(18'000'000) / 12));  // Verified on PCB
396 	ay2.port_a_write_callback().set(FUNC(chaknpop_state::unknown_port_1_w));   // ??
397 	ay2.port_b_write_callback().set(FUNC(chaknpop_state::unknown_port_2_w));   // ??
398 	ay2.add_route(ALL_OUTPUTS, "mono", 0.10);
399 }
400 
401 
402 /***************************************************************************
403 
404   Game driver(s)
405 
406 ***************************************************************************/
407 
408 ROM_START( chaknpop )
409 	ROM_REGION( 0x18000, "maincpu", 0 ) // Main CPU
410 	ROM_LOAD( "ao4_01.ic28", 0x00000, 0x2000, CRC(386fe1c8) SHA1(cca24abfb8a7f439251e7936036475c694002561) )
411 	ROM_LOAD( "ao4_02.ic27", 0x02000, 0x2000, CRC(5562a6a7) SHA1(0c5d81f9aaf858f88007a6bca7f83dc3ef59c5b5) )
412 	ROM_LOAD( "ao4_03.ic26", 0x04000, 0x2000, CRC(3e2f0a9c) SHA1(f1cf87a4cb07f77104d4a4d369807dac522e052c) )
413 	ROM_LOAD( "ao4_04.ic25", 0x06000, 0x2000, CRC(5209c7d4) SHA1(dcba785a697df55d84d65735de38365869a1da9d) )
414 	ROM_LOAD( "ao4_05.ic3",  0x0a000, 0x2000, CRC(8720e024) SHA1(99e445c117d1501a245f9eb8d014abc4712b4963) )
415 
416 	ROM_REGION( 0x0800, "bmcu:mcu", 0 ) // 2k for the Motorola MC68705P5 Micro-controller
417 	ROM_LOAD( "ao4_06.ic23", 0x0000, 0x0800, CRC(9c78c24c) SHA1(f74c7f3ee106e5c45c907e590ec09614a2bc6751) )
418 
419 	ROM_REGION( 0x4000, "gfx1", 0 )     // Sprite
420 	ROM_LOAD( "ao4_08.ic14", 0x0000, 0x2000, CRC(5575a021) SHA1(c2fad53fe6a12c19cec69d27c13fce6aea2502f2) )
421 	ROM_LOAD( "ao4_07.ic15", 0x2000, 0x2000, CRC(ae687c18) SHA1(65b25263da88d30cbc0dad94511869596e5c975a) )
422 
423 	ROM_REGION( 0x4000, "gfx2", 0 )     // Text
424 	ROM_LOAD( "ao4_09.ic98", 0x0000, 0x2000, CRC(757a723a) SHA1(62ab84d2aaa9bc1ea5aa9df8155aa3b5a1e93889) )
425 	ROM_LOAD( "ao4_10.ic97", 0x2000, 0x2000, CRC(3e3fd608) SHA1(053a8fbdb35bf1c142349f78a63e8cd1adb41ef6) )
426 
427 	ROM_REGION( 0x0800, "proms", 0 )    // Palette
428 	ROM_LOAD( "ao4-11.ic96", 0x0000, 0x0400, CRC(9bf0e85f) SHA1(44f0a4712c99a715dec54060afb0b27dc48998b4) )
429 	ROM_LOAD( "ao4-12.ic95", 0x0400, 0x0400, CRC(954ce8fc) SHA1(e187f9e2cb754264d149c2896ca949dea3bcf2eb) )
430 ROM_END
431 
432 
433 //  ( YEAR  NAME      PARENT    MACHINE   INPUT     STATE           INIT        MONITOR  COMPANY              FULLNAME       FLAGS )
434 GAME( 1983, chaknpop, 0,        chaknpop, chaknpop, chaknpop_state, empty_init, ROT0,    "Taito Corporation", "Chack'n Pop", MACHINE_SUPPORTS_SAVE )
435