1 // license:BSD-3-Clause
2 // copyright-holders:Aaron Giles,Nathan Woods,Angelo Salese, Robbbert
3 /***************************************************************************
4
5 Atari Jaguar (Home) & Atari CoJag (Arcade) hardware
6
7 The CoJag arcade system is based on the Jaguar system, but with an upgraded
8 main CPU (68020 or MIPS instead of the plain 68000 found in the Jaguar)
9
10 driver by Aaron Giles
11 console support originally by Nathan Woods
12
13 CoJag Games supported:
14 * Area 51 (4 Sets)
15 * Maximum Force (3 Sets)
16 * Area 51/Maximum Force Duo (2 Sets)
17 * Vicious Circle
18 * Fishin' Frenzy
19 * Freeze
20
21 To do:
22 * (CoJag) map out unused RAM per-game via memory_nop_read/write
23 * (Jaguar) support is very poor, most games aren't properly playable
24 or have severe performance issues or crashes related to the unsafe
25 blitter code. Please refer to jaguar SW list file for more details.
26 * The code (GPU/DSP access) should probably be refactored around the
27 16-bit interface from the plain 68k, the driver currently uses
28 trampoline functions due to the original driver being entirely
29 32-bit due to the CPUs on CoJag.
30
31 Note: There is believed to be a 68020 version of Maximum Force
32 (not confirmed or dumped)
33
34 ****************************************************************************
35
36 Area51/Maximum Force (c)1997 Atari Games
37 Maximum Force
38 A055451
39
40 Components:
41 sdt79r3041-20j
42 Atari Jaguar CPU V1.0 6sc880hf106
43 Atari Jaguar DSP V1.0 sc414201ft (has Motorolla logo)
44 Altera epm7128elc84-15 marked A-21652
45 VIA vt83c461 IDE controller
46 Actel a1010b marked A-22096 near IDE and gun inputs
47 Dallas ds1232s watchdog
48 52MHz osc near Altera PLCC
49 40MHz osc near 79R3041
50 14.318180MHz osc near Jag DSP
51 12x hm514260cj7 RAM (near Jaguar CPU/DSP)
52 4x sdt71256 RAM (near Boot ROMs's)
53 Atmel atf16v8b marked a-21647 (near Jag CPU)
54 Altera ep22lc-10 marked A-21648 (near Jag DSP)
55 ICT 22cv10aj marked A-21649 (near Jag CPU)
56 ICT 22cv10aj marked A-21650 (near Jag CPU)
57 ICT 22cv10aj marked A-21651 (near Jag CPU)
58 tea6320t
59 AKM ak4310vm
60 tda1554q amplifier
61 Microchip 28c16a-15 BRAM
62
63 ROM's:
64 27c4001
65 R3K MAX/A51 KIT
66 LL
67 (c)1997 Atari
68 V 1.0
69
70 27c4001
71 R3K MAX/A51 KIT
72 LH
73 (c)1997 Atari
74 V 1.0
75
76 27c4001
77 R3K MAX/A51 KIT
78 HL
79 (c)1997 Atari
80 V 1.0
81
82 27c4001
83 R3K MAX/A51 KIT
84 HH
85 (c)1997 Atari
86 V 1.0
87
88 Jumpers:
89 jsp1 (1/2 connected= w/sub 2/3 connected= normal speaker)
90 jsp2 (1/2 connected= w/sub 2/3 connected= normal speaker)
91 jamaud (1/2 connected=stereo 2/3 connected=mono)
92 jimpr (1/2 connected=hi video R impedance 2/3 connected=lo)
93 jimpg (1/2 connected=hi video G impedance 2/3 connected=lo)
94 jimpb (1/2 connected=hi video B impedance 2/3 connected=lo)
95
96 Connectors:
97 idea standard IDE connector
98 ideb laptop size IDE connector
99 jgun1 8 pin gun input
100 jgun2 8 pin gun input
101 xtracoin 1 6 pin (coin3/4 bills?)
102 jvupdn 3 pin (?)
103 jsync 3 pin (?)
104 JAMMA
105 jspkr left/right/subwoofer output
106 hdpower 4 pin PC power connector for HD
107
108 ****************************************************************************
109
110 Area 51 (Time Warner Interactive License)
111 Atari/Mesa Logic, 1995
112
113 This game runs on Atari Cojag 68k hardware.
114
115 PCB Layouts
116 -----------
117
118 Main Board:
119
120 COJAG A053538
121 ATARI GAMES (C) 1994
122 (Atari comment near AMP - 'MMM, DONUTS.')
123 |--------------------------------------------------|
124 |TDA1554Q TEA6320T AK4310 JXCLKTRM |
125 |JSPKR ST91D314 XC7336 |
126 | JSP1 JWELLSR PAL4 PAL5 |
127 | JSP4 JSP2 PAL1 45160 45160 * * |
128 | HDPOWER JSP3 JWELLSB JXBUS|
129 | SELFTEST PAL2 PAL6 45160 45160 * * |
130 | LED JWELLSG |
131 | LED |------|45160 45160 * * |
132 |J LED |JAGUAR| |
133 |A | CPU |45160 45160 * * |
134 |M | | |
135 |M |------| |
136 |A |
137 | 14.31818MHz |------| |
138 | LM613 |JAGUAR| |
139 | 52MHz PAL3 | DSP | |
140 | | | |
141 | JSYNC |------| |
142 | JVUPDN DIP8 |
143 | A1010B |
144 |JPLY3 JVCR VT83C461 |
145 | |
146 | LED |
147 | JPLY4 JGUN2 JGUN1 JIDEB |
148 |--------------------------------------------------|
149 Notes:
150 JAGUAR CPU - Atari Jaguar CPU (QFP208)
151 JAGUAR DSP - Atari Jaguar DSP (QFP160)
152 45160 - TMS45160DZ-70 512K x16 DRAM (SOJ40)
153 Note: This RAM is in banks. There are 4 banks, each bank is 2MBytes x 64bit
154 Only banks 0 and 1 are populated.
155 * - Unpopulated DRAM positions (banks 2 and 3)
156 TDA1554Q - Philips TDA1554Q power AMP
157 TEA6320T - Philips TEA6320T op AMP (SOP32)
158 AK4310 - AKM AK4310VM (SOIC24)
159 ST91D314 - STS Microelectronics ST91D314 3403 op AMP (SOIC14)
160 PAL1 - ATMEL ATF16V8B PAL (labelled '136105-0006', PLCC20)
161 PAL2 - ATMEL ATF16V8B PAL (labelled '136105-0006', PLCC20)
162 PAL3 - ATMEL ATF16V8B PAL (labelled '136105-0007', PLCC20)
163 PAL4, PAL5 - Philips PL22V10-10A PAL (labelled 'MYF 136105-0008', PLCC28)
164 PAL6 - ATMEL ATF16V8B (labelled '136105-0005', PLCC20)
165 A1010B - ACTEL A1010B Complex Programmable Logic Device (labeled 'MYF 136105-0010', PLCC44)
166 XC7336 - Xilinx XC7336 Complex PRogrammable Logic Device (labelled 'MYF 136105-0009', PLCC44)
167 VT83C461 - VIA VT83C461 IDE Hard Drive Controller (QFP100)
168 LM613 - (DIP16)
169 SELFTEST - Test Switch
170 HDPOWER - Standard (PC-type) 4 pin hard drive power connector
171 JSP1 - 3 pin jumper block, set to 2-3
172 JSP2 - 3 pin jumper block, set to 2-3
173 JSP3 - 3 pin jumper block, jumper not installed
174 JSP4 - 3 pin jumper block, set to 2-3
175 JWELLSR - 3 pin jumper block, set to 2-3
176 JWELLSB - 3 pin jumper block, set to 2-3
177 JWELLSG - 3 pin jumper block, set to 2-3
178 JSYNC - 3 pin jumper block, jumper not installed
179 JVUPDN - 3 pin jumper block, jumper not installed
180 JVCR - 3 pin jumper block, jumper not installed
181 JXCLKTRM - 2 pin header, not shorted
182 JPLY3 - Connector for player 3 controls
183 JPLY4 - Connector for player 4 controls
184 JGUN1 - Connector for player 1 gun
185 JGUN2 - Connector for player 2 gun
186 JIDEB - Connector for 40 pin IDE cable connected to Quantum Fireball 1080AT IDE hard drive (C/H/S = 2112/16/63)
187 JSPKR - Connector for left/right speaker for stereo sound output
188 DIP8 - Unpopulated DIP8 socket
189 JXBUS - 96 pin connector to top board
190
191
192 Top Board:
193
194 EC20X32
195 A053448
196 ATARI GAMES (C) 1994
197 |------------------------------|
198 | 136105-0002C.3P|
199 | 71256 |
200 | 136105-0001C.3M|
201 | 71256 |
202 | 136105-0000C.3K|
203 | 71256 |
204 | 136105-0003C.3H|
205 | 71256 |
206 | LED |
207 | |
208 | AT28C16 DS1232 XC7354 |
209 | |
210 | |
211 | MC68EC020 |
212 | |
213 | 50MHz |
214 |------------------------------|
215 Notes:
216 MC68EC020 - Motorola 68EC020FG25 CPU clocked at 25MHz (QFP100)
217 AT28C16 - ATMEL 2k x8 EEPROM (DIP24)
218 XC7354 - Xilinx XC7354 Complex Programmable Logic Device (labelled 'MYF 136105-0004', PLCC68, socketed)
219 DS1232 - Dallas DS1232 System Reset IC (DIP8)
220 71256 - 32K x8 SRAM (SOJ28)
221 136105-0002C.3P - 27C040 EPROM (labelled 'AREA 51 136105-0002C (C)1995 ATARI GMS CS 55FE', DIP32)
222 136105-0001C.3M - 27C040 EPROM (labelled 'AREA 51 136105-0001C (C)1995 ATARI GMS CS 3DFD', DIP32)
223 136105-0000C.3K - 27C040 EPROM (labelled 'AREA 51 136105-0000C (C)1995 ATARI GMS CS 63FC', DIP32)
224 136105-0003C.3H - 27C040 EPROM (labelled 'AREA 51 136105-0003C (C)1995 ATARI GMS CS 45FF', DIP32)
225
226 ****************************************************************************
227
228 Maximum Force
229 Atari, 1997
230
231 PCB Layout
232 ----------
233
234 MAXIMUM FORCE A055451 ATARI GAMES (C) 1996
235 |-----------------------------------------------------------------------------------|
236 |HM514260CJ7 HM514260CJ7 HM514260CJ7 HM514260CJ7 AT28C16 |
237 | |
238 |HM514260CJ7 HM514260CJ7 HM514260CJ7 HM514260CJ7 PROGLL.17Y PROGLH.21Y |
239 | |
240 |HM514260CJ7 HM514260CJ7 HM514260CJ7 HM514260CJ7 PROGHL.21V PROGHH.21V |
241 | |
242 | |
243 | |------| |------| |
244 | |JAGUAR| |JAGUAR| |
245 |GAL GAL |GPU | |DSP | |----------| |
246 | |------| |------| | | |
247 | |IDT | |
248 |GAL GAL 40MHz |79R3041-20| |
249 | GAL | | |
250 | 14.31818MHz |----------| IDE |
251 |AK4310VM CONN |
252 | |-----------| |
253 |LM78L05 52MHz |ALTERA MAX | |
254 | |EPM7128ELC84 |
255 | TEA6320 | | |
256 |78L09 LM613 | | VIA |
257 | MONO/STEREO |-----------| VT83C461 |
258 |TDA1554 SELFTEST |
259 | DS1232 ACTEL_A1010B |
260 | HDD_PWR |
261 | JSPKR |--| JAMMA |--| JSYNC JVUPDN XTRACOIN1 JGUN1 JGUN2|
262 |-------| |----------------------------| |----------------------------------------|
263 Notes:
264 JGUN1 / JGUN2 - Connector for Guns
265 VIA VT83C461 - IDE Controller
266 JSPKR - Speaker Output Connector (for use with Stereo jumper)
267
268 ****************************************************************************
269
270 Memory map (TBA)
271
272 ========================================================================
273 MAIN CPU
274 ========================================================================
275
276 ------------------------------------------------------------
277 000000-3FFFFF R/W xxxxxxxx xxxxxxxx DRAM 0
278 400000-7FFFFF R/W xxxxxxxx xxxxxxxx DRAM 1
279 800000-BFFFFF R xxxxxxxx xxxxxxxx Graphic ROM bank
280 C00000-DFFFFF R xxxxxxxx xxxxxxxx Sound ROM bank
281 F00000-F000FF R/W xxxxxxxx xxxxxxxx Tom Internal Registers
282 F00400-F005FF R/W xxxxxxxx xxxxxxxx CLUT - color lookup table A
283 F00600-F007FF R/W xxxxxxxx xxxxxxxx CLUT - color lookup table B
284 F00800-F00D9F R/W xxxxxxxx xxxxxxxx LBUF - line buffer A
285 F01000-F0159F R/W xxxxxxxx xxxxxxxx LBUF - line buffer B
286 F01800-F01D9F R/W xxxxxxxx xxxxxxxx LBUF - line buffer currently selected
287 F02000-F021FF R/W xxxxxxxx xxxxxxxx GPU control registers
288 F02200-F022FF R/W xxxxxxxx xxxxxxxx Blitter registers
289 F03000-F03FFF R/W xxxxxxxx xxxxxxxx Local GPU RAM
290 F08800-F08D9F R/W xxxxxxxx xxxxxxxx LBUF - 32-bit access to line buffer A
291 F09000-F0959F R/W xxxxxxxx xxxxxxxx LBUF - 32-bit access to line buffer B
292 F09800-F09D9F R/W xxxxxxxx xxxxxxxx LBUF - 32-bit access to line buffer currently selected
293 F0B000-F0BFFF R/W xxxxxxxx xxxxxxxx 32-bit access to local GPU RAM
294 F10000-F13FFF R/W xxxxxxxx xxxxxxxx Jerry
295 F14000-F17FFF R/W xxxxxxxx xxxxxxxx Joysticks and GPIO0-5
296 F18000-F1AFFF R/W xxxxxxxx xxxxxxxx Jerry DSP
297 F1B000-F1CFFF R/W xxxxxxxx xxxxxxxx Local DSP RAM
298 F1D000-F1DFFF R xxxxxxxx xxxxxxxx Wavetable ROM
299 ------------------------------------------------------------
300
301 Jaguar console schematics include a ADC0844 at U16, selected by GPIOL5. This IC
302 may or may not be populated.
303
304 Jaguar System Notes:
305
306 Protection Check
307
308 At power on, a checksum is performed on the cart to ensure it has been
309 certified by Atari. The actual checksum calculation is performed by the GPU,
310 the result being left in GPU RAM at address f03000. The GPU is instructed to
311 do the calculation when the bios sends a 1 to f02114 while it is in the
312 initialisation stage. The bios then loops, waiting for the GPU to finish the
313 calculation. When it does, it sets bit 15 of f02114 high. The bios then does
314 the compare of the checksum. The checksum algorithm is unknown, but the
315 final result must be 03d0dead. The bios checks for this particular result,
316 and if found, the cart is allowed to start. Otherwise, the background turns
317 red, and the console freezes.
318
319
320 Jaguar Logo
321
322 A real Jaguar will show the red Jaguar logo, the falling white Atari letters,
323 and the turning jaguar's head, accompanied by the sound of a flushing toilet.
324 The cart will then start. All Jaguar emulators (including this one) skip the
325 logo with the appropriate memory hack. The cart can also instruct the logo
326 be skipped by placing non-zero at location 800408. We do the same thing when
327 the cart is loaded (see the DEVICE_IMAGE_LOAD section below).
328
329
330 Start Address
331
332 The start address of a cart may be found at 800404. It is normally 802000.
333
334 ***************************************************************************/
335
336
337 #include "emu.h"
338 #include "includes/jaguar.h"
339
340 #include "bus/generic/slot.h"
341 #include "bus/generic/carts.h"
342 #include "bus/ata/idehd.h"
343 #include "cpu/m68000/m68000.h"
344 #include "cpu/mips/mips1.h"
345 #include "cpu/jaguar/jaguar.h"
346 #include "imagedev/chd_cd.h"
347 #include "imagedev/snapquik.h"
348 #include "machine/eepromser.h"
349 #include "machine/watchdog.h"
350 #include "machine/vt83c461.h"
351 #include "sound/cdda.h"
352 #include "cdrom.h"
353 #include "softlist.h"
354 #include "speaker.h"
355
356 #define COJAG_CLOCK XTAL(52'000'000)
357 #define R3000_CLOCK XTAL(40'000'000)
358 #define M68K_CLOCK XTAL(50'000'000)
359
360
361 /*************************************
362 *
363 * Local variables
364 *
365 *************************************/
366
367 /// HACK: Maximum force requests data but doesn't transfer it all before issuing another command.
368 /// According to the ATA specification this is not allowed, more investigation is required.
369
370 DECLARE_DEVICE_TYPE(COJAG_HARDDISK, cojag_hdd)
371
372 class cojag_hdd : public ide_hdd_device
373 {
374 public:
cojag_hdd(const machine_config & mconfig,const char * tag,device_t * owner,uint32_t clock)375 cojag_hdd(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
376 : ide_hdd_device(mconfig, COJAG_HARDDISK, tag, owner, clock)
377 {
378 }
379
write_cs0(offs_t offset,uint16_t data,uint16_t mem_mask)380 virtual void write_cs0(offs_t offset, uint16_t data, uint16_t mem_mask) override
381 {
382 // the first write is to the device head register
383 if( offset == 6 && (m_status & IDE_STATUS_DRQ))
384 {
385 m_status &= ~IDE_STATUS_DRQ;
386 }
387
388 ide_hdd_device::write_cs0(offset, data, mem_mask);
389 }
390 };
391
392 DEFINE_DEVICE_TYPE(COJAG_HARDDISK, cojag_hdd, "cojag_hdd", "HDD CoJag")
393
cojag_devices(device_slot_interface & device)394 void cojag_devices(device_slot_interface &device)
395 {
396 device.option_add("hdd", COJAG_HARDDISK);
397 }
398
399 /*************************************
400 *
401 * Machine init
402 *
403 *************************************/
404
machine_start()405 void jaguar_state::machine_start()
406 {
407 /* configure banks for gfx/sound ROMs */
408 if (m_romboard_region != nullptr)
409 {
410 uint8_t *romboard = m_romboard_region->base();
411
412 /* graphics banks */
413 if (m_maingfxbank.found())
414 {
415 m_maingfxbank->configure_entries(0, 2, romboard + 0x800000, 0x400000);
416 }
417 m_gpugfxbank->configure_entries(0, 2, romboard + 0x800000, 0x400000);
418
419 /* sound banks */
420 m_mainsndbank->configure_entries(0, 8, romboard + 0x000000, 0x200000);
421 m_dspsndbank->configure_entries(0, 8, romboard + 0x000000, 0x200000);
422 }
423 }
424
machine_reset()425 void jaguar_state::machine_reset()
426 {
427 m_protection_check = 0;
428
429 /* 68020 only: copy the interrupt vectors into RAM */
430 if (!m_is_r3000)
431 {
432 if (m_rom_base.found())
433 {
434 for (offs_t addr = 0; addr < 0x400; addr += 4) // do not increase, or Doom breaks
435 m_shared_ram[addr/4] = m_rom_base[addr/2] << 16 | m_rom_base[addr/2+1];
436 }
437 else
438 std::copy_n(reinterpret_cast<uint32_t *>(memregion("maincpu")->base()), 0x100, &m_shared_ram[0]);
439 }
440
441 /* reset banks for gfx/sound ROMs */
442 if (m_romboard_region != nullptr)
443 {
444 /* graphics banks */
445 if (m_maingfxbank.found())
446 {
447 m_maingfxbank->set_entry(0);
448 }
449 m_gpugfxbank->set_entry(0);
450
451 /* sound banks */
452 m_mainsndbank->set_entry(0);
453 m_dspsndbank->set_entry(0);
454 }
455
456 /* clear any spinuntil stuff */
457 gpu_resume();
458 dsp_resume();
459
460 /* halt the CPUs */
461 m_gpu->go_w(false);
462 m_dsp->go_w(false);
463
464 /* set blitter idle flag */
465 m_blitter_status = 1;
466 m_joystick_data = 0xffffffff;
467 m_eeprom_bit_count = 0;
468
469 if ((m_using_cart) && (m_config_io->read() & 2))
470 {
471 m_cart_base[0x102] = 1;
472 m_using_cart = false;
473 }
474 }
475
machine_reset()476 void jaguarcd_state::machine_reset()
477 {
478 jaguar_state::machine_reset();
479
480 m_shared_ram[0x4/4] = 0x00802000; /* hack until I understand */
481
482 m_cd_file = m_cdrom->get_cdrom_file();
483 m_butch_cmd_index = 0;
484 m_butch_cmd_size = 1;
485 }
486
487
488 /********************************************************************
489 *
490 * EEPROM
491 * ======
492 *
493 * The EEPROM is accessed by a serial protocol using the registers
494 * 0xF14000 (read data), F14800 (increment clock, write data), F15000 (reset for next word)
495 *
496 ********************************************************************/
497 /*
498 emu_file jaguar_state::*jaguar_nvram_fopen( uint32_t openflags)
499 {
500 device_image_interface *image = dynamic_cast<device_image_interface *>(machine().device("cart"));
501 osd_file::error filerr;
502 emu_file *file;
503 if (image->exists())
504 {
505 std::string fname(machine().system().name, PATH_SEPARATOR, image->basename_noext(), ".nv");
506 filerr = mame_fopen( SEARCHPATH_NVRAM, fname, openflags, &file);
507 return (filerr == osd_file::error::NONE) ? file : nullptr;
508 }
509 else
510 return nullptr;
511 }
512
513 void jaguar_state::jaguar_nvram_load()
514 {
515 emu_file *nvram_file = nullptr;
516 device_t *device;
517
518 for (device = machine().m_devicelist.first(); device != nullptr; device = device->next())
519 {
520 device_nvram_func nvram = (device_nvram_func)device->get_config_fct(DEVINFO_FCT_NVRAM);
521 if (nvram != nullptr)
522 {
523 if (nvram_file == nullptr)
524 nvram_file = jaguar_nvram_fopen(machine, OPEN_FLAG_READ);
525 (*nvram)(device, nvram_file, 0);
526 }
527 }
528 if (nvram_file != nullptr)
529 mame_fclose(nvram_file);
530 }
531
532
533 void jaguar_state::jaguar_nvram_save()
534 {
535 emu_file *nvram_file = nullptr;
536 device_t *device;
537
538 for (device = machine().m_devicelist.first(); device != nullptr; device = device->next())
539 {
540 device_nvram_func nvram = (device_nvram_func)device->get_config_fct(DEVINFO_FCT_NVRAM);
541 if (nvram != nullptr)
542 {
543 if (nvram_file == nullptr)
544 nvram_file = jaguar_nvram_fopen(machine, OPEN_FLAG_WRITE | OPEN_FLAG_CREATE | OPEN_FLAG_CREATE_PATHS);
545 // check nvram_file to avoid crash when no image is mounted or cannot be created
546 if (nvram_file)
547 (*nvram)(device, nvram_file, 1);
548 }
549 }
550
551 if (nvram_file != nullptr)
552 mame_fclose(nvram_file);
553 }
554
555 static NVRAM_HANDLER( jaguar )
556 {
557 if (read_or_write) {
558 jaguar_nvram_save(machine);
559 }
560 else
561 {
562 if (file)
563 jaguar_nvram_load(machine);
564 }
565 }
566 */
eeprom_w(uint32_t data)567 void jaguar_state::eeprom_w(uint32_t data)
568 {
569 m_eeprom_bit_count++;
570 if (m_eeprom_bit_count != 9) /* kill extra bit at end of address */
571 {
572 m_eeprom->di_write(data >> 31);
573 m_eeprom->clk_write(0);
574 m_eeprom->clk_write(1);
575 }
576 }
577
eeprom_clk()578 uint32_t jaguar_state::eeprom_clk()
579 {
580 if (!machine().side_effects_disabled())
581 {
582 m_eeprom->clk_write(0);
583 m_eeprom->clk_write(1); /* get next bit when reading */
584 }
585 return 0;
586 }
587
eeprom_cs()588 uint32_t jaguar_state::eeprom_cs()
589 {
590 if (!machine().side_effects_disabled())
591 {
592 m_eeprom->cs_write(CLEAR_LINE); /* must do at end of an operation */
593 m_eeprom->cs_write(ASSERT_LINE); /* enable chip for next operation */
594 m_eeprom->di_write(1); /* write a start bit */
595 m_eeprom->clk_write(0);
596 m_eeprom->clk_write(1);
597 m_eeprom_bit_count = 0;
598 }
599 return 0;
600 }
601
602
603
604 /*************************************
605 *
606 * Misc. control bits
607 *
608 *************************************/
609
misc_control_r()610 uint32_t jaguar_state::misc_control_r()
611 {
612 /* D7 = board reset (low)
613 D6 = audio must & reset (high)
614 D5 = volume control data (invert on write)
615 D4 = volume control clock
616 D3-D1 = audio bank 2-0
617 D0 = shared memory select (0=XBUS) */
618
619 return m_misc_control_data ^ 0x20;
620 }
621
622
misc_control_w(offs_t offset,uint32_t data,uint32_t mem_mask)623 void jaguar_state::misc_control_w(offs_t offset, uint32_t data, uint32_t mem_mask)
624 {
625 logerror("%s:misc_control_w(%02X)\n", machine().describe_context(), data);
626
627 /* D7 = board reset (low)
628 D6 = audio must & reset (high)
629 D5 = volume control data (invert on write)
630 D4 = volume control clock
631 D3-D1 = audio bank 2-0
632 D0 = shared memory select (0=XBUS) */
633
634 /* handle resetting the DSPs */
635 if (!(data & 0x80))
636 {
637 /* clear any spinuntil stuff */
638 gpu_resume();
639 dsp_resume();
640
641 /* halt the CPUs */
642 m_gpu->go_w(false);
643 m_dsp->go_w(false);
644 }
645
646 /* adjust banking */
647 if (m_romboard_region != nullptr)
648 {
649 m_mainsndbank->set_entry((data >> 1) & 7);
650 m_dspsndbank->set_entry((data >> 1) & 7);
651 }
652
653 COMBINE_DATA(&m_misc_control_data);
654 }
655
656
657 /*************************************
658 *
659 * 32-bit access to the GPU
660 *
661 *************************************/
662
gpuctrl_r(offs_t offset,uint32_t mem_mask)663 uint32_t jaguar_state::gpuctrl_r(offs_t offset, uint32_t mem_mask)
664 {
665 return m_gpu->iobus_r(offset, mem_mask);
666 }
667
gpuctrl_w(offs_t offset,uint32_t data,uint32_t mem_mask)668 void jaguar_state::gpuctrl_w(offs_t offset, uint32_t data, uint32_t mem_mask)
669 {
670 m_gpu->iobus_w(offset, data, mem_mask);
671 }
672
673 /*************************************
674 *
675 * 32-bit access to the DSP
676 *
677 *************************************/
678
dspctrl_r(offs_t offset,uint32_t mem_mask)679 uint32_t jaguar_state::dspctrl_r(offs_t offset, uint32_t mem_mask)
680 {
681 return m_dsp->iobus_r(offset, mem_mask);
682 }
683
dspctrl_w(offs_t offset,uint32_t data,uint32_t mem_mask)684 void jaguar_state::dspctrl_w(offs_t offset, uint32_t data, uint32_t mem_mask)
685 {
686 m_dsp->iobus_w(offset, data, mem_mask);
687 }
688
689 /*************************************
690 *
691 * Input ports
692 *
693 * Information from "The Jaguar Underground Documentation"
694 * by Klaus and Nat!
695 *
696 *************************************/
697
joystick_r()698 uint32_t jaguar_state::joystick_r()
699 {
700 uint16_t joystick_result = 0xfffe;
701 uint16_t joybuts_result = 0xffef;
702
703 /*
704 * 16 12 8 4 0
705 * +---------+---------+---------^---------+
706 * | pad 1 | pad 0 | unused |
707 * +---------+---------+-------------------+
708 * 15...12 11...8 7...0
709 *
710 * Reading this register gives you the output of the selected columns
711 * of the pads.
712 * The buttons pressed will appear as cleared bits.
713 * See the description of the column addressing to map the bits
714 * to the buttons.
715 */
716
717 for (int i = 0; i < 8; i++)
718 {
719 if ((m_joystick_data & (0x10000 << i)) == 0)
720 {
721 joystick_result &= m_joy[i]->read();
722 joybuts_result &= m_buttons[i]->read();
723 }
724 }
725
726 joystick_result |= m_eeprom->do_read();
727 joybuts_result |= (m_config_io->read() & 0x10);
728
729 return (joystick_result << 16) | joybuts_result;
730 }
731
joystick_w(offs_t offset,uint32_t data,uint32_t mem_mask)732 void jaguar_state::joystick_w(offs_t offset, uint32_t data, uint32_t mem_mask)
733 {
734 /*
735 * 16 12 8 4 0
736 * +-+-------^------+--+---------+---------+
737 * |r| unused |mu| col 1 | col 0 |
738 * +-+--------------+--+---------+---------+
739 * 15 8 7...4 3...0
740 *
741 * col 0: column control of joypad 0
742 *
743 * Here you select which column of the joypad to poll.
744 * The columns are:
745 *
746 * Joystick Joybut
747 * col_bit|11 10 9 8 1 0
748 * -------+--+--+--+-- ---+------
749 * 0 | R L D U A PAUSE (RLDU = Joypad directions)
750 * 1 | 1 4 7 * B
751 * 2 | 2 5 8 0 C
752 * 3 | 3 6 9 # OPTION
753 *
754 * You select a column my clearing the appropriate bit and setting
755 * all the other "column" bits.
756 *
757 *
758 * col1: column control of joypad 1
759 *
760 * This is pretty much the same as for joypad EXCEPT that the
761 * column addressing is reversed (strange!!)
762 *
763 * Joystick Joybut
764 * col_bit|15 14 13 12 3 2
765 * -------+--+--+--+-- ---+------
766 * 4 | 3 6 9 # OPTION
767 * 5 | 2 5 8 0 C
768 * 6 | 1 4 7 * B
769 * 7 | R L D U A PAUSE (RLDU = Joypad directions)
770 *
771 * mute (mu): sound control
772 *
773 * You can turn off the sound by clearing this bit.
774 *
775 * read enable (r):
776 *
777 * Set this bit to read from the joysticks, clear it to write
778 * to them.
779 */
780 COMBINE_DATA(&m_joystick_data);
781 }
782
783
784 /*************************************
785 *
786 * Output ports
787 *
788 *************************************/
789
latch_w(uint32_t data)790 void jaguar_state::latch_w(uint32_t data)
791 {
792 logerror("%08X:latch_w(%X)\n", m_maincpu->pcbase(), data);
793
794 /* adjust banking */
795 if (m_romboard_region != nullptr)
796 {
797 if (m_maingfxbank.found())
798 {
799 m_maingfxbank->set_entry(data & 1);
800 }
801 m_gpugfxbank->set_entry(data & 1);
802 }
803 }
804
805
806
807 /*************************************
808 *
809 * EEPROM access
810 *
811 *************************************/
812
eeprom_data_r(offs_t offset)813 uint32_t jaguar_state::eeprom_data_r(offs_t offset)
814 {
815 if (m_is_r3000)
816 return m_nvram[offset] | 0xffffff00;
817 else
818 return m_nvram[offset] | 0x00ffffff;
819 }
820
821
eeprom_enable_w(uint32_t data)822 void jaguar_state::eeprom_enable_w(uint32_t data)
823 {
824 m_eeprom_enable = true;
825 }
826
827
eeprom_data_w(offs_t offset,uint32_t data)828 void jaguar_state::eeprom_data_w(offs_t offset, uint32_t data)
829 {
830 // if (m_eeprom_enable)
831 {
832 if (m_is_r3000)
833 m_nvram[offset] = data & 0x000000ff;
834 else
835 m_nvram[offset] = data & 0xff000000;
836 }
837 // else
838 // logerror("%s:error writing to disabled EEPROM\n", machine().describe_context());
839 m_eeprom_enable = false;
840 }
841
842
843
844 /*************************************
845 *
846 * GPU synchronization & speedup
847 *
848 *************************************/
849
850 /*
851 Explanation:
852
853 The GPU generally sits in a tight loop waiting for the main CPU to store
854 a jump address into a specific memory location. This speedup is designed
855 to catch that loop, which looks like this:
856
857 load (r28),r21
858 jump (r21)
859 nop
860
861 When nothing is pending, the GPU keeps the address of the load instruction
862 at (r28) so that it loops back on itself. When the main CPU wants to execute
863 a command, it stores an alternate address to (r28).
864
865 Even if we don't optimize this case, we do need to detect when a command
866 is written to the GPU in order to improve synchronization until the GPU
867 has finished. To do this, we start a temporary high frequency timer and
868 run it until we get back to the spin loop.
869 */
870
871
gpu_jump_w(offs_t offset,uint32_t data,uint32_t mem_mask)872 void jaguar_state::gpu_jump_w(offs_t offset, uint32_t data, uint32_t mem_mask)
873 {
874 /* update the data in memory */
875 COMBINE_DATA(m_gpu_jump_address);
876 logerror("%08X:GPU jump address = %08X\n", m_gpu->pcbase(), *m_gpu_jump_address);
877
878 /* if the GPU is suspended, release it now */
879 gpu_resume();
880
881 /* start the sync timer going, and note that there is a command pending */
882 synchronize(TID_GPU_SYNC);
883 m_gpu_command_pending = true;
884 }
885
886
gpu_jump_r()887 uint32_t jaguar_state::gpu_jump_r()
888 {
889 /* if the current GPU command is just pointing back to the spin loop, and */
890 /* we're reading it from the spin loop, we can optimize */
891 if (*m_gpu_jump_address == m_gpu_spin_pc && m_gpu->pcbase() == m_gpu_spin_pc)
892 {
893 #if ENABLE_SPEEDUP_HACKS
894 /* spin if we're allowed */
895 if (m_hacks_enabled) gpu_suspend();
896 #endif
897
898 /* no command is pending */
899 m_gpu_command_pending = false;
900 }
901
902 /* return the current value */
903 return *m_gpu_jump_address;
904 }
905
906
907
908 /*************************************
909 *
910 * Main CPU speedup (R3000 games)
911 *
912 *************************************/
913
914 /*
915 Explanation:
916
917 Instead of sitting in a tight loop, the CPU will run the random number
918 generator over and over while waiting for an interrupt. In order to catch
919 that, we snoop the memory location it is polling, and see if it is read
920 at least 5 times in a row, each time less than 200 cycles apart. If so,
921 we assume it is spinning. Also, by waiting for 5 iterations, we let it
922 crank through some random numbers, just not several thousand every frame.
923 */
924
925 #if ENABLE_SPEEDUP_HACKS
926
927
cojagr3k_main_speedup_r()928 uint32_t jaguar_state::cojagr3k_main_speedup_r()
929 {
930 uint64_t curcycles = m_maincpu->total_cycles();
931
932 /* if it's been less than main_speedup_max_cycles cycles since the last time */
933 if (curcycles - m_main_speedup_last_cycles < m_main_speedup_max_cycles)
934 {
935 /* increment the count; if we hit 5, we can spin until an interrupt comes */
936 if (m_main_speedup_hits++ > 5)
937 {
938 m_maincpu->spin_until_interrupt();
939 m_main_speedup_hits = 0;
940 }
941 }
942
943 /* if it's been more than main_speedup_max_cycles cycles, reset our count */
944 else
945 m_main_speedup_hits = 0;
946
947 /* remember the last cycle count */
948 m_main_speedup_last_cycles = curcycles;
949
950 /* return the real value */
951 return *m_main_speedup;
952 }
953
954 #endif
955
956
957
958 /*************************************
959 *
960 * Additional main CPU speedup
961 * (Freeze only)
962 *
963 *************************************/
964
965 /*
966 Explanation:
967
968 The main CPU hands data off to the GPU to process. But rather than running
969 in parallel, the main CPU just sits and waits for the result. This speedup
970 makes sure we don't waste time emulating that spin loop.
971 */
972
973 #if ENABLE_SPEEDUP_HACKS
974
975
main_gpu_wait_r()976 uint32_t jaguar_state::main_gpu_wait_r()
977 {
978 if (m_gpu_command_pending)
979 m_maincpu->spin_until_interrupt();
980 return *m_main_gpu_wait;
981 }
982
983 #endif
984
985
986
987 /*************************************
988 *
989 * Main CPU speedup (Area 51)
990 *
991 *************************************/
992
993 /*
994 Explanation:
995
996 Very similar to the R3000 code, except we need to verify that the value in
997 *main_speedup is actually 0.
998 */
999
1000 #if ENABLE_SPEEDUP_HACKS
1001
area51_main_speedup_w(offs_t offset,uint32_t data,uint32_t mem_mask)1002 void jaguar_state::area51_main_speedup_w(offs_t offset, uint32_t data, uint32_t mem_mask)
1003 {
1004 uint64_t curcycles = m_maincpu->total_cycles();
1005
1006 /* store the data */
1007 COMBINE_DATA(m_main_speedup);
1008
1009 /* if it's been less than 400 cycles since the last time */
1010 if (*m_main_speedup == 0 && curcycles - m_main_speedup_last_cycles < 400)
1011 {
1012 /* increment the count; if we hit 5, we can spin until an interrupt comes */
1013 if (m_main_speedup_hits++ > 5)
1014 {
1015 m_maincpu->spin_until_interrupt();
1016 m_main_speedup_hits = 0;
1017 }
1018 }
1019
1020 /* if it's been more than 400 cycles, reset our count */
1021 else
1022 m_main_speedup_hits = 0;
1023
1024 /* remember the last cycle count */
1025 m_main_speedup_last_cycles = curcycles;
1026 }
1027
1028
1029 /*
1030 Explanation:
1031
1032 The Area 51/Maximum Force duo writes to a non-aligned address, so our check
1033 against 0 must handle that explicitly.
1034 */
1035
area51mx_main_speedup_w(offs_t offset,uint32_t data,uint32_t mem_mask)1036 void jaguar_state::area51mx_main_speedup_w(offs_t offset, uint32_t data, uint32_t mem_mask)
1037 {
1038 uint64_t curcycles = m_maincpu->total_cycles();
1039
1040 /* store the data */
1041 COMBINE_DATA(&m_main_speedup[offset]);
1042
1043 /* if it's been less than 450 cycles since the last time */
1044 if (((m_main_speedup[0] << 16) | (m_main_speedup[1] >> 16)) == 0 && curcycles - m_main_speedup_last_cycles < 450)
1045 {
1046 /* increment the count; if we hit 5, we can spin until an interrupt comes */
1047 if (m_main_speedup_hits++ > 10)
1048 {
1049 m_maincpu->spin_until_interrupt();
1050 m_main_speedup_hits = 0;
1051 }
1052 }
1053
1054 /* if it's been more than 450 cycles, reset our count */
1055 else
1056 m_main_speedup_hits = 0;
1057
1058 /* remember the last cycle count */
1059 m_main_speedup_last_cycles = curcycles;
1060 }
1061
1062 #endif
1063
1064
1065 /*************************************
1066 *
1067 * Main CPU memory handlers
1068 *
1069 *************************************/
1070
1071 // surely these should be 16-bit natively if the standard Jaguar is driven by a plain 68k?
1072 // all these trampolines are not good for performance ;-)
1073
gpuctrl_r16(offs_t offset,uint16_t mem_mask)1074 uint16_t jaguar_state::gpuctrl_r16(offs_t offset, uint16_t mem_mask){ if (!(offset&1)) { return gpuctrl_r(offset>>1, mem_mask<<16) >> 16; } else { return gpuctrl_r(offset>>1, mem_mask); } }
gpuctrl_w16(offs_t offset,uint16_t data,uint16_t mem_mask)1075 void jaguar_state::gpuctrl_w16(offs_t offset, uint16_t data, uint16_t mem_mask){ if (!(offset&1)) { gpuctrl_w(offset>>1, data << 16, mem_mask << 16); } else { gpuctrl_w(offset>>1, data, mem_mask); } }
blitter_r16(offs_t offset,uint16_t mem_mask)1076 uint16_t jaguar_state::blitter_r16(offs_t offset, uint16_t mem_mask){ if (!(offset&1)) { return blitter_r(offset>>1, mem_mask<<16) >> 16; } else { return blitter_r(offset>>1, mem_mask); } }
blitter_w16(offs_t offset,uint16_t data,uint16_t mem_mask)1077 void jaguar_state::blitter_w16(offs_t offset, uint16_t data, uint16_t mem_mask){ if (!(offset&1)) { blitter_w(offset>>1, data << 16, mem_mask << 16); } else { blitter_w(offset>>1, data, mem_mask); } }
serial_r16(offs_t offset)1078 uint16_t jaguar_state::serial_r16(offs_t offset){ if (!(offset&1)) { return serial_r(offset>>1) >> 16; } else { return serial_r(offset>>1); } }
serial_w16(offs_t offset,uint16_t data)1079 void jaguar_state::serial_w16(offs_t offset, uint16_t data){ if (!(offset&1)) { serial_w(offset>>1, data << 16); } else { serial_w(offset>>1, data); } }
dspctrl_r16(offs_t offset,uint16_t mem_mask)1080 uint16_t jaguar_state::dspctrl_r16(offs_t offset, uint16_t mem_mask){ if (!(offset&1)) { return dspctrl_r(offset>>1, mem_mask<<16) >> 16; } else { return dspctrl_r(offset>>1, mem_mask); } }
dspctrl_w16(offs_t offset,uint16_t data,uint16_t mem_mask)1081 void jaguar_state::dspctrl_w16(offs_t offset, uint16_t data, uint16_t mem_mask){ if (!(offset&1)) { dspctrl_w(offset>>1, data << 16, mem_mask << 16); } else { dspctrl_w(offset>>1, data, mem_mask); } }
eeprom_cs16(offs_t offset)1082 uint16_t jaguar_state::eeprom_cs16(offs_t offset){ if (!(offset&1)) { return eeprom_cs() >> 16; } else { return eeprom_cs(); } }
eeprom_clk16(offs_t offset)1083 uint16_t jaguar_state::eeprom_clk16(offs_t offset){ if (!(offset&1)) { return eeprom_clk() >> 16; } else { return eeprom_clk(); } }
eeprom_w16(offs_t offset,uint16_t data)1084 void jaguar_state::eeprom_w16(offs_t offset, uint16_t data){ if (!(offset&1)) { eeprom_w(data << 16); } else { eeprom_w(data); } }
joystick_r16(offs_t offset)1085 uint16_t jaguar_state::joystick_r16(offs_t offset){ if (!(offset&1)) { return joystick_r() >> 16; } else { return joystick_r(); } }
joystick_w16(offs_t offset,uint16_t data,uint16_t mem_mask)1086 void jaguar_state::joystick_w16(offs_t offset, uint16_t data, uint16_t mem_mask){ if (!(offset&1)) { joystick_w(offset>>1, data << 16, mem_mask << 16); } else { joystick_w(offset>>1, data, mem_mask); } }
1087
shared_ram_r(offs_t offset)1088 uint32_t jaguar_state::shared_ram_r(offs_t offset){ return m_shared_ram[offset]; }
shared_ram_w(offs_t offset,uint32_t data,uint32_t mem_mask)1089 void jaguar_state::shared_ram_w(offs_t offset, uint32_t data, uint32_t mem_mask){ COMBINE_DATA(&m_shared_ram[offset]); }
rom_base_r(offs_t offset)1090 uint32_t jaguar_state::rom_base_r(offs_t offset){ return m_rom_base[offset*2+1] << 16 | m_rom_base[offset*2]; }
wave_rom_r(offs_t offset)1091 uint32_t jaguar_state::wave_rom_r(offs_t offset){ return m_wave_rom[offset*2+1] << 16 | m_wave_rom[offset*2]; }
cd_bios_r(offs_t offset)1092 uint32_t jaguarcd_state::cd_bios_r(offs_t offset){ return m_cd_bios[offset*2+1] << 16 | m_cd_bios[offset*2]; }
dsp_ram_r(offs_t offset)1093 uint32_t jaguar_state::dsp_ram_r(offs_t offset){ return m_dsp_ram[offset]; }
dsp_ram_w(offs_t offset,uint32_t data,uint32_t mem_mask)1094 void jaguar_state::dsp_ram_w(offs_t offset, uint32_t data, uint32_t mem_mask){ COMBINE_DATA(&m_dsp_ram[offset]); }
gpu_clut_r(offs_t offset)1095 uint32_t jaguar_state::gpu_clut_r(offs_t offset){ return m_gpu_clut[offset]; }
gpu_clut_w(offs_t offset,uint32_t data,uint32_t mem_mask)1096 void jaguar_state::gpu_clut_w(offs_t offset, uint32_t data, uint32_t mem_mask){ COMBINE_DATA(&m_gpu_clut[offset]); }
gpu_ram_r(offs_t offset)1097 uint32_t jaguar_state::gpu_ram_r(offs_t offset){ return m_gpu_ram[offset]; }
gpu_ram_w(offs_t offset,uint32_t data,uint32_t mem_mask)1098 void jaguar_state::gpu_ram_w(offs_t offset, uint32_t data, uint32_t mem_mask){ COMBINE_DATA(&m_gpu_ram[offset]); }
1099
shared_ram_r16(offs_t offset)1100 uint16_t jaguar_state::shared_ram_r16(offs_t offset){ if (!(offset&1)) { return shared_ram_r(offset>>1) >> 16; } else { return shared_ram_r(offset>>1); } }
shared_ram_w16(offs_t offset,uint16_t data,uint16_t mem_mask)1101 void jaguar_state::shared_ram_w16(offs_t offset, uint16_t data, uint16_t mem_mask){ if (!(offset&1)) { shared_ram_w(offset>>1, data << 16, mem_mask << 16); } else { shared_ram_w(offset>>1, data, mem_mask); } }
cart_base_r16(offs_t offset)1102 uint16_t jaguar_state::cart_base_r16(offs_t offset){ if (!(offset&1)) { return m_cart_base[offset>>1] >> 16; } else { return m_cart_base[offset>>1] & 0xffff; } }
dsp_ram_r16(offs_t offset)1103 uint16_t jaguar_state::dsp_ram_r16(offs_t offset){ if (!(offset&1)) { return dsp_ram_r(offset>>1) >> 16; } else { return dsp_ram_r(offset>>1); } }
dsp_ram_w16(offs_t offset,uint16_t data,uint16_t mem_mask)1104 void jaguar_state::dsp_ram_w16(offs_t offset, uint16_t data, uint16_t mem_mask){ if (!(offset&1)) { dsp_ram_w(offset>>1, data << 16, mem_mask << 16); } else { dsp_ram_w(offset>>1, data, mem_mask); } }
gpu_clut_r16(offs_t offset)1105 uint16_t jaguar_state::gpu_clut_r16(offs_t offset){ if (!(offset&1)) { return gpu_clut_r(offset>>1) >> 16; } else { return gpu_clut_r(offset>>1); } }
gpu_clut_w16(offs_t offset,uint16_t data,uint16_t mem_mask)1106 void jaguar_state::gpu_clut_w16(offs_t offset, uint16_t data, uint16_t mem_mask){ if (!(offset&1)) { gpu_clut_w(offset>>1, data << 16, mem_mask << 16); } else { gpu_clut_w(offset>>1, data, mem_mask); } }
gpu_ram_r16(offs_t offset)1107 uint16_t jaguar_state::gpu_ram_r16(offs_t offset){ if (!(offset&1)) { return gpu_ram_r(offset>>1) >> 16; } else { return gpu_ram_r(offset>>1); } }
gpu_ram_w16(offs_t offset,uint16_t data,uint16_t mem_mask)1108 void jaguar_state::gpu_ram_w16(offs_t offset, uint16_t data, uint16_t mem_mask){ if (!(offset&1)) { gpu_ram_w(offset>>1, data << 16, mem_mask << 16); } else { gpu_ram_w(offset>>1, data, mem_mask); } }
1109
console_base_map(address_map & map)1110 void jaguar_state::console_base_map(address_map &map)
1111 {
1112 map(0x000000, 0x1fffff).mirror(0x200000).rw(FUNC(jaguar_state::shared_ram_r16), FUNC(jaguar_state::shared_ram_w16));
1113 map(0xe00000, 0xe1ffff).rom().region("mainrom", 0);
1114 map(0xf00000, 0xf003ff).rw(FUNC(jaguar_state::tom_regs_r), FUNC(jaguar_state::tom_regs_w)); // might be reversed endian of the others..
1115 map(0xf00400, 0xf005ff).mirror(0x000200).rw(FUNC(jaguar_state::gpu_clut_r16), FUNC(jaguar_state::gpu_clut_w16));
1116 map(0xf02100, 0xf021ff).rw(FUNC(jaguar_state::gpuctrl_r16), FUNC(jaguar_state::gpuctrl_w16));
1117 map(0xf02200, 0xf022ff).mirror(0x008000).rw(FUNC(jaguar_state::blitter_r16), FUNC(jaguar_state::blitter_w16));
1118 map(0xf03000, 0xf03fff).mirror(0x008000).rw(FUNC(jaguar_state::gpu_ram_r16), FUNC(jaguar_state::gpu_ram_w16));
1119 map(0xf10000, 0xf103ff).rw(FUNC(jaguar_state::jerry_regs_r), FUNC(jaguar_state::jerry_regs_w)); // might be reversed endian of the others..
1120 map(0xf14000, 0xf14003).rw(FUNC(jaguar_state::joystick_r16), FUNC(jaguar_state::joystick_w16));
1121 map(0xf14800, 0xf14803).rw(FUNC(jaguar_state::eeprom_clk16), FUNC(jaguar_state::eeprom_w16)); // GPI00
1122 map(0xf15000, 0xf15003).r(FUNC(jaguar_state::eeprom_cs16)); // GPI01
1123 map(0xf1a100, 0xf1a13f).rw(FUNC(jaguar_state::dspctrl_r16), FUNC(jaguar_state::dspctrl_w16));
1124 map(0xf1a140, 0xf1a17f).rw(FUNC(jaguar_state::serial_r16), FUNC(jaguar_state::serial_w16));
1125 map(0xf1b000, 0xf1cfff).rw(FUNC(jaguar_state::dsp_ram_r16), FUNC(jaguar_state::dsp_ram_w16));
1126 map(0xf1d000, 0xf1dfff).rom().region("waverom", 0);
1127 }
1128
jaguar_map(address_map & map)1129 void jaguar_state::jaguar_map(address_map &map)
1130 {
1131 console_base_map(map);
1132 map(0x800000, 0xdfffff).r(FUNC(jaguar_state::cart_base_r16));
1133 }
1134
cpu_space_map(address_map & map)1135 void jaguar_state::cpu_space_map(address_map &map)
1136 {
1137 map(0xfffff0, 0xffffff).m(m_maincpu, FUNC(m68000_base_device::autovectors_map));
1138 map(0xfffff5, 0xfffff5).lr8([] () -> u8 { return 0x40; }, "level2");
1139 }
1140
1141 /*
1142 CD-Rom emulation, chip codename Butch (the HW engineer was definitely obsessed with T&J somehow ...)
1143 TODO: this needs to be device-ized, of course ...
1144
1145 [0x00]: irq register
1146 (R)
1147 -x-- ---- ---- ---- CD uncorrectable data error pending
1148 --x- ---- ---- ---- Response from CD drive pending
1149 ---x ---- ---- ---- Command to CD drive pending
1150 ---- x--- ---- ---- Subcode data pending
1151 ---- -x-- ---- ---- Frame pending
1152 ---- --x- ---- ---- CD data FIFO half-full flag pending
1153 (W)
1154 ---- ---- -x-- ---- CIRC failure irq
1155 ---- ---- --x- ---- CD module command RX buffer full irq
1156 ---- ---- ---x ---- CD module command TX buffer empty irq
1157 ---- ---- ---- x--- Enable pre-set subcode time-match found irq
1158 ---- ---- ---- -x-- Enable CD subcode frame-time irq
1159 ---- ---- ---- --x- Enable CD data FIFO half full irq
1160 ---- ---- ---- ---x set to enable irq
1161 [0x04]: DSA control register
1162 [0x0a]: DSA TX/RX data (sends commands with this)
1163 0x01 Play Title (?)
1164 0x02 Stop
1165 0x03 Read TOC
1166 0x04 Pause
1167 0x05 Unpause
1168 0x09 Get Title Len
1169 0x0a Open Tray
1170 0x0b Close Tray
1171 0x0d Get Comp Time
1172 0x10 Goto ABS Min
1173 0x11 Goto ABS Sec
1174 0x12 Goto ABS Frame
1175 0x14 Read Long TOC
1176 0x15 Set Mode
1177 0x16 Get Error
1178 0x17 Clear Error
1179 0x18 Spin Up
1180 0x20 Play AB Min
1181 0x21 Play AB Sec
1182 0x22 Play AB Frame
1183 0x23 Stop AB Min
1184 0x24 Stop AB Sec
1185 0x25 Stop AB Frame
1186 0x26 AB Release
1187 0x50 Get Disc Status
1188 0x51 Set Volume
1189 0x54 Get Maxsession
1190 0x70 Set DAC mode (?)
1191 0xa0-0xaf User Define (???)
1192 0xf0 Service
1193 0xf1 Sledge
1194 0xf2 Focus
1195 0xf3 Turntable
1196 0xf4 Radial
1197
1198 [0x10]: I2S bus control register
1199 [0x14]: CD subcode control register
1200 [0x18]: Subcode data register A
1201 [0x1C]: Subcode data register B
1202 [0x20]: Subcode time and compare enable
1203 [0x24]: I2S FIFO data
1204 [0x28]: I2S FIFO data (old)
1205 [0x2c]: ? (used at start-up)
1206
1207 */
1208
butch_regs_r16(offs_t offset)1209 uint16_t jaguarcd_state::butch_regs_r16(offs_t offset){ if (!(offset&1)) { return butch_regs_r(offset>>1) >> 16; } else { return butch_regs_r(offset>>1); } }
butch_regs_w16(offs_t offset,uint16_t data,uint16_t mem_mask)1210 void jaguarcd_state::butch_regs_w16(offs_t offset, uint16_t data, uint16_t mem_mask){ if (!(offset&1)) { butch_regs_w(offset>>1, data << 16, mem_mask << 16); } else { butch_regs_w(offset>>1, data, mem_mask); } }
1211
butch_regs_r(offs_t offset)1212 uint32_t jaguarcd_state::butch_regs_r(offs_t offset)
1213 {
1214 switch(offset*4)
1215 {
1216 case 8: //DS DATA
1217 //m_butch_regs[0] &= ~0x2000;
1218 return m_butch_cmd_response[(m_butch_cmd_index++) % m_butch_cmd_size];
1219 }
1220
1221 return m_butch_regs[offset];
1222 }
1223
butch_regs_w(offs_t offset,uint32_t data,uint32_t mem_mask)1224 void jaguarcd_state::butch_regs_w(offs_t offset, uint32_t data, uint32_t mem_mask)
1225 {
1226 COMBINE_DATA(&m_butch_regs[offset]);
1227
1228 switch(offset*4)
1229 {
1230 case 8: //DS DATA
1231 switch((m_butch_regs[offset] & 0xff00) >> 8)
1232 {
1233 case 0x03: // Read TOC
1234 uint32_t msf;
1235
1236 if(m_butch_regs[offset] & 0xff) // Multi Session CD, TODO
1237 {
1238 m_butch_cmd_response[0] = 0x0029; // illegal value
1239 m_butch_regs[0] |= 0x2000;
1240 m_butch_cmd_index = 0;
1241 m_butch_cmd_size = 1;
1242 return;
1243 }
1244
1245 msf = cdrom_get_track_start(m_cd_file, 0) + 150;
1246
1247 /* first track number */
1248 m_butch_cmd_response[0] = 0x2000 | 1;
1249 /* last track number */
1250 m_butch_cmd_response[1] = 0x2100 | cdrom_get_last_track(m_cd_file);
1251
1252 /* start of first track minutes */
1253 m_butch_cmd_response[2] = 0x2200 | ((msf / 60) / 60);
1254 /* start of first track seconds */
1255 m_butch_cmd_response[3] = 0x2300 | (msf / 60) % 60;
1256 /* start of first track frame */
1257 m_butch_cmd_response[4] = 0x2400 | (msf % 75);
1258 m_butch_regs[0] |= 0x2000;
1259 m_butch_cmd_index = 0;
1260 m_butch_cmd_size = 5;
1261 break;
1262 case 0x14: // Read Long TOC
1263 {
1264 uint32_t msf;
1265 int ntrks = cdrom_get_last_track(m_cd_file);
1266
1267 for(int i=0;i<ntrks;i++)
1268 {
1269 msf = cdrom_get_track_start(m_cd_file, i) + 150;
1270
1271 /* track number */
1272 m_butch_cmd_response[i*5+0] = 0x6000 | (i+1);
1273 /* attributes (?) */
1274 m_butch_cmd_response[i*5+1] = 0x6100 | 0x00;
1275
1276 /* start of track minutes */
1277 m_butch_cmd_response[i*5+2] = 0x6200 | ((msf / 60) / 60);
1278 /* start of track seconds */
1279 m_butch_cmd_response[i*5+3] = 0x6300 | (msf / 60) % 60;
1280 /* start of track frame */
1281 m_butch_cmd_response[i*5+4] = 0x6400 | (msf % 75);
1282 }
1283 m_butch_regs[0] |= 0x2000;
1284 m_butch_cmd_index = 0;
1285 m_butch_cmd_size = 5*ntrks;
1286 }
1287
1288 break;
1289 case 0x15: // Set Mode
1290 m_butch_regs[0] |= 0x2000;
1291 m_butch_cmd_response[0] = 0x1700 | (m_butch_regs[offset] & 0xff);
1292 m_butch_cmd_index = 0;
1293 m_butch_cmd_size = 1;
1294 break;
1295 case 0x70: // Set DAC Mode
1296 m_butch_regs[0] |= 0x2000;
1297 m_butch_cmd_response[0] = 0x7000 | (m_butch_regs[offset] & 0xff);
1298 m_butch_cmd_index = 0;
1299 m_butch_cmd_size = 1;
1300 break;
1301 default:
1302 printf("%04x CMD\n",m_butch_regs[offset]);
1303 break;
1304 }
1305 break;
1306 }
1307 }
1308
jaguarcd_map(address_map & map)1309 void jaguarcd_state::jaguarcd_map(address_map &map)
1310 {
1311 console_base_map(map);
1312 map(0x800000, 0x83ffff).rom().region("cdbios", 0);
1313 map(0xdfff00, 0xdfff3f).rw(FUNC(jaguarcd_state::butch_regs_r16), FUNC(jaguarcd_state::butch_regs_w16));
1314 }
1315
1316 /*************************************
1317 *
1318 * Main CPU memory handlers
1319 *
1320 *************************************/
1321
r3000_map(address_map & map)1322 void jaguar_state::r3000_map(address_map &map)
1323 {
1324 map(0x04000000, 0x047fffff).ram().share("sharedram");
1325 map(0x04e00030, 0x04e0003f).rw(m_ide, FUNC(vt83c461_device::config_r), FUNC(vt83c461_device::config_w));
1326 map(0x04e001f0, 0x04e001f7).rw(m_ide, FUNC(vt83c461_device::cs0_r), FUNC(vt83c461_device::cs0_w));
1327 map(0x04e003f0, 0x04e003f7).rw(m_ide, FUNC(vt83c461_device::cs1_r), FUNC(vt83c461_device::cs1_w));
1328 map(0x04f00000, 0x04f003ff).rw(FUNC(jaguar_state::tom_regs_r), FUNC(jaguar_state::tom_regs_w));
1329 map(0x04f00400, 0x04f007ff).ram().share("gpuclut");
1330 map(0x04f02100, 0x04f021ff).rw(FUNC(jaguar_state::gpuctrl_r), FUNC(jaguar_state::gpuctrl_w));
1331 map(0x04f02200, 0x04f022ff).rw(FUNC(jaguar_state::blitter_r), FUNC(jaguar_state::blitter_w));
1332 map(0x04f03000, 0x04f03fff).mirror(0x00008000).ram().share("gpuram");
1333 map(0x04f10000, 0x04f103ff).rw(FUNC(jaguar_state::jerry_regs_r), FUNC(jaguar_state::jerry_regs_w));
1334 map(0x04f16000, 0x04f1600b).r(FUNC(jaguar_state::cojag_gun_input_r)); // GPI02
1335 map(0x04f17000, 0x04f17003).lr16(NAME([this] () { return uint16_t(m_system->read()); })); // GPI03
1336 map(0x04f17800, 0x04f17803).w(FUNC(jaguar_state::latch_w)); // GPI04
1337 map(0x04f17c00, 0x04f17c03).portr("P1_P2"); // GPI05
1338 map(0x04f1a100, 0x04f1a13f).rw(FUNC(jaguar_state::dspctrl_r), FUNC(jaguar_state::dspctrl_w));
1339 map(0x04f1a140, 0x04f1a17f).rw(FUNC(jaguar_state::serial_r), FUNC(jaguar_state::serial_w));
1340 map(0x04f1b000, 0x04f1cfff).ram().share("dspram");
1341
1342 map(0x06000000, 0x06000003).rw(FUNC(jaguar_state::misc_control_r), FUNC(jaguar_state::misc_control_w));
1343 map(0x10000000, 0x1007ffff).ram().share("mainram");
1344 map(0x12000000, 0x120fffff).ram().share("mainram2"); // tested in self-test only?
1345 map(0x14000004, 0x14000007).w("watchdog", FUNC(watchdog_timer_device::reset32_w));
1346 map(0x16000000, 0x16000003).w(FUNC(jaguar_state::eeprom_enable_w));
1347 map(0x18000000, 0x18001fff).rw(FUNC(jaguar_state::eeprom_data_r), FUNC(jaguar_state::eeprom_data_w)).share("nvram");
1348 map(0x1fc00000, 0x1fdfffff).rom().region("maincpu", 0);
1349 }
1350
r3000_rom_map(address_map & map)1351 void jaguar_state::r3000_rom_map(address_map &map)
1352 {
1353 r3000_map(map);
1354 map(0x04800000, 0x04bfffff).bankr("maingfxbank");
1355 map(0x04c00000, 0x04dfffff).bankr("mainsndbank");
1356 }
1357
1358
m68020_map(address_map & map)1359 void jaguar_state::m68020_map(address_map &map)
1360 {
1361 map(0x000000, 0x7fffff).ram().share("sharedram");
1362 map(0x800000, 0x9fffff).rom().region("maincpu", 0);
1363 map(0xa00000, 0xa1ffff).ram().share("mainram");
1364 map(0xa20000, 0xa21fff).rw(FUNC(jaguar_state::eeprom_data_r), FUNC(jaguar_state::eeprom_data_w)).share("nvram");
1365 map(0xa30000, 0xa30003).w("watchdog", FUNC(watchdog_timer_device::reset32_w));
1366 map(0xa40000, 0xa40003).w(FUNC(jaguar_state::eeprom_enable_w));
1367 map(0xb70000, 0xb70003).rw(FUNC(jaguar_state::misc_control_r), FUNC(jaguar_state::misc_control_w));
1368 // map(0xc00000, 0xdfffff).bankr("mainsndbank");
1369 map(0xe00030, 0xe0003f).rw(m_ide, FUNC(vt83c461_device::config_r), FUNC(vt83c461_device::config_w));
1370 map(0xe001f0, 0xe001f7).rw(m_ide, FUNC(vt83c461_device::cs0_r), FUNC(vt83c461_device::cs0_w));
1371 map(0xe003f0, 0xe003f7).rw(m_ide, FUNC(vt83c461_device::cs1_r), FUNC(vt83c461_device::cs1_w));
1372 map(0xf00000, 0xf003ff).rw(FUNC(jaguar_state::tom_regs_r), FUNC(jaguar_state::tom_regs_w));
1373 map(0xf00400, 0xf007ff).ram().share("gpuclut");
1374 map(0xf02100, 0xf021ff).rw(FUNC(jaguar_state::gpuctrl_r), FUNC(jaguar_state::gpuctrl_w));
1375 map(0xf02200, 0xf022ff).rw(FUNC(jaguar_state::blitter_r), FUNC(jaguar_state::blitter_w));
1376 map(0xf03000, 0xf03fff).mirror(0x008000).ram().share("gpuram");
1377 map(0xf10000, 0xf103ff).rw(FUNC(jaguar_state::jerry_regs_r), FUNC(jaguar_state::jerry_regs_w));
1378 map(0xf16000, 0xf1600b).r(FUNC(jaguar_state::cojag_gun_input_r)); // GPI02
1379 map(0xf17000, 0xf17003).lr16(NAME([this] () { return uint16_t(m_system->read()); })); // GPI03
1380 // map(0xf17800, 0xf17803).w(FUNC(jaguar_state::(latch_w)); // GPI04
1381 map(0xf17c00, 0xf17c03).portr("P1_P2"); // GPI05
1382 map(0xf1a100, 0xf1a13f).rw(FUNC(jaguar_state::dspctrl_r), FUNC(jaguar_state::dspctrl_w));
1383 map(0xf1a140, 0xf1a17f).rw(FUNC(jaguar_state::serial_r), FUNC(jaguar_state::serial_w));
1384 map(0xf1b000, 0xf1cfff).ram().share("dspram");
1385 }
1386
1387
1388 /*************************************
1389 *
1390 * GPU memory handlers
1391 *
1392 *************************************/
1393
gpu_map(address_map & map)1394 void jaguar_state::gpu_map(address_map &map)
1395 {
1396 map(0x000000, 0x7fffff).ram().share("sharedram");
1397 map(0xe00030, 0xe0003f).rw(m_ide, FUNC(vt83c461_device::config_r), FUNC(vt83c461_device::config_w));
1398 map(0xe001f0, 0xe001f7).rw(m_ide, FUNC(vt83c461_device::cs0_r), FUNC(vt83c461_device::cs0_w));
1399 map(0xe003f0, 0xe003f7).rw(m_ide, FUNC(vt83c461_device::cs1_r), FUNC(vt83c461_device::cs1_w));
1400 map(0xf00000, 0xf003ff).rw(FUNC(jaguar_state::tom_regs_r), FUNC(jaguar_state::tom_regs_w));
1401 map(0xf00400, 0xf007ff).ram().share("gpuclut");
1402 map(0xf02100, 0xf021ff).rw(FUNC(jaguar_state::gpuctrl_r), FUNC(jaguar_state::gpuctrl_w));
1403 map(0xf02200, 0xf022ff).rw(FUNC(jaguar_state::blitter_r), FUNC(jaguar_state::blitter_w));
1404 map(0xf03000, 0xf03fff).ram().share("gpuram");
1405 map(0xf10000, 0xf103ff).rw(FUNC(jaguar_state::jerry_regs_r), FUNC(jaguar_state::jerry_regs_w));
1406 }
1407
gpu_rom_map(address_map & map)1408 void jaguar_state::gpu_rom_map(address_map &map)
1409 {
1410 gpu_map(map);
1411 map(0x800000, 0xbfffff).bankr("gpugfxbank");
1412 map(0xc00000, 0xdfffff).bankr("dspsndbank");
1413 }
1414
1415
1416 /*************************************
1417 *
1418 * DSP memory handlers
1419 *
1420 *************************************/
1421
dsp_map(address_map & map)1422 void jaguar_state::dsp_map(address_map &map)
1423 {
1424 map(0x000000, 0x7fffff).ram().share("sharedram");
1425 map(0xf10000, 0xf103ff).rw(FUNC(jaguar_state::jerry_regs_r), FUNC(jaguar_state::jerry_regs_w));
1426 map(0xf1a100, 0xf1a13f).rw(FUNC(jaguar_state::dspctrl_r), FUNC(jaguar_state::dspctrl_w));
1427 map(0xf1a140, 0xf1a17f).rw(FUNC(jaguar_state::serial_r), FUNC(jaguar_state::serial_w));
1428 map(0xf1b000, 0xf1cfff).ram().share("dspram");
1429 map(0xf1d000, 0xf1dfff).r(FUNC(jaguar_state::wave_rom_r));
1430 }
1431
dsp_rom_map(address_map & map)1432 void jaguar_state::dsp_rom_map(address_map &map)
1433 {
1434 dsp_map(map);
1435 map(0x800000, 0xbfffff).bankr("gpugfxbank");
1436 map(0xc00000, 0xdfffff).bankr("dspsndbank");
1437 }
1438
1439 /* ToDo, these maps SHOULD be merged with the ones above */
1440
console_base_gpu_map(address_map & map)1441 void jaguar_state::console_base_gpu_map(address_map &map)
1442 {
1443 map.global_mask(0xffffff);
1444 map(0x000000, 0x1fffff).ram().mirror(0x200000).share("sharedram");
1445 map(0xe00000, 0xe1ffff).r(FUNC(jaguar_state::rom_base_r));
1446 map(0xf00000, 0xf003ff).rw(FUNC(jaguar_state::tom_regs_r), FUNC(jaguar_state::tom_regs_w));
1447 map(0xf00400, 0xf005ff).mirror(0x000200).ram().share("gpuclut");
1448 map(0xf02100, 0xf021ff).rw(FUNC(jaguar_state::gpuctrl_r), FUNC(jaguar_state::gpuctrl_w));
1449 map(0xf02200, 0xf022ff).mirror(0x008000).rw(FUNC(jaguar_state::blitter_r), FUNC(jaguar_state::blitter_w));
1450 map(0xf03000, 0xf03fff).mirror(0x008000).ram().share("gpuram");
1451 map(0xf10000, 0xf103ff).rw(FUNC(jaguar_state::jerry_regs_r), FUNC(jaguar_state::jerry_regs_w));
1452 map(0xf14000, 0xf14003).rw(FUNC(jaguar_state::joystick_r), FUNC(jaguar_state::joystick_w));
1453 map(0xf1a100, 0xf1a13f).rw(FUNC(jaguar_state::dspctrl_r), FUNC(jaguar_state::dspctrl_w));
1454 map(0xf1a140, 0xf1a17f).rw(FUNC(jaguar_state::serial_r), FUNC(jaguar_state::serial_w));
1455 map(0xf1b000, 0xf1cfff).ram().share("dspram");
1456 map(0xf1d000, 0xf1dfff).r(FUNC(jaguar_state::wave_rom_r));
1457 }
1458
jag_gpu_dsp_map(address_map & map)1459 void jaguar_state::jag_gpu_dsp_map(address_map &map)
1460 {
1461 console_base_gpu_map(map);
1462 map(0x800000, 0xdfffff).rom().region("cart", 0);
1463 }
1464
jagcd_gpu_dsp_map(address_map & map)1465 void jaguarcd_state::jagcd_gpu_dsp_map(address_map &map)
1466 {
1467 console_base_gpu_map(map);
1468 map(0x800000, 0x83ffff).r(FUNC(jaguarcd_state::cd_bios_r));
1469 map(0xdfff00, 0xdfff3f).rw(FUNC(jaguarcd_state::butch_regs_r), FUNC(jaguarcd_state::butch_regs_w));
1470 }
1471
1472 /*************************************
1473 *
1474 * Port definitions
1475 *
1476 *************************************/
1477
1478 /* "SYSTEM" is read at 0x04f17000
1479 D23-20 = /SER-4-1
1480 D19-16 = COINR4-1
1481 D7 = /VSYNCNEQ
1482 D6 = /S-TEST
1483 D5 = /VOLUMEUP
1484 D4 = /VOLUMEDOWN
1485 D3-D0 = ACTC4-1
1486 */
1487 static INPUT_PORTS_START( area51 )
1488 PORT_START("P1_P2")
1489 PORT_BIT( 0x000000ff, IP_ACTIVE_LOW, IPT_UNUSED )
1490 PORT_BIT( 0x00000100, IP_ACTIVE_LOW, IPT_START2 )
1491 PORT_BIT( 0x0000fe00, IP_ACTIVE_LOW, IPT_UNUSED )
1492
1493 PORT_BIT( 0x00ff0000, IP_ACTIVE_LOW, IPT_UNUSED )
1494 PORT_BIT( 0x01000000, IP_ACTIVE_LOW, IPT_START1 )
1495 PORT_BIT( 0xfe000000, IP_ACTIVE_LOW, IPT_UNUSED )
1496
1497 PORT_START("SYSTEM")
1498 PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
1499 PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 )
1500 PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN3 )
1501 PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_COIN4 )
1502 PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_VOLUME_DOWN )
1503 PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_VOLUME_UP )
1504 PORT_SERVICE( 0x0040, IP_ACTIVE_LOW ) // s-test
1505 PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_CUSTOM ) // vsyncneq
1506 PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
1507
1508 PORT_START("FAKE1_X") /* fake analog X */
1509 PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_X ) PORT_CROSSHAIR(X, 320.0/(320.0 - 7 -7), 0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(10)
1510
1511 PORT_START("FAKE1_Y") /* fake analog Y */
1512 PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(Y, (240.0 - 1)/240, 0.0, 0) PORT_SENSITIVITY(70) PORT_KEYDELTA(10)
1513
1514 PORT_START("FAKE2_X") /* fake analog X */
1515 PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_X ) PORT_CROSSHAIR(X, 320.0/(320.0 - 7 -7), 0.0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_PLAYER(2)
1516
1517 PORT_START("FAKE2_Y") /* fake analog Y */
1518 PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(Y, (240.0 - 1)/240, 0.0, 0) PORT_SENSITIVITY(70) PORT_KEYDELTA(10) PORT_PLAYER(2)
1519
1520 PORT_START("IN3") /* gun triggers */
1521 PORT_BIT( 0x00010000, IP_ACTIVE_LOW, IPT_CUSTOM ) // gun data valid
1522 PORT_BIT( 0x00020000, IP_ACTIVE_LOW, IPT_CUSTOM ) // gun data valid
1523 PORT_BIT( 0x00040000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
1524 PORT_BIT( 0x00080000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
1525 PORT_BIT( 0xfff00000, IP_ACTIVE_LOW, IPT_UNKNOWN )
1526 INPUT_PORTS_END
1527
1528
INPUT_PORTS_START(freezeat)1529 static INPUT_PORTS_START( freezeat )
1530 PORT_START("P1_P2")
1531 PORT_BIT( 0x000000ff, IP_ACTIVE_LOW, IPT_UNUSED )
1532 PORT_BIT( 0x00000100, IP_ACTIVE_LOW, IPT_START2 )
1533 PORT_BIT( 0x00000200, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
1534 PORT_BIT( 0x00000400, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
1535 PORT_BIT( 0x00000800, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
1536 PORT_BIT( 0x00001000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
1537 PORT_BIT( 0x00002000, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
1538 PORT_BIT( 0x00004000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
1539 PORT_BIT( 0x00008000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
1540
1541 PORT_BIT( 0x00ff0000, IP_ACTIVE_LOW, IPT_UNUSED )
1542 PORT_BIT( 0x01000000, IP_ACTIVE_LOW, IPT_START1 )
1543 PORT_BIT( 0x02000000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
1544 PORT_BIT( 0x04000000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
1545 PORT_BIT( 0x08000000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
1546 PORT_BIT( 0x10000000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
1547 PORT_BIT( 0x20000000, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
1548 PORT_BIT( 0x40000000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
1549 PORT_BIT( 0x80000000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
1550
1551 PORT_START("SYSTEM")
1552 PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
1553 PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 )
1554 PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN3 )
1555 PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_COIN4 )
1556 PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_CUSTOM ) // volume down
1557 PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_CUSTOM ) // volume up
1558 PORT_SERVICE( 0x0040, IP_ACTIVE_LOW ) // s-test
1559 PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_CUSTOM ) // vsyncneq
1560 PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
1561
1562 PORT_START("IN3")
1563 PORT_BIT( 0x000f0000, IP_ACTIVE_HIGH, IPT_CUSTOM ) // coin returns
1564 PORT_BIT( 0x00f00000, IP_ACTIVE_LOW, IPT_UNUSED )
1565 PORT_BIT( 0xff000000, IP_ACTIVE_LOW, IPT_UNUSED )
1566 INPUT_PORTS_END
1567
1568
1569 static INPUT_PORTS_START( fishfren )
1570 PORT_START("P1_P2")
1571 PORT_BIT( 0x000000ff, IP_ACTIVE_LOW, IPT_UNUSED )
1572 PORT_BIT( 0x00000100, IP_ACTIVE_LOW, IPT_START2 )
1573 PORT_BIT( 0x00000200, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
1574 PORT_BIT( 0x00000400, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
1575 PORT_BIT( 0x00000800, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
1576 PORT_BIT( 0x00001000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
1577 PORT_BIT( 0x00002000, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
1578 PORT_BIT( 0x00004000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
1579 PORT_BIT( 0x00008000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
1580
1581 PORT_BIT( 0x00ff0000, IP_ACTIVE_LOW, IPT_UNUSED )
1582 PORT_BIT( 0x01000000, IP_ACTIVE_LOW, IPT_START1 )
1583 PORT_BIT( 0x02000000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
1584 PORT_BIT( 0x04000000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
1585 PORT_BIT( 0x08000000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
1586 PORT_BIT( 0x10000000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
1587 PORT_BIT( 0x20000000, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
1588 PORT_BIT( 0x40000000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
1589 PORT_BIT( 0x80000000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
1590
1591 PORT_START("SYSTEM")
1592 PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
1593 PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 )
1594 PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN3 )
1595 PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_COIN4 )
1596 PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_CUSTOM ) // volume down
1597 PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_CUSTOM ) // volume up
1598 PORT_SERVICE( 0x0040, IP_ACTIVE_LOW ) // s-test
1599 PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_CUSTOM ) // vsyncneq
1600 PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
1601
1602 PORT_START("IN3")
1603 PORT_BIT( 0x000f0000, IP_ACTIVE_HIGH, IPT_CUSTOM ) // coin returns
1604 PORT_BIT( 0x00f00000, IP_ACTIVE_LOW, IPT_UNUSED )
1605 PORT_BIT( 0xff000000, IP_ACTIVE_LOW, IPT_UNUSED )
1606 INPUT_PORTS_END
1607
1608
1609 static INPUT_PORTS_START( vcircle )
1610 PORT_START("P1_P2")
1611 PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2)
1612 PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_PLAYER(2)
1613 PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_PLAYER(2)
1614 PORT_BIT( 0x000000f8, IP_ACTIVE_LOW, IPT_UNUSED )
1615 PORT_BIT( 0x00000100, IP_ACTIVE_LOW, IPT_START2 )
1616 PORT_BIT( 0x00000200, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
1617 PORT_BIT( 0x00000400, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
1618 PORT_BIT( 0x00000800, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
1619 PORT_BIT( 0x00001000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
1620 PORT_BIT( 0x00002000, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
1621 PORT_BIT( 0x00004000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
1622 PORT_BIT( 0x00008000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
1623
1624 PORT_BIT( 0x00010000, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(1)
1625 PORT_BIT( 0x00020000, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_PLAYER(1)
1626 PORT_BIT( 0x00040000, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_PLAYER(1)
1627 PORT_BIT( 0x00f80000, IP_ACTIVE_LOW, IPT_UNUSED )
1628 PORT_BIT( 0x01000000, IP_ACTIVE_LOW, IPT_START1 )
1629 PORT_BIT( 0x02000000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
1630 PORT_BIT( 0x04000000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
1631 PORT_BIT( 0x08000000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
1632 PORT_BIT( 0x10000000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
1633 PORT_BIT( 0x20000000, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
1634 PORT_BIT( 0x40000000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
1635 PORT_BIT( 0x80000000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
1636
1637 PORT_START("SYSTEM")
1638 PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
1639 PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 )
1640 PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN3 )
1641 PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_COIN4 )
1642 PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_VOLUME_DOWN )
1643 PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_VOLUME_UP )
1644 PORT_SERVICE( 0x0040, IP_ACTIVE_LOW ) // s-test
1645 PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_CUSTOM ) // vsyncneq
1646 PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
1647
1648 PORT_START("IN3")
1649 PORT_BIT( 0x000f0000, IP_ACTIVE_HIGH, IPT_CUSTOM ) // coin returns
1650 PORT_BIT( 0x00f00000, IP_ACTIVE_LOW, IPT_UNUSED )
1651 PORT_BIT( 0xff000000, IP_ACTIVE_LOW, IPT_UNUSED )
1652 INPUT_PORTS_END
1653
1654
1655 static INPUT_PORTS_START( jaguar )
1656 PORT_START("JOY0")
1657 PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
1658 PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
1659 PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
1660 PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
1661 PORT_BIT( 0xf0ff, IP_ACTIVE_LOW, IPT_UNUSED )
1662
1663 PORT_START("JOY1")
1664 PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P1 Keypad 1") PORT_CODE(KEYCODE_1) PORT_PLAYER(1)
1665 PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P1 Keypad 4") PORT_CODE(KEYCODE_4) PORT_PLAYER(1)
1666 PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P1 Keypad 7") PORT_CODE(KEYCODE_7) PORT_PLAYER(1)
1667 PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P1 Keypad *") PORT_CODE(KEYCODE_K) PORT_PLAYER(1)
1668 PORT_BIT( 0xf0ff, IP_ACTIVE_LOW, IPT_UNUSED )
1669
1670 PORT_START("JOY2")
1671 PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P1 Keypad 2") PORT_CODE(KEYCODE_2) PORT_PLAYER(1)
1672 PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P1 Keypad 5") PORT_CODE(KEYCODE_5) PORT_PLAYER(1)
1673 PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P1 Keypad 8") PORT_CODE(KEYCODE_8) PORT_PLAYER(1)
1674 PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P1 Keypad 0") PORT_CODE(KEYCODE_0) PORT_PLAYER(1)
1675 PORT_BIT( 0xf0ff, IP_ACTIVE_LOW, IPT_UNUSED )
1676
1677 PORT_START("JOY3")
1678 PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P1 Keypad 3") PORT_CODE(KEYCODE_3) PORT_PLAYER(1)
1679 PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P1 Keypad 6") PORT_CODE(KEYCODE_6) PORT_PLAYER(1)
1680 PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P1 Keypad 9") PORT_CODE(KEYCODE_9) PORT_PLAYER(1)
1681 PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P1 Keypad #") PORT_CODE(KEYCODE_L) PORT_PLAYER(1)
1682 PORT_BIT( 0xf0ff, IP_ACTIVE_LOW, IPT_UNUSED )
1683
1684 PORT_START("JOY4")
1685 PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 Keypad 3") PORT_PLAYER(2)
1686 PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 Keypad 6") PORT_PLAYER(2)
1687 PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 Keypad 9") PORT_PLAYER(2)
1688 PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 Keypad #") PORT_PLAYER(2)
1689 PORT_BIT( 0x0fff, IP_ACTIVE_LOW, IPT_UNUSED )
1690
1691 PORT_START("JOY5")
1692 PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 Keypad 2") PORT_PLAYER(2)
1693 PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 Keypad 5") PORT_PLAYER(2)
1694 PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 Keypad 8") PORT_PLAYER(2)
1695 PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 Keypad 0") PORT_PLAYER(2)
1696 PORT_BIT( 0x0fff, IP_ACTIVE_LOW, IPT_UNUSED )
1697
1698 PORT_START("JOY6")
1699 PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 Keypad 1") PORT_PLAYER(2)
1700 PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 Keypad 4") PORT_PLAYER(2)
1701 PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 Keypad 7") PORT_PLAYER(2)
1702 PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 Keypad *") PORT_PLAYER(2)
1703 PORT_BIT( 0x0fff, IP_ACTIVE_LOW, IPT_UNUSED )
1704
1705 PORT_START("JOY7")
1706 PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
1707 PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
1708 PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
1709 PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
1710 PORT_BIT( 0x0fff, IP_ACTIVE_LOW, IPT_UNUSED )
1711
1712 PORT_START("BUTTONS0")
1713 PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("P1 Pause") PORT_CODE(KEYCODE_I) PORT_PLAYER(1)
1714 PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("P1 A") PORT_PLAYER(1)
1715 PORT_BIT( 0xfffc, IP_ACTIVE_LOW, IPT_UNUSED )
1716
1717 PORT_START("BUTTONS1")
1718 PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("P1 B") PORT_PLAYER(1)
1719 PORT_BIT( 0xfffd, IP_ACTIVE_LOW, IPT_UNUSED )
1720
1721 PORT_START("BUTTONS2")
1722 PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("P1 C") PORT_PLAYER(1)
1723 PORT_BIT( 0xfffd, IP_ACTIVE_LOW, IPT_UNUSED )
1724
1725 PORT_START("BUTTONS3")
1726 PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("P1 Option") PORT_CODE(KEYCODE_O) PORT_PLAYER(1)
1727 PORT_BIT( 0xfffd, IP_ACTIVE_LOW, IPT_UNUSED )
1728
1729 PORT_START("BUTTONS4")
1730 PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("P2 Option") PORT_PLAYER(2)
1731 PORT_BIT( 0xfffd, IP_ACTIVE_LOW, IPT_UNUSED )
1732
1733 PORT_START("BUTTONS5")
1734 PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("P2 C") PORT_PLAYER(2)
1735 PORT_BIT( 0xfffd, IP_ACTIVE_LOW, IPT_UNUSED )
1736
1737 PORT_START("BUTTONS6")
1738 PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("P2 B") PORT_PLAYER(2)
1739 PORT_BIT( 0xfffd, IP_ACTIVE_LOW, IPT_UNUSED )
1740
1741 PORT_START("BUTTONS7")
1742 PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("P2 Pause") PORT_PLAYER(2)
1743 PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("P2 A") PORT_PLAYER(2)
1744 PORT_BIT( 0xfffc, IP_ACTIVE_LOW, IPT_UNUSED )
1745
1746 PORT_START("CONFIG")
1747 PORT_CONFNAME( 0x02, 0x00, "Show Logo")
1748 PORT_CONFSETTING( 0x00, "Yes")
1749 PORT_CONFSETTING( 0x02, "No")
1750 PORT_CONFNAME( 0x10, 0x10, "TV System")
1751 PORT_CONFSETTING( 0x00, "PAL")
1752 PORT_CONFSETTING( 0x10, "NTSC")
1753 INPUT_PORTS_END
1754
1755 /*************************************
1756 *
1757 * Machine driver
1758 *
1759 *************************************/
1760
1761 void jaguar_state::video_config(machine_config &config, const XTAL clock)
1762 {
1763 JAGUARGPU(config, m_gpu, clock);
1764 m_gpu->irq().set(FUNC(jaguar_state::gpu_cpu_int));
1765
1766 JAGUARDSP(config, m_dsp, clock);
1767 m_dsp->irq().set(FUNC(jaguar_state::dsp_cpu_int));
1768
1769 // TODO: Tom
1770 // TODO: Object Processor
1771
1772 JAG_BLITTER(config, m_blitter, clock);
1773 }
1774
cojagr3k(machine_config & config)1775 void jaguar_state::cojagr3k(machine_config &config)
1776 {
1777 /* basic machine hardware */
1778 R3041(config, m_maincpu, R3000_CLOCK).set_endianness(ENDIANNESS_BIG);
1779 m_maincpu->set_addrmap(AS_PROGRAM, &jaguar_state::r3000_map);
1780
1781 video_config(config, COJAG_CLOCK/2);
1782 m_gpu->set_addrmap(AS_PROGRAM, &jaguar_state::gpu_map);
1783 m_dsp->set_addrmap(AS_PROGRAM, &jaguar_state::dsp_map);
1784
1785 NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1);
1786
1787 WATCHDOG_TIMER(config, "watchdog");
1788
1789 VT83C461(config, m_ide).options(cojag_devices, "hdd", nullptr, true);
1790 m_ide->irq_handler().set(FUNC(jaguar_state::external_int));
1791
1792 /* video hardware */
1793 SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
1794 m_screen->set_video_attributes(VIDEO_UPDATE_BEFORE_VBLANK);
1795 m_screen->set_raw(COJAG_PIXEL_CLOCK/2, 456, 42, 402, 262, 17, 257);
1796 m_screen->set_screen_update(FUNC(jaguar_state::screen_update));
1797
1798 PALETTE(config, m_palette, FUNC(jaguar_state::jagpal_ycc), 65536);
1799
1800 /* sound hardware */
1801 SPEAKER(config, "lspeaker").front_left();
1802 SPEAKER(config, "rspeaker").front_right();
1803 DAC_16BIT_R2R_TWOS_COMPLEMENT(config, m_ldac, 0).add_route(ALL_OUTPUTS, "lspeaker", 1.0); // unknown DAC
1804 DAC_16BIT_R2R_TWOS_COMPLEMENT(config, m_rdac, 0).add_route(ALL_OUTPUTS, "rspeaker", 1.0); // unknown DAC
1805
1806 // TODO: subwoofer speaker
1807 }
1808
cojagr3k_rom(machine_config & config)1809 void jaguar_state::cojagr3k_rom(machine_config &config)
1810 {
1811 cojagr3k(config);
1812
1813 m_maincpu->set_addrmap(AS_PROGRAM, &jaguar_state::r3000_rom_map);
1814 m_gpu->set_addrmap(AS_PROGRAM, &jaguar_state::gpu_rom_map);
1815 m_dsp->set_addrmap(AS_PROGRAM, &jaguar_state::dsp_rom_map);
1816
1817 m_ide->slot(0).set_default_option(nullptr);
1818 }
1819
cojag68k(machine_config & config)1820 void jaguar_state::cojag68k(machine_config &config)
1821 {
1822 cojagr3k(config);
1823
1824 /* basic machine hardware */
1825 M68EC020(config.replace(), m_maincpu, M68K_CLOCK/2);
1826 m_maincpu->set_addrmap(AS_PROGRAM, &jaguar_state::m68020_map);
1827 }
1828
jaguar(machine_config & config)1829 void jaguar_state::jaguar(machine_config &config)
1830 {
1831 /* basic machine hardware */
1832 M68000(config, m_maincpu, JAGUAR_CLOCK/2); // MC68000FN12F 16 MHz
1833 m_maincpu->set_addrmap(AS_PROGRAM, &jaguar_state::jaguar_map);
1834 m_maincpu->set_addrmap(m68000_device::AS_CPU_SPACE, &jaguar_state::cpu_space_map);
1835
1836 video_config(config, JAGUAR_CLOCK);
1837 m_gpu->set_addrmap(AS_PROGRAM, &jaguar_state::jag_gpu_dsp_map);
1838 m_dsp->set_addrmap(AS_PROGRAM, &jaguar_state::jag_gpu_dsp_map);
1839
1840 // MCFG_NVRAM_HANDLER(jaguar)
1841
1842 /* video hardware */
1843 SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
1844 m_screen->set_video_attributes(VIDEO_UPDATE_BEFORE_VBLANK);
1845 m_screen->set_raw(JAGUAR_CLOCK, 456, 42, 402, 262, 17, 257);
1846 m_screen->set_screen_update(FUNC(jaguar_state::screen_update));
1847
1848 PALETTE(config, m_palette, FUNC(jaguar_state::jagpal_ycc), 65536);
1849
1850 /* sound hardware */
1851 SPEAKER(config, "lspeaker").front_left();
1852 SPEAKER(config, "rspeaker").front_right();
1853 DAC_16BIT_R2R_TWOS_COMPLEMENT(config, m_ldac, 0).add_route(ALL_OUTPUTS, "lspeaker", 1.0); // unknown DAC
1854 DAC_16BIT_R2R_TWOS_COMPLEMENT(config, m_rdac, 0).add_route(ALL_OUTPUTS, "rspeaker", 1.0); // unknown DAC
1855
1856 /* quickload */
1857 QUICKLOAD(config, "quickload", "abs,bin,cof,jag,prg").set_load_callback(FUNC(jaguar_state::quickload_cb));
1858
1859 /* cartridge */
1860 generic_cartslot_device &cartslot(GENERIC_CARTSLOT(config, "cartslot", generic_plain_slot, "jaguar_cart", "j64,rom,bin"));
1861 cartslot.set_device_load(FUNC(jaguar_state::cart_load));
1862
1863 /* software lists */
1864 SOFTWARE_LIST(config, "cart_list").set_original("jaguar");
1865
1866 EEPROM_93C46_16BIT(config, m_eeprom);
1867 }
1868
jaguarcd(machine_config & config)1869 void jaguarcd_state::jaguarcd(machine_config &config)
1870 {
1871 jaguar(config);
1872 m_maincpu->set_addrmap(AS_PROGRAM, &jaguarcd_state::jaguarcd_map);
1873
1874 m_gpu->set_addrmap(AS_PROGRAM, &jaguarcd_state::jagcd_gpu_dsp_map);
1875
1876 m_dsp->set_addrmap(AS_PROGRAM, &jaguarcd_state::jagcd_gpu_dsp_map);
1877
1878 CDROM(config, "cdrom").set_interface("jag_cdrom");
1879 }
1880
1881 /*************************************
1882 *
1883 * Driver initialization
1884 *
1885 *************************************/
1886
fix_endian(void * base,uint32_t size)1887 void jaguar_state::fix_endian( void *base, uint32_t size )
1888 {
1889 uint32_t *mem = reinterpret_cast<uint32_t *>(base);
1890
1891 for (uint32_t i = 0; i < size; i+=4)
1892 mem[i/4] = big_endianize_int32(mem[i/4]);
1893 }
1894
init_jaguar()1895 void jaguar_state::init_jaguar()
1896 {
1897 m_is_cojag = false;
1898 m_hacks_enabled = false;
1899 save_item(NAME(m_joystick_data));
1900
1901 /* Initialize for no cartridge present */
1902 m_using_cart = false;
1903 }
1904
init_jaguarcd()1905 void jaguarcd_state::init_jaguarcd()
1906 {
1907 m_hacks_enabled = false;
1908 save_item(NAME(m_joystick_data));
1909 }
1910
quickload_cb(device_image_interface & image,const char * file_type,int quickload_size)1911 image_init_result jaguar_state::quickload_cb(device_image_interface &image, const char *file_type, int quickload_size)
1912 {
1913 offs_t quickload_begin = 0x4000, start = quickload_begin, skip = 0;
1914
1915 memset(m_shared_ram, 0, 0x200000);
1916 quickload_size = std::min(quickload_size, int(0x200000 - quickload_begin));
1917
1918 image.fread( &memregion("maincpu")->base()[quickload_begin], quickload_size);
1919
1920 fix_endian(&memregion("maincpu")->base()[quickload_begin], quickload_size);
1921
1922 /* Deal with some of the numerous homebrew header systems */
1923 /* COF */
1924 if ((m_shared_ram[0x1000] & 0xffff0000) == 0x01500000)
1925 {
1926 start = m_shared_ram[0x100e];
1927 skip = m_shared_ram[0x1011];
1928 }
1929 else /* PRG */
1930 if (((m_shared_ram[0x1000] & 0xffff0000) == 0x601A0000) && (m_shared_ram[0x1007] == 0x4A414752))
1931 {
1932 uint32_t type = m_shared_ram[0x1008] >> 16;
1933 start = ((m_shared_ram[0x1008] & 0xffff) << 16) | (m_shared_ram[0x1009] >> 16);
1934 skip = 28;
1935 if (type == 2) skip = 42;
1936 else if (type == 3) skip = 46;
1937 }
1938 else /* ABS with header */
1939 if ((m_shared_ram[0x1000] & 0xffff0000) == 0x601B0000)
1940 {
1941 start = ((m_shared_ram[0x1005] & 0xffff) << 16) | (m_shared_ram[0x1006] >> 16);
1942 skip = 36;
1943 }
1944
1945 else /* A header used by Badcoder */
1946 if ((m_shared_ram[0x1000] & 0xffff0000) == 0x72000000)
1947 skip = 96;
1948
1949 else /* ABS binary */
1950 if (image.is_filetype("abs"))
1951 start = 0xc000;
1952
1953 else /* JAG binary */
1954 if (image.is_filetype("jag"))
1955 start = 0x5000;
1956
1957
1958 /* Now that we have the info, reload the file */
1959 if ((start != quickload_begin) || (skip))
1960 {
1961 memset(m_shared_ram, 0, 0x200000);
1962 image.fseek(0, SEEK_SET);
1963 image.fread( &memregion("maincpu")->base()[start-skip], quickload_size);
1964 quickload_begin = start;
1965 fix_endian(&memregion("maincpu")->base()[(start-skip)&0xfffffc], quickload_size);
1966 }
1967
1968
1969 /* Some programs are too lazy to set a stack pointer */
1970 m_maincpu->set_state_int(STATE_GENSP, 0x1000);
1971 m_shared_ram[0]=0x1000;
1972
1973 /* Transfer control to image */
1974 m_maincpu->set_pc(quickload_begin);
1975 m_shared_ram[1]=quickload_begin;
1976 return image_init_result::PASS;
1977 }
1978
DEVICE_IMAGE_LOAD_MEMBER(jaguar_state::cart_load)1979 DEVICE_IMAGE_LOAD_MEMBER( jaguar_state::cart_load )
1980 {
1981 uint32_t size, load_offset = 0;
1982
1983 if (!image.loaded_through_softlist())
1984 {
1985 size = image.length();
1986
1987 /* .rom files load & run at 802000 */
1988 if (image.is_filetype("rom"))
1989 {
1990 load_offset = 0x2000; // fix load address
1991 m_cart_base[0x101] = 0x802000; // fix exec address
1992 }
1993
1994 /* Load cart into memory */
1995 image.fread(&m_cart_base[load_offset/4], size);
1996 fix_endian(&m_cart_base[load_offset/4], size);
1997 }
1998 else
1999 {
2000 size = image.get_software_region_length("rom");
2001
2002 memcpy(&m_cart_base[0], image.get_software_region("rom"), size);
2003 }
2004
2005 memset(&m_shared_ram[0], 0, 0x200000);
2006
2007 /* Skip the logo */
2008 m_using_cart = true;
2009 // m_cart_base[0x102] = 1;
2010
2011 /* Transfer control to the bios */
2012 m_maincpu->reset();
2013 return image_init_result::PASS;
2014 }
2015
2016 /*************************************
2017 *
2018 * ROM definition(s)
2019 *
2020 * Date Information comes from either
2021 * ROM labels or from the Self-Test
2022 * as "Main"
2023 *
2024 *************************************/
2025
2026 /* Home System */
2027
2028 ROM_START( jaguar )
2029 ROM_REGION16_BE( 0x20000, "mainrom", 0 )
CRC(fb731aaa)2030 ROM_LOAD16_WORD( "jagboot.rom", 0x00000, 0x20000, CRC(fb731aaa) SHA1(f8991b0c385f4e5002fa2a7e2f5e61e8c5213356) )
2031
2032 ROM_REGION32_BE( 0x600000, "cart", ROMREGION_ERASE00 )
2033
2034 ROM_REGION16_BE( 0x1000, "waverom", 0 )
2035 ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )
2036 ROM_END
2037
2038 ROM_START( jaguarcd )
2039 ROM_REGION16_BE( 0x20000, "mainrom", 0 )
2040 ROM_LOAD16_WORD( "jagboot.rom", 0x00000, 0x20000, CRC(fb731aaa) SHA1(f8991b0c385f4e5002fa2a7e2f5e61e8c5213356) )
2041
2042 ROM_REGION32_BE( 0x600000, "cart", ROMREGION_ERASE00 )
2043 // TODO: cart needs to be removed (CD BIOS runs in the cart space)
2044
2045 ROM_REGION16_BE(0x40000, "cdbios", 0 )
2046 ROM_SYSTEM_BIOS( 0, "default", "Jaguar CD" )
2047 ROMX_LOAD( "jag_cd.bin", 0x00000, 0x040000, CRC(687068d5) SHA1(73883e7a6e9b132452436f7ab1aeaeb0776428e5), ROM_GROUPWORD | ROM_BIOS(0) )
2048 ROM_SYSTEM_BIOS( 1, "dev", "Jaguar Developer CD" )
2049 ROMX_LOAD( "jagdevcd.bin", 0x00000, 0x040000, CRC(55a0669c) SHA1(d61b7b5912118f114ef00cf44966a5ef62e455a5), ROM_GROUPWORD | ROM_BIOS(1) )
2050
2051 ROM_REGION16_BE( 0x1000, "waverom", 0 )
2052 ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )
2053 ROM_END
2054
2055
2056 /****************************************
2057
2058 ROM & Hard Disk based games
2059
2060 ****************************************/
2061
2062 ROM_START( area51t ) /* 68020 based, Area51 Time Warner License - MAIN: Oct 17 1996 17:15:41 / OS: 2.03CJ Oct 17 1996 17:15:01 */
2063 ROM_REGION( 0x200000, "maincpu", 0 ) /* 2MB for 68020 code */
2064 ROM_LOAD32_BYTE( "136105-0003-q_h.3h", 0x00000, 0x80000, CRC(0681f398) SHA1(9e96db5a4ff90800685a5b95f8d758d211d3b982) ) /* Also found labeled as AREA51, 68K, D2FF, 3H, 11/20/96 (each item on a seperate line) */
2065 ROM_LOAD32_BYTE( "136105-0002-q_p.3p", 0x00001, 0x80000, CRC(f76cfc68) SHA1(01a781b42b61279e09e0cb1d924e2a3e0df44591) ) /* Also found labeled as AREA51, 68K, 69FE, 3P, 11/20/96 (each item on a seperate line) */
2066 ROM_LOAD32_BYTE( "136105-0001-q_m.3m", 0x00002, 0x80000, CRC(f422b4a8) SHA1(f95ef428be18adafae65e35f412eb03dcdaf7ed4) ) /* Also found labeled as AREA51, 68K, FCFD, 3M, 11/20/96 (each item on a seperate line) */
2067 ROM_LOAD32_BYTE( "136105-0000-q_k.3k", 0x00003, 0x80000, CRC(1fb2f2b5) SHA1(cbed65463dd93eaf945750a9dc3a123d1c6bda42) ) /* Also found labeled as AREA51, 68K, 65FC, 3K, 11/20/96 (each item on a seperate line) */
2068
2069 ROM_REGION16_BE( 0x1000, "waverom", 0 )
2070 ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )
2071
2072 DISK_REGION( "ide:0:hdd:image" )
2073 DISK_IMAGE( "area51t", 0, SHA1(d2865cc7b1bb08a4393a72013a90e18d8a8f9860) )
2074 ROM_END
2075
2076 ROM_START( area51ta ) /* 68020 based, Area51 Time Warner License - MAIN: Nov 27 1995 15:51:56 / OS 2.03CJ Nov 15 1995 13:32:32 */
2077 ROM_REGION( 0x200000, "maincpu", 0 ) /* 2MB for 68020 code */
2078 ROM_LOAD32_BYTE( "136105-0003c.3h", 0x00000, 0x80000, CRC(e70a97c4) SHA1(39dabf6bf3dc6f717a587f362d040bfb332be9e1) ) /* Usually found with "orange" labels */
2079 ROM_LOAD32_BYTE( "136105-0002c.3p", 0x00001, 0x80000, CRC(e9c9f4bd) SHA1(7c6c50372d45dca8929767241b092339f3bab4d2) )
2080 ROM_LOAD32_BYTE( "136105-0001c.3m", 0x00002, 0x80000, CRC(6f135a81) SHA1(2d9660f240b14481e8c46bc98713e9dc12035063) )
2081 ROM_LOAD32_BYTE( "136105-0000c.3k", 0x00003, 0x80000, CRC(94f50c14) SHA1(a54552e3ac5c4f481ba4f2fc7d724534576fe76c) )
2082
2083 ROM_REGION16_BE( 0x1000, "waverom", 0 )
2084 ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )
2085
2086 DISK_REGION( "ide:0:hdd:image" )
2087 DISK_IMAGE( "area51t", 0, SHA1(d2865cc7b1bb08a4393a72013a90e18d8a8f9860) )
2088 ROM_END
2089
2090 ROM_START( area51a ) /* 68020 based, Area51 Atari Games License - MAIN: Oct 25 1995 11:08:10 / OS: 2.03CJ Oct 25 1995 10:19:38 */
2091 ROM_REGION( 0x200000, "maincpu", 0 ) /* 2MB for 68020 code */
2092 ROM_LOAD32_BYTE( "136105-0003a.3h", 0x00000, 0x80000, CRC(116d37e6) SHA1(5d36cae792dd349faa77cd2d8018722a28ee55c1) ) /* Usually found with "green" labels */
2093 ROM_LOAD32_BYTE( "136105-0002a.3p", 0x00001, 0x80000, CRC(eb10f539) SHA1(dadc4be5a442dd4bd17385033056555e528ed994) )
2094 ROM_LOAD32_BYTE( "136105-0001a.3m", 0x00002, 0x80000, CRC(c6d8322b) SHA1(90cf848a4195c51b505653cc2c74a3b9e3c851b8) )
2095 ROM_LOAD32_BYTE( "136105-0000a.3k", 0x00003, 0x80000, CRC(729eb1b7) SHA1(21864b4281b1ad17b2903e3aa294e4be74161e80) )
2096
2097 ROM_REGION16_BE( 0x1000, "waverom", 0 )
2098 ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )
2099
2100 DISK_REGION( "ide:0:hdd:image" )
2101 DISK_IMAGE( "area51", 0, SHA1(3b303bc37e206a6d7339352c869f050d04186f11) )
2102 ROM_END
2103
2104 ROM_START( area51 ) /* R3000 based, Area51 Atari Games License - MAIN: Oct 24 1996 12:02:23 / GUTS: 2.06CJ Nov 11 1996 11:46:43 */
2105 ROM_REGION( 0x200000, "maincpu", 0 ) /* 2MB for IDT 79R3041 code */
2106 ROM_LOAD32_BYTE( "2-c_area_51_hh.hh", 0x00000, 0x80000, CRC(13af6a1e) SHA1(69da54ed6886e825156bbcc256e8d7abd4dc1ff8) ) /* Green labels: 2-C AREA 51 HH */
2107 ROM_LOAD32_BYTE( "2-c_area_51_hl.hl", 0x00001, 0x80000, CRC(8ab6649b) SHA1(9b4945bc04f8a73161638a2c5fa2fd84c6fd31b4) ) /* Green labels: 2-C AREA 51 HL */
2108 ROM_LOAD32_BYTE( "2-c_area_51_lh.lh", 0x00002, 0x80000, CRC(a6524f73) SHA1(ae377a6803a4f7d1bbcc111725af121a3e82317d) ) /* Green labels: 2-C AREA 51 LH */
2109 ROM_LOAD32_BYTE( "2-c_area_51_ll.ll", 0x00003, 0x80000, CRC(471b15d2) SHA1(4b5f45ee140b03a6be61475cae1c2dbef0f07457) ) /* Green labels: 2-C AREA 51 LL */
2110
2111 ROM_REGION16_BE( 0x1000, "waverom", 0 )
2112 ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )
2113
2114 DISK_REGION( "ide:0:hdd:image" )
2115 DISK_IMAGE( "area51", 0, SHA1(3b303bc37e206a6d7339352c869f050d04186f11) )
2116 ROM_END
2117
2118
2119 ROM_START( maxforce ) /* R3000 based, labeled as "Maximum Force 5-23-97 v1.05" - Usually found with "light grey" labels */
2120 ROM_REGION( 0x200000, "maincpu", 0 ) /* 2MB for IDT 79R3041 code */
2121 ROM_LOAD32_BYTE( "1.05_maximum_force_hh_5-23-97.hh", 0x00000, 0x80000, CRC(ec7f8167) SHA1(0cf057bfb1f30c2c9621d3ed25021e7ba7bdd46e) ) /* Also found labeled as "MAXIMUM FORCE EE FIX PROG" */
2122 ROM_LOAD32_BYTE( "1.05_maximum_force_hl_5-23-97.hl", 0x00001, 0x80000, CRC(3172611c) SHA1(00f14f871b737c66c20f95743740d964d0be3f24) )
2123 ROM_LOAD32_BYTE( "1.05_maximum_force_lh_5-23-97.lh", 0x00002, 0x80000, CRC(84d49423) SHA1(88d9a6724f1118f2bbef5dfa27accc2b65c5ba1d) )
2124 ROM_LOAD32_BYTE( "1.05_maximum_force_ll_5-23-97.ll", 0x00003, 0x80000, CRC(16d0768d) SHA1(665a6d7602a7f2f5b1f332b0220b1533143d56b1) )
2125
2126 ROM_REGION16_BE( 0x1000, "waverom", 0 )
2127 ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )
2128
2129 DISK_REGION( "ide:0:hdd:image" )
2130 DISK_IMAGE( "maxforce", 0, SHA1(d54e7a8f3866bb2a1d28ae637e7c92ffa4dbe558) )
2131 ROM_END
2132
2133 ROM_START( maxf_102 ) /* R3000 based, labeled as "Maximum Force 2-27-97 v1.02" - Usually found with "yellow" labels */
2134 ROM_REGION( 0x200000, "maincpu", 0 ) /* 2MB for IDT 79R3041 code */
2135 ROM_LOAD32_BYTE( "1.02_maximum_force_hh_2-27-97.hh", 0x00000, 0x80000, CRC(8ff7009d) SHA1(da22eae298a6e0e36f503fa091ac3913423dcd0f) ) /* Also found labeled as MAX, FORCE, V. 1.02, PROG, HH, 46FF, 2/27/97 (each item on a seperate line) */
2136 ROM_LOAD32_BYTE( "1.02_maximum_force_hl_2-27-97.hl", 0x00001, 0x80000, CRC(96c2cc1d) SHA1(b332b8c042b92c736131c478cefac1c3c2d2673b) ) /* Also found labeled as MAX, FORCE, V. 1.02, PROG, HL, 14FE, 2/27/97 (each item on a seperate line) */
2137 ROM_LOAD32_BYTE( "1.02_maximum_force_lh_2-27-97.lh", 0x00002, 0x80000, CRC(459ffba5) SHA1(adb40db6904e84c17f32ac6518fd2e994da7883f) ) /* Also found labeled as MAX, FORCE, V. 1.02, PROG, LH, 15FD, 2/27/97 (each item on a seperate line) */
2138 ROM_LOAD32_BYTE( "1.02_maximum_force_ll_2-27-97.ll", 0x00003, 0x80000, CRC(e491be7f) SHA1(cbe281c099a4aa87067752d68cf2bb0ab3900531) ) /* Also found labeled as MAX, FORCE, V. 1.02, PROG, LL, 15FC, 2/27/97 (each item on a seperate line) */
2139
2140 ROM_REGION16_BE( 0x1000, "waverom", 0 )
2141 ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )
2142
2143 DISK_REGION( "ide:0:hdd:image" )
2144 DISK_IMAGE( "maxforce", 0, SHA1(d54e7a8f3866bb2a1d28ae637e7c92ffa4dbe558) )
2145 ROM_END
2146
2147 ROM_START( maxf_ng ) /* R3000 based - MAIN: Apr 18 1997 11:08:45 */
2148 ROM_REGION( 0x200000, "maincpu", 0 ) /* 2MB for IDT 79R3041 code */
2149 ROM_LOAD32_BYTE( "maximum_force_no_gore_hh.hh", 0x00000, 0x80000, CRC(08791c02) SHA1(9befbff3201c7d345109b26c296fd8548dbfc95b) )
2150 ROM_LOAD32_BYTE( "maximum_force_no_gore_hl.hl", 0x00001, 0x80000, CRC(52cf482c) SHA1(ff98b3f04987acef82a97a2ad35a9085fa84e6d5) )
2151 ROM_LOAD32_BYTE( "maximum_force_no_gore_lh.lh", 0x00002, 0x80000, CRC(ab4ee992) SHA1(69f0fe111d3f5f31151d2922579e5073e484b1e1) )
2152 ROM_LOAD32_BYTE( "maximum_force_no_gore_ll.ll", 0x00003, 0x80000, CRC(674aab43) SHA1(f79d790538756d1100b7e4ffed192a62a031a2cb) )
2153
2154 ROM_REGION16_BE( 0x1000, "waverom", 0 )
2155 ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )
2156
2157 ROM_REGION( 0x800, "user2", 0 ) /* 28C16 style eeprom, currently loaded but not used */
2158 ROM_LOAD( "28c16.17z", 0x000, 0x800, CRC(1cdd9088) SHA1(4f01f02ff95f31ced87a3cdd7f171afd92551266) )
2159
2160 DISK_REGION( "ide:0:hdd:image" )
2161 DISK_IMAGE( "maxforce", 0, SHA1(d54e7a8f3866bb2a1d28ae637e7c92ffa4dbe558) )
2162 ROM_END
2163
2164
2165 ROM_START( area51mx ) /* 68020 based - MAIN: Apr 22 1998 17:53:57 / GUTS: 2.04CJ Apr 22 1998 17:45:35 */
2166 ROM_REGION( 0x200000, "maincpu", 0 ) /* 2MB for 68020 code */
2167 ROM_LOAD32_BYTE( "2.0_68020_max-a51_kit_3h.3h", 0x00000, 0x80000, CRC(47cbf30b) SHA1(23377bcc65c0fc330d5bc7e76e233bae043ac364) ) /* Labeled as 2.0 68020 MAX/A51 KIT 3H */
2168 ROM_LOAD32_BYTE( "2.0_68020_max-a51_kit_3p.3p", 0x00001, 0x80000, CRC(a3c93684) SHA1(f6b3357bb69900a176fd6bc6b819b2f57b7d0f59) ) /* Labeled as 2.0 68020 MAX/A51 KIT 3P */
2169 ROM_LOAD32_BYTE( "2.0_68020_max-a51_kit_3m.3m", 0x00002, 0x80000, CRC(d800ac17) SHA1(3d515c8608d8101ee9227116175b3c3f1fe22e0c) ) /* Labeled as 2.0 68020 MAX/A51 KIT 3M */
2170 ROM_LOAD32_BYTE( "2.0_68020_max-a51_kit_3k.3k", 0x00003, 0x80000, CRC(0e78f308) SHA1(adc4c8e441eb8fe525d0a6220eb3a2a8791a7289) ) /* Labeled as 2.0 68020 MAX/A51 KIT 3K */
2171
2172 ROM_REGION16_BE( 0x1000, "waverom", 0 )
2173 ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )
2174
2175 DISK_REGION( "ide:0:hdd:image" )
2176 DISK_IMAGE( "area51mx", 0, SHA1(5ff10f4e87094d4449eabf3de7549564ca568c7e) )
2177 ROM_END
2178
2179 ROM_START( a51mxr3k ) /* R3000 based - MAIN: Feb 10 1998 11:52:51 / GUTS: 2.07CJ Feb 5 1998 18:52:26 */
2180 ROM_REGION( 0x200000, "maincpu", 0 ) /* 2MB for IDT 79R3041 code */
2181 ROM_LOAD32_BYTE( "1.0_r3k_max-a51_kit_hh.hh", 0x00000, 0x80000, CRC(a984dab2) SHA1(debb3bc11ff49e87a52e89a69533a1bab7db700e) ) /* Labeled as 1.0 R3K MAX/A51 KIT HH */
2182 ROM_LOAD32_BYTE( "1.0_r3k_max-a51_kit_hl.hl", 0x00001, 0x80000, CRC(0af49d74) SHA1(c19f26056a823fd32293e9a7b3ea868640eabf49) ) /* Labeled as 1.0 R3K MAX/A51 KIT HL */
2183 ROM_LOAD32_BYTE( "1.0_r3k_max-a51_kit_lh.lh", 0x00002, 0x80000, CRC(d7d94dac) SHA1(2060a74715f36a0d7f5dd0855eda48ad1f20f095) ) /* Labeled as 1.0 R3K MAX/A51 KIT LH */
2184 ROM_LOAD32_BYTE( "1.0_r3k_max-a51_kit_ll.ll", 0x00003, 0x80000, CRC(ece9e5ae) SHA1(7e44402726f5afa6d1670b27aa43ad13d21c4ad9) ) /* Labeled as 1.0 R3K MAX/A51 KIT LL */
2185
2186 ROM_REGION16_BE( 0x1000, "waverom", 0 )
2187 ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )
2188
2189 DISK_REGION( "ide:0:hdd:image" )
2190 DISK_IMAGE( "area51mx", 0, SHA1(5ff10f4e87094d4449eabf3de7549564ca568c7e) )
2191 ROM_END
2192
2193 ROM_START( a51mxr3ka ) /* R3000 based - MAIN: Feb 2 1998 14:10:29 / GUTS: 2.07CJ Jan 9 1998 21:11:55 */
2194 ROM_REGION( 0x200000, "maincpu", 0 ) /* 2MB for IDT 79R3041 code */
2195 ROM_LOAD32_BYTE( "maxa51_combo_r3k_hh_prog_2-02-98_67ff.hh", 0x00000, 0x80000, CRC(6af8950a) SHA1(33ae123065b14ed8d83635f3351ac5b5c136d206) ) /* Labeled as MAXA51 COMBO R3K HH PROG 2/02/98 67FF (each item on a seperate line) */
2196 ROM_LOAD32_BYTE( "maxa51_combo_r3k_hl_prog_2-02-98_72fe.hl", 0x00001, 0x80000, CRC(30dc3eea) SHA1(2b4e8d43ee28b2d1446c84ff79553a7ce1909f60) ) /* Labeled as MAXA51 COMBO R3K HL PROG 2/02/98 72FE (each item on a seperate line) */
2197 ROM_LOAD32_BYTE( "maxa51_combo_r3k_lh_prog_2-02-98_7ffd.lh", 0x00002, 0x80000, CRC(2c2124af) SHA1(6158644ef126f842a1a4f145141ce847302bbd62) ) /* Labeled as MAXA51 COMBO R3K LH PROG 2/02/98 7FFD (each item on a seperate line) */
2198 ROM_LOAD32_BYTE( "maxa51_combo_r3k_ll_prog_2-02-98_b3fc.ll", 0x00003, 0x80000, CRC(083f4429) SHA1(2be8db7c756a095c87f056da49b8e8832f18bca9) ) /* Labeled as MAXA51 COMBO R3K LL PROG 2/02/98 B3FC (each item on a seperate line) */
2199
2200 ROM_REGION16_BE( 0x1000, "waverom", 0 )
2201 ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )
2202
2203 DISK_REGION( "ide:0:hdd:image" )
2204 DISK_IMAGE( "area51mx", 0, SHA1(5ff10f4e87094d4449eabf3de7549564ca568c7e) )
2205 ROM_END
2206
2207
2208 ROM_START( vcircle )
2209 ROM_REGION( 0x200000, "maincpu", 0 ) /* 2MB for R3000 code */
2210 ROM_LOAD32_BYTE( "hh", 0x00000, 0x80000, CRC(7276f5f5) SHA1(716287e370a4f300b1743103f8031afc82de38ca) )
2211 ROM_LOAD32_BYTE( "hl", 0x00001, 0x80000, CRC(146060a1) SHA1(f291989f1f0ef228757f1990fb14da5ff8f3cf8d) )
2212 ROM_LOAD32_BYTE( "lh", 0x00002, 0x80000, CRC(be4b2ef6) SHA1(4332b3036e9cb12685e914d085d9a63aa856f0be) )
2213 ROM_LOAD32_BYTE( "ll", 0x00003, 0x80000, CRC(ba8753eb) SHA1(0322e0e37d814a38d08ba191b1a97fb1a55fe461) )
2214
2215 ROM_REGION16_BE( 0x1000, "waverom", 0 )
2216 ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )
2217
2218 DISK_REGION( "ide:0:hdd:image" )
2219 DISK_IMAGE( "vcircle", 0, SHA1(bfa79c4cacdc9c2cd6362f62a23056b3e35a2034) )
2220 ROM_END
2221
2222
2223
2224 /****************************************
2225
2226 ROM based games
2227
2228 ****************************************/
2229
2230
2231 ROM_START( fishfren )
2232 ROM_REGION( 0x200000, "maincpu", 0 ) /* 2MB for R3000 code */
2233 ROM_LOAD32_BYTE( "hh", 0x00000, 0x80000, CRC(2ef79767) SHA1(abcea584f2cbd71b05f9d7e61f40ca9da6799215) )
2234 ROM_LOAD32_BYTE( "hl", 0x00001, 0x80000, CRC(7eefd4a2) SHA1(181be04836704098082fd78cacc68ffa70e77892) )
2235 ROM_LOAD32_BYTE( "lh", 0x00002, 0x80000, CRC(bbe9ed15) SHA1(889af29afe6d984b39105aa238400392a5dfb2c5) )
2236 ROM_LOAD32_BYTE( "ll", 0x00003, 0x80000, CRC(d70d0f2c) SHA1(2689cbe56ae3d491348b241528b0fe345fa8484c) )
2237
2238 ROM_REGION16_BE( 0x1000, "waverom", 0 )
2239 ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )
2240
2241 ROM_REGION32_BE( 0x1000000, "romboard", 0 ) /* 16MB for 64-bit ROM data */
2242 ROMX_LOAD( "l63-56", 0x000000, 0x100000, CRC(42764ea5) SHA1(805245f01006bd974fbac56f688cfcf137ddc914), ROM_SKIP(7) )
2243 ROMX_LOAD( "l55-48", 0x000001, 0x100000, CRC(0c7592bb) SHA1(d5bd6b872abad58947842205f9eac46fd065e88f), ROM_SKIP(7) )
2244 ROMX_LOAD( "l47-40", 0x000002, 0x100000, CRC(6d7dcdb1) SHA1(914dae3b9df5c861f794b683571c5fb0c2c3c3fd), ROM_SKIP(7) )
2245 ROMX_LOAD( "l39-32", 0x000003, 0x100000, CRC(ef3b8d98) SHA1(858c3342e9693bfe887b91dde1116a1656a1a105), ROM_SKIP(7) )
2246 ROMX_LOAD( "l31-24", 0x000004, 0x100000, CRC(132d628e) SHA1(3ff9fa86092eb01f21ca3ccf1ee1e3a583cbdecb), ROM_SKIP(7) )
2247 ROMX_LOAD( "l23-16", 0x000005, 0x100000, CRC(b841f039) SHA1(79f661aee009aef2f5ad4122ae3e0ac94097a427), ROM_SKIP(7) )
2248 ROMX_LOAD( "l15-08", 0x000006, 0x100000, CRC(0800214e) SHA1(5372f2c3470619a4967958c76055486f76b5f150), ROM_SKIP(7) )
2249 ROMX_LOAD( "l07-00", 0x000007, 0x100000, CRC(f83b2e78) SHA1(83ee9d2bfba83e04fb794270926bd3e558c9aaa4), ROM_SKIP(7) )
2250 ROMX_LOAD( "h63-56", 0x800000, 0x080000, CRC(67740765) SHA1(8b22413d25e0dbfe2227d1a8a023961a4c13cb76), ROM_SKIP(7) )
2251 ROMX_LOAD( "h55-48", 0x800001, 0x080000, CRC(ffed0091) SHA1(6c8104acd7e6d95a111f9c7a4d3b6984293d72c4), ROM_SKIP(7) )
2252 ROMX_LOAD( "h47-40", 0x800002, 0x080000, CRC(6f448f72) SHA1(3a298b9851e4ba7aa611aa6c2b0dcf06f4301463), ROM_SKIP(7) )
2253 ROMX_LOAD( "h39-32", 0x800003, 0x080000, CRC(25a5bd67) SHA1(79f29bd36afb4574b9c923eee293964284713540), ROM_SKIP(7) )
2254 ROMX_LOAD( "h31-24", 0x800004, 0x080000, CRC(e7088cc0) SHA1(4cb184de748c5633e669a4675e6db9920d34811e), ROM_SKIP(7) )
2255 ROMX_LOAD( "h23-16", 0x800005, 0x080000, CRC(ab477a76) SHA1(ae9aa97dbc758cd741710fe08c6ea94a0a318451), ROM_SKIP(7) )
2256 ROMX_LOAD( "h15-08", 0x800006, 0x080000, CRC(25a423f1) SHA1(7530cf2e28e0755bfcbd70789ef5cbbfb3d94f9f), ROM_SKIP(7) )
2257 ROMX_LOAD( "h07-00", 0x800007, 0x080000, CRC(0f5f4cc6) SHA1(caa2b514fb1f2a815e63f7b8c6b79ce2dfa308c4), ROM_SKIP(7) )
2258 ROM_COPY( "romboard", 0x800000, 0xc00000, 0x400000 )
2259 ROM_END
2260
2261 ROM_START( freezeat )
2262 ROM_REGION( 0x200000, "maincpu", 0 ) /* 2MB for R3000 code */
2263 ROM_LOAD32_BYTE( "prog_eng.hh", 0x000000, 0x040000, CRC(f7cffafd) SHA1(62369de4cf0a5abab86f6bcf9621028b9e171ec3) )
2264 ROM_LOAD32_BYTE( "prog_eng.hl", 0x000001, 0x040000, CRC(17150705) SHA1(c5a32d334bffb58a816920cc1251a21acc5a6f92) )
2265 ROM_LOAD32_BYTE( "prog_eng.lh", 0x000002, 0x040000, CRC(12a903bf) SHA1(41f5949d7ed2081917af8411f92666b754564b37) )
2266 ROM_LOAD32_BYTE( "prog_eng.ll", 0x000003, 0x040000, CRC(cf69f971) SHA1(132b06f5fb49801fff7e5deb7aa71b44d5b1c6ca) )
2267
2268 ROM_REGION16_BE( 0x1000, "waverom", 0 )
2269 ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )
2270
2271 ROM_REGION32_BE( 0x1000000, "romboard", 0 ) /* 16MB for 64-bit ROM data */
2272 ROMX_LOAD( "fish_gr0.63-56", 0x000000, 0x100000, CRC(b61061c5) SHA1(aeb409aa5073232d80ed81b27946e753290234f4), ROM_SKIP(7) )
2273 ROMX_LOAD( "fish_gr0.55-48", 0x000001, 0x100000, CRC(c85acf42) SHA1(c3365caeb126a83a7e7afcda25f05849ceb5c98b), ROM_SKIP(7) )
2274 ROMX_LOAD( "fish_gr0.47-40", 0x000002, 0x100000, CRC(67f78f59) SHA1(40b256a8939fad365c7e896cff4a959fcc70a477), ROM_SKIP(7) )
2275 ROMX_LOAD( "fish_gr0.39-32", 0x000003, 0x100000, CRC(6be0508a) SHA1(20f617278ce1666348822d80686cecd8d9b1bc78), ROM_SKIP(7) )
2276 ROMX_LOAD( "fish_gr0.31-24", 0x000004, 0x100000, CRC(905606e0) SHA1(866cd98ea2399fed96f76b16dce751e2c7cfdc98), ROM_SKIP(7) )
2277 ROMX_LOAD( "fish_gr0.23-16", 0x000005, 0x100000, CRC(cdeef6fa) SHA1(1b4d58951b662040540e7d51f88c1b6f282562ee), ROM_SKIP(7) )
2278 ROMX_LOAD( "fish_gr0.15-08", 0x000006, 0x100000, CRC(ad81f204) SHA1(58584a6c8c6cfb6366eaa10aba8a226e419f5ce9), ROM_SKIP(7) )
2279 ROMX_LOAD( "fish_gr0.07-00", 0x000007, 0x100000, CRC(10ce7254) SHA1(2a88d45dbe78ea8358ecd8522b38d775a2fdb34a), ROM_SKIP(7) )
2280 ROMX_LOAD( "fish_eng.63-56", 0x800000, 0x100000, CRC(4a03f971) SHA1(1ae5ad9a6cd2d612c6519193134dcd5a3f6a5049), ROM_SKIP(7) )
2281 ROMX_LOAD( "fish_eng.55-48", 0x800001, 0x100000, CRC(6bc00de0) SHA1(b1b180c33906826703452875ce250b28352e2797), ROM_SKIP(7) )
2282 ROMX_LOAD( "fish_eng.47-40", 0x800002, 0x100000, CRC(41ccc677) SHA1(76ee042632cfdcc99a9bfb75f2a4ef04e08f101b), ROM_SKIP(7) )
2283 ROMX_LOAD( "fish_eng.39-32", 0x800003, 0x100000, CRC(59a8fa03) SHA1(19e91a4791e0d2dbd8578cee0fa07c491204b0dc), ROM_SKIP(7) )
2284 ROMX_LOAD( "fish_eng.31-24", 0x800004, 0x100000, CRC(c3bb50a1) SHA1(b868ac0812d1c13feae82d293bb323a93a72e1d3), ROM_SKIP(7) )
2285 ROMX_LOAD( "fish_eng.23-16", 0x800005, 0x100000, CRC(237cfc93) SHA1(15f61dc621c5328cc7752c76b2b1dae265a5e886), ROM_SKIP(7) )
2286 ROMX_LOAD( "fish_eng.15-08", 0x800006, 0x100000, CRC(65bec279) SHA1(5e99972279ee9ad32e67866fc63799579a10f2dd), ROM_SKIP(7) )
2287 ROMX_LOAD( "fish_eng.07-00", 0x800007, 0x100000, CRC(13fa20ad) SHA1(0a04fdea025109c0e604ef2a6d58cfb3adce9bd1), ROM_SKIP(7) )
2288 ROM_END
2289
2290 ROM_START( freezeatjp )
2291 ROM_REGION( 0x200000, "maincpu", 0 ) /* 2MB for R3000 code */
2292 ROM_LOAD32_BYTE( "prog_jpn.hh", 0x000000, 0x040000, CRC(989302bf) SHA1(232927ec0a52b8bb587a3c206af8e1c6cde67860) )
2293 ROM_LOAD32_BYTE( "prog_jpn.hl", 0x000001, 0x040000, CRC(6262b760) SHA1(12ca749f5cdc6db7d19f88a21f5f955b80206784) )
2294 ROM_LOAD32_BYTE( "prog_jpn.lh", 0x000002, 0x040000, CRC(c6a12b0c) SHA1(971242b5b09e15164e7c335e684b5043510c6462) )
2295 ROM_LOAD32_BYTE( "prog_jpn.ll", 0x000003, 0x040000, CRC(241ea755) SHA1(0db3cfbe577fc78387528390ebb14dbb7a09c97d) )
2296
2297 ROM_REGION16_BE( 0x1000, "waverom", 0 )
2298 ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )
2299
2300 ROM_REGION32_BE( 0x1000000, "romboard", 0 ) /* 16MB for 64-bit ROM data */
2301 ROMX_LOAD( "fish_gr0.63-56", 0x000000, 0x100000, CRC(b61061c5) SHA1(aeb409aa5073232d80ed81b27946e753290234f4), ROM_SKIP(7) )
2302 ROMX_LOAD( "fish_gr0.55-48", 0x000001, 0x100000, CRC(c85acf42) SHA1(c3365caeb126a83a7e7afcda25f05849ceb5c98b), ROM_SKIP(7) )
2303 ROMX_LOAD( "fish_gr0.47-40", 0x000002, 0x100000, CRC(67f78f59) SHA1(40b256a8939fad365c7e896cff4a959fcc70a477), ROM_SKIP(7) )
2304 ROMX_LOAD( "fish_gr0.39-32", 0x000003, 0x100000, CRC(6be0508a) SHA1(20f617278ce1666348822d80686cecd8d9b1bc78), ROM_SKIP(7) )
2305 ROMX_LOAD( "fish_gr0.31-24", 0x000004, 0x100000, CRC(905606e0) SHA1(866cd98ea2399fed96f76b16dce751e2c7cfdc98), ROM_SKIP(7) )
2306 ROMX_LOAD( "fish_gr0.23-16", 0x000005, 0x100000, CRC(cdeef6fa) SHA1(1b4d58951b662040540e7d51f88c1b6f282562ee), ROM_SKIP(7) )
2307 ROMX_LOAD( "fish_gr0.15-08", 0x000006, 0x100000, CRC(ad81f204) SHA1(58584a6c8c6cfb6366eaa10aba8a226e419f5ce9), ROM_SKIP(7) )
2308 ROMX_LOAD( "fish_gr0.07-00", 0x000007, 0x100000, CRC(10ce7254) SHA1(2a88d45dbe78ea8358ecd8522b38d775a2fdb34a), ROM_SKIP(7) )
2309 ROMX_LOAD( "fish_jpn.63-56", 0x800000, 0x100000, CRC(78c65a1f) SHA1(1a97737c222809930bde9df7a55e1ff1581a3202), ROM_SKIP(7) )
2310 ROMX_LOAD( "fish_jpn.55-48", 0x800001, 0x100000, CRC(9ffac0f1) SHA1(3ba5f8de32a5febb5d3d22f59ccb477834d33934), ROM_SKIP(7) )
2311 ROMX_LOAD( "fish_jpn.47-40", 0x800002, 0x100000, CRC(18543fb7) SHA1(4ab9969de9a66d6b7b70cfa5290c1cf7bce54838), ROM_SKIP(7) )
2312 ROMX_LOAD( "fish_jpn.39-32", 0x800003, 0x100000, CRC(22578f15) SHA1(4e314b22456ed4e4282406e990207e3b9bdf6203), ROM_SKIP(7) )
2313 ROMX_LOAD( "fish_jpn.31-24", 0x800004, 0x100000, CRC(5c41b91b) SHA1(ce354c8a4a3872b009e8af9f75e8f4f0892c7a7e), ROM_SKIP(7) )
2314 ROMX_LOAD( "fish_jpn.23-16", 0x800005, 0x100000, CRC(c2462646) SHA1(207d51a2aae076bc78548cf96325e670ea41609c), ROM_SKIP(7) )
2315 ROMX_LOAD( "fish_jpn.15-08", 0x800006, 0x100000, CRC(f8d998ec) SHA1(ffce4a16fbb2fff3dc0a29c0cede4dfe6316e97b), ROM_SKIP(7) )
2316 ROMX_LOAD( "fish_jpn.07-00", 0x800007, 0x100000, CRC(e7e0daa5) SHA1(108da84cc6b4df7ae88cfdacd27c1728e59cdb81), ROM_SKIP(7) )
2317 ROM_END
2318
2319 ROM_START( freezeat2 )
2320 ROM_REGION( 0x200000, "maincpu", 0 ) /* 2MB for R3000 code */
2321 ROM_LOAD32_BYTE( "prog.hh", 0x000000, 0x040000, CRC(a8aefa52) SHA1(ba95da93035520de4b15245f68217c59dfb69dbd) ) // sldh
2322 ROM_LOAD32_BYTE( "prog.hl", 0x000001, 0x040000, CRC(152dd641) SHA1(52fa260baf1979ed8f15f8abcbbeebd8e595d0e4) ) // sldh
2323 ROM_LOAD32_BYTE( "prog.lh", 0x000002, 0x040000, CRC(416d26ed) SHA1(11cf3b88415a8a5d0bb8e1df08603a85202186ef) ) // sldh
2324 ROM_LOAD32_BYTE( "prog.ll", 0x000003, 0x040000, CRC(d6a5dbc8) SHA1(0e2176c35cbc59b2a5283366210409d0e930bac7) ) // sldh
2325
2326 ROM_REGION16_BE( 0x1000, "waverom", 0 )
2327 ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )
2328
2329 ROM_REGION32_BE( 0x1000000, "romboard", 0 ) /* 16MB for 64-bit ROM data */
2330 ROMX_LOAD( "fish_gr0.63-56", 0x000000, 0x100000, CRC(99d0dc75) SHA1(b32126eea70c7584d1c34a6ca33282fbaf4b03aa), ROM_SKIP(7) ) // sldh
2331 ROMX_LOAD( "fish_gr0.55-48", 0x000001, 0x100000, CRC(2dfdfe62) SHA1(e0554d36ef5cf4b6ce171857ea4f2737f11286a5), ROM_SKIP(7) ) // sldh
2332 ROMX_LOAD( "fish_gr0.47-40", 0x000002, 0x100000, CRC(722aee2a) SHA1(bc79433131bed5b08453d1b80324a28a552783de), ROM_SKIP(7) ) // sldh
2333 ROMX_LOAD( "fish_gr0.39-32", 0x000003, 0x100000, CRC(919e31b4) SHA1(3807d4629d8277c780dba888c23d17ba47803f27), ROM_SKIP(7) ) // sldh
2334 ROMX_LOAD( "fish_gr0.31-24", 0x000004, 0x100000, CRC(a957ac95) SHA1(ddfaca994c06976bee8b123857904e64f40b7f31), ROM_SKIP(7) ) // sldh
2335 ROMX_LOAD( "fish_gr0.23-16", 0x000005, 0x100000, CRC(a147ec66) SHA1(6291008158d581b81e025ed34ff0950983c12c67), ROM_SKIP(7) ) // sldh
2336 ROMX_LOAD( "fish_gr0.15-08", 0x000006, 0x100000, CRC(206d2f38) SHA1(6aca89df26d3602ff1da3c23f19e0782439623ff), ROM_SKIP(7) ) // sldh
2337 ROMX_LOAD( "fish_gr0.07-00", 0x000007, 0x100000, CRC(06559831) SHA1(b2c022457425d7900337cfa2fd1622336c0c0bc5), ROM_SKIP(7) ) // sldh
2338 ROMX_LOAD( "fish_gr1.63-56", 0x800000, 0x100000, CRC(30c624d2) SHA1(4ced77d1663169d0cb37d6728ec52e67f05064c5), ROM_SKIP(7) ) // sldh
2339 ROMX_LOAD( "fish_gr1.55-48", 0x800001, 0x100000, CRC(049cd60f) SHA1(8a7615a76b57a4e6ef5d95a5ee6c56086671dbb6), ROM_SKIP(7) ) // sldh
2340 ROMX_LOAD( "fish_gr1.47-40", 0x800002, 0x100000, CRC(d6aaf3bf) SHA1(1c597bdc0e61fd0941cff5a8a93f24f108bd0daa), ROM_SKIP(7) ) // sldh
2341 ROMX_LOAD( "fish_gr1.39-32", 0x800003, 0x100000, CRC(7d6ebc69) SHA1(668769297f75f9c367bc5cde26419ed092fc9dd8), ROM_SKIP(7) ) // sldh
2342 ROMX_LOAD( "fish_gr1.31-24", 0x800004, 0x100000, CRC(6e5fee1f) SHA1(1eca79c8d395f881d0a05f10073998fcae70c3b1), ROM_SKIP(7) ) // sldh
2343 ROMX_LOAD( "fish_gr1.23-16", 0x800005, 0x100000, CRC(a8b1e9b4) SHA1(066285928e574e656510b90bc212a8d86660bd07), ROM_SKIP(7) ) // sldh
2344 ROMX_LOAD( "fish_gr1.15-08", 0x800006, 0x100000, CRC(c90080e6) SHA1(a764bdd6b4e9e727f7468a53424a9211ec5fd5a8), ROM_SKIP(7) ) // sldh
2345 ROMX_LOAD( "fish_gr1.07-00", 0x800007, 0x100000, CRC(1f20c020) SHA1(71b32386dc0444264f2f1e2a81899e0e9260994c), ROM_SKIP(7) ) // sldh
2346 ROM_END
2347
2348 ROM_START( freezeat3 )
2349 ROM_REGION( 0x200000, "maincpu", 0 ) /* 2MB for R3000 code */
2350 ROM_LOAD32_BYTE( "prog.hh", 0x000000, 0x040000, CRC(863942e6) SHA1(c7429c8a5c86ff93c64950e201cffca83dd7b7b0) ) // sldh
2351 ROM_LOAD32_BYTE( "prog.hl", 0x000001, 0x040000, CRC(2acc18ef) SHA1(ead02566f7641b1d1066bd2e257b695e5c7e8437) ) // sldh
2352 ROM_LOAD32_BYTE( "prog.lh", 0x000002, 0x040000, CRC(948cf20c) SHA1(86c757aa3c849ef5ba94ed4d5dbf10e833dab6bd) ) // sldh
2353 ROM_LOAD32_BYTE( "prog.ll", 0x000003, 0x040000, CRC(5f44969e) SHA1(32345d7c56a3a890e71f8c71f25414d442b60af8) ) // sldh
2354
2355 ROM_REGION16_BE( 0x1000, "waverom", 0 )
2356 ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )
2357
2358 ROM_REGION32_BE( 0x1000000, "romboard", 0 ) /* 16MB for 64-bit ROM data */
2359 ROMX_LOAD( "fish_gr0.63-56", 0x000000, 0x100000, CRC(36799449) SHA1(bb706fe7fdc68f840702a127eed7d4519dd45869), ROM_SKIP(7) ) // sldh
2360 ROMX_LOAD( "fish_gr0.55-48", 0x000001, 0x100000, CRC(23959947) SHA1(a35a6e62c7b2be57d41b1b64be93713cbf897f0a), ROM_SKIP(7) ) // sldh
2361 ROMX_LOAD( "fish_gr0.47-40", 0x000002, 0x100000, CRC(4657e4e0) SHA1(b6c07182babcb0a106bf4a8f2e3f524371dd882d), ROM_SKIP(7) ) // sldh
2362 ROMX_LOAD( "fish_gr0.39-32", 0x000003, 0x100000, CRC(b6ea4b64) SHA1(176f94f14307c40b9c611d6f6bc9118e498cdfad), ROM_SKIP(7) ) // sldh
2363 ROMX_LOAD( "fish_gr0.31-24", 0x000004, 0x100000, CRC(7d4ce71f) SHA1(a1cf5aa9df8dd29c777c10cfdce0925981584261), ROM_SKIP(7) ) // sldh
2364 ROMX_LOAD( "fish_gr0.23-16", 0x000005, 0x100000, CRC(02db4fd1) SHA1(fce6f31802bf36d6b006f0b212f553bdf21f9374), ROM_SKIP(7) ) // sldh
2365 ROMX_LOAD( "fish_gr0.15-08", 0x000006, 0x100000, CRC(7d496d6c) SHA1(f82db0621729a00acf4077482e9dfab040ac829b), ROM_SKIP(7) ) // sldh
2366 ROMX_LOAD( "fish_gr0.07-00", 0x000007, 0x100000, CRC(3aa389d8) SHA1(52502f2f3c91d7c29261f60fe8f489a352399c96), ROM_SKIP(7) ) // sldh
2367 ROMX_LOAD( "fish_gr1.63-56", 0x800000, 0x100000, CRC(ead678c9) SHA1(f83d467f6685965b6176b10adbd4e35ef808baf3), ROM_SKIP(7) ) // sldh
2368 ROMX_LOAD( "fish_gr1.55-48", 0x800001, 0x100000, CRC(3591e752) SHA1(df242d2f724edfd78f7191f0ba7a8cde2c09b25f), ROM_SKIP(7) ) // sldh
2369 ROMX_LOAD( "fish_gr1.47-40", 0x800002, 0x100000, CRC(e29a7a6c) SHA1(0bfb26076b390492eed81d4c4f0852c64fdccfce), ROM_SKIP(7) ) // sldh
2370 ROMX_LOAD( "fish_gr1.39-32", 0x800003, 0x100000, CRC(e980f957) SHA1(78e8ef07f443ce7991a46005627d5802d36d731c), ROM_SKIP(7) ) // sldh
2371 ROMX_LOAD( "fish_gr1.31-24", 0x800004, 0x100000, CRC(d90c5221) SHA1(7a330f39f3751d58157f872d92c3c2b91fe60d14), ROM_SKIP(7) ) // sldh
2372 ROMX_LOAD( "fish_gr1.23-16", 0x800005, 0x100000, CRC(9be0d4de) SHA1(9bb67a1f1db77483e896fed7096c1e23c153ede4), ROM_SKIP(7) ) // sldh
2373 ROMX_LOAD( "fish_gr1.15-08", 0x800006, 0x100000, CRC(122248af) SHA1(80dd5486106d475bd9f6d78919ebeb176e7becff), ROM_SKIP(7) ) // sldh
2374 ROMX_LOAD( "fish_gr1.07-00", 0x800007, 0x100000, CRC(5ae08327) SHA1(822d8292793509ebfbfce27e92a74c78c4328bda), ROM_SKIP(7) ) // sldh
2375 ROM_END
2376
2377 ROM_START( freezeat4 )
2378 ROM_REGION( 0x200000, "maincpu", 0 ) /* 2MB for R3000 code */
2379 ROM_LOAD32_BYTE( "prog.hh", 0x000000, 0x040000, CRC(80336f5e) SHA1(9946e8eebec2cd68db059f40f535ea212f41913d) ) // sldh
2380 ROM_LOAD32_BYTE( "prog.hl", 0x000001, 0x040000, CRC(55125520) SHA1(13be4fbf32bcd94a2ea97fd690bd1dfdff146d33) ) // sldh
2381 ROM_LOAD32_BYTE( "prog.lh", 0x000002, 0x040000, CRC(9d99c794) SHA1(f443f05a5979db66d61ef4174f0369a1cf4b7793) ) // sldh
2382 ROM_LOAD32_BYTE( "prog.ll", 0x000003, 0x040000, CRC(e03700e0) SHA1(24d41750f02ee7e8fb379e517751b661400aa521) ) // sldh
2383
2384 ROM_REGION16_BE( 0x1000, "waverom", 0 )
2385 ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )
2386
2387 ROM_REGION32_BE( 0x1000000, "romboard", 0 ) /* 16MB for 64-bit ROM data */
2388 ROMX_LOAD( "fish_gr0.63-56", 0x000000, 0x100000, CRC(36799449) SHA1(bb706fe7fdc68f840702a127eed7d4519dd45869), ROM_SKIP(7) ) // sldh
2389 ROMX_LOAD( "fish_gr0.55-48", 0x000001, 0x100000, CRC(23959947) SHA1(a35a6e62c7b2be57d41b1b64be93713cbf897f0a), ROM_SKIP(7) ) // sldh
2390 ROMX_LOAD( "fish_gr0.47-40", 0x000002, 0x100000, CRC(4657e4e0) SHA1(b6c07182babcb0a106bf4a8f2e3f524371dd882d), ROM_SKIP(7) ) // sldh
2391 ROMX_LOAD( "fish_gr0.39-32", 0x000003, 0x100000, CRC(b6ea4b64) SHA1(176f94f14307c40b9c611d6f6bc9118e498cdfad), ROM_SKIP(7) ) // sldh
2392 ROMX_LOAD( "fish_gr0.31-24", 0x000004, 0x100000, CRC(7d4ce71f) SHA1(a1cf5aa9df8dd29c777c10cfdce0925981584261), ROM_SKIP(7) ) // sldh
2393 ROMX_LOAD( "fish_gr0.23-16", 0x000005, 0x100000, CRC(02db4fd1) SHA1(fce6f31802bf36d6b006f0b212f553bdf21f9374), ROM_SKIP(7) ) // sldh
2394 ROMX_LOAD( "fish_gr0.15-08", 0x000006, 0x100000, CRC(7d496d6c) SHA1(f82db0621729a00acf4077482e9dfab040ac829b), ROM_SKIP(7) ) // sldh
2395 ROMX_LOAD( "fish_gr0.07-00", 0x000007, 0x100000, CRC(3aa389d8) SHA1(52502f2f3c91d7c29261f60fe8f489a352399c96), ROM_SKIP(7) ) // sldh
2396 ROMX_LOAD( "fish_gr1.63-56", 0x800000, 0x100000, CRC(c91b6ee4) SHA1(58d2d6b1b9847150b8b3e358842c4a097ef91475), ROM_SKIP(7) ) // sldh
2397 ROMX_LOAD( "fish_gr1.55-48", 0x800001, 0x100000, CRC(65528e55) SHA1(18020cababed379f77149b7e89e80b294766df31), ROM_SKIP(7) ) // sldh
2398 ROMX_LOAD( "fish_gr1.47-40", 0x800002, 0x100000, CRC(8fe4187f) SHA1(c9ceec40688617e1251142465d0e608f80a83e40), ROM_SKIP(7) ) // sldh
2399 ROMX_LOAD( "fish_gr1.39-32", 0x800003, 0x100000, CRC(fdf05a42) SHA1(849e224b68be2fb396ee4cb4729517470af7c282), ROM_SKIP(7) ) // sldh
2400 ROMX_LOAD( "fish_gr1.31-24", 0x800004, 0x100000, CRC(bb2cd741) SHA1(ac55a54c702d222cb1b9bb480b0f7a71bc315878), ROM_SKIP(7) ) // sldh
2401 ROMX_LOAD( "fish_gr1.23-16", 0x800005, 0x100000, CRC(ea8c5984) SHA1(eca1619c17dfac154a2024ec49b4b4f9f06a50c9), ROM_SKIP(7) ) // sldh
2402 ROMX_LOAD( "fish_gr1.15-08", 0x800006, 0x100000, CRC(0b00c816) SHA1(879b0e9d92fe737d740c348dc1cc376c8abfbdb8), ROM_SKIP(7) ) // sldh
2403 ROMX_LOAD( "fish_gr1.07-00", 0x800007, 0x100000, CRC(a84335c3) SHA1(340f5ddb9bff1ecd469eab8be36cc0ede84f1f5e), ROM_SKIP(7) ) // sldh
2404 ROM_END
2405
2406 ROM_START( freezeat5 )
2407 ROM_REGION( 0x200000, "maincpu", 0 ) /* 2MB for R3000 code */
2408 ROM_LOAD32_BYTE( "prog.hh", 0x000000, 0x040000, CRC(95c4fc64) SHA1(cd00efe7f760ef1e4cdc4bc8a3b368427cb15d8a) ) // sldh
2409 ROM_LOAD32_BYTE( "prog.hl", 0x000001, 0x040000, CRC(ffb9cb71) SHA1(35d6a5440d63bc5b94c4447645365039169da368) ) // sldh
2410 ROM_LOAD32_BYTE( "prog.lh", 0x000002, 0x040000, CRC(3ddacd80) SHA1(79f9650531847eefd83908b6ea1e8362688b377c) ) // sldh
2411 ROM_LOAD32_BYTE( "prog.ll", 0x000003, 0x040000, CRC(95ebefb0) SHA1(b88b12adabd7b0902c3a78919bcec8d9a2b04168) ) // sldh
2412
2413 ROM_REGION16_BE( 0x1000, "waverom", 0 )
2414 ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )
2415
2416 ROM_REGION32_BE( 0x1000000, "romboard", 0 ) /* 16MB for 64-bit ROM data */
2417 ROMX_LOAD( "fish_gr0.63-56", 0x000000, 0x100000, CRC(404a10c3) SHA1(8e353ac7608bd54f0fea610c85166ad14f2faadb), ROM_SKIP(7) ) // sldh
2418 ROMX_LOAD( "fish_gr0.55-48", 0x000001, 0x100000, CRC(0b262f2f) SHA1(2a963cb5c3344091406d090edfdda498709c6aa6), ROM_SKIP(7) ) // sldh
2419 ROMX_LOAD( "fish_gr0.47-40", 0x000002, 0x100000, CRC(43f86d26) SHA1(b31d36b11052514b5bcd5bf8e400457ca572c306), ROM_SKIP(7) ) // sldh
2420 ROMX_LOAD( "fish_gr0.39-32", 0x000003, 0x100000, CRC(5cf0228f) SHA1(7a8c59cf9a7744e9f332db5f661f507323375968), ROM_SKIP(7) ) // sldh
2421 ROMX_LOAD( "fish_gr0.31-24", 0x000004, 0x100000, CRC(7a24ff98) SHA1(db9e0e8bb417f187267a6e4fc1e66ff060ee4096), ROM_SKIP(7) ) // sldh
2422 ROMX_LOAD( "fish_gr0.23-16", 0x000005, 0x100000, CRC(ea163c93) SHA1(d07ed26191d36497c56b15774625a49ecb958386), ROM_SKIP(7) ) // sldh
2423 ROMX_LOAD( "fish_gr0.15-08", 0x000006, 0x100000, CRC(d364534f) SHA1(153908bb8929a898945f768f8bc3d853c6aeaceb), ROM_SKIP(7) ) // sldh
2424 ROMX_LOAD( "fish_gr0.07-00", 0x000007, 0x100000, CRC(7ba4cb0d) SHA1(16bd487123f499b7080596dc76253081179a0f66), ROM_SKIP(7) ) // sldh
2425 ROMX_LOAD( "fish_gr1.63-56", 0x800000, 0x100000, CRC(0e1fc4a9) SHA1(a200bb0af5f1e2c3f8d221ae4e9ba55b9dfb8550), ROM_SKIP(7) ) // sldh
2426 ROMX_LOAD( "fish_gr1.55-48", 0x800001, 0x100000, CRC(b696b875) SHA1(16dc4d5cee3f08360cf19926584419c21d781f45), ROM_SKIP(7) ) // sldh
2427 ROMX_LOAD( "fish_gr1.47-40", 0x800002, 0x100000, CRC(e78d9302) SHA1(f8b5ed992c433d63677edbeafd3e465b1d42b455), ROM_SKIP(7) ) // sldh
2428 ROMX_LOAD( "fish_gr1.39-32", 0x800003, 0x100000, CRC(9b50374c) SHA1(d8af3c9d8e0459e24b974cdf2e75c7c39582912f), ROM_SKIP(7) ) // sldh
2429 ROMX_LOAD( "fish_gr1.31-24", 0x800004, 0x100000, CRC(b6a19b7e) SHA1(5668b27db4dade8efb1524b8ecd1fe78498e8460), ROM_SKIP(7) ) // sldh
2430 ROMX_LOAD( "fish_gr1.23-16", 0x800005, 0x100000, CRC(ff835b67) SHA1(19da2de1d067069871c33c8b25fd2eac2d03f627), ROM_SKIP(7) ) // sldh
2431 ROMX_LOAD( "fish_gr1.15-08", 0x800006, 0x100000, CRC(8daf6995) SHA1(2f44031378b5fb1ba1f80a966dbe902316dc6fe8), ROM_SKIP(7) ) // sldh
2432 ROMX_LOAD( "fish_gr1.07-00", 0x800007, 0x100000, CRC(3676ac70) SHA1(640c4d4f53ca2bcae2009e402fd6ad70e40defa4), ROM_SKIP(7) ) // sldh
2433 ROM_END
2434
2435 ROM_START( freezeat6 )
2436 ROM_REGION( 0x200000, "maincpu", 0 ) /* 2MB for R3000 code */
2437 ROM_LOAD32_BYTE( "prog.hh", 0x000000, 0x040000, CRC(120711fe) SHA1(387e3cc8a1a9ea7d65c528387891d09ed9889fe3) ) // sldh
2438 ROM_LOAD32_BYTE( "prog.hl", 0x000001, 0x040000, CRC(18dd292a) SHA1(00e79851140716985f43594142c97e510a06b24a) ) // sldh
2439 ROM_LOAD32_BYTE( "prog.lh", 0x000002, 0x040000, CRC(ce387e72) SHA1(021a274da0b828550a47c3778e1059d4e759693a) ) // sldh
2440 ROM_LOAD32_BYTE( "prog.ll", 0x000003, 0x040000, CRC(9b307b7c) SHA1(71b696802fe7c867525d2626351dcfacedabd696) ) // sldh
2441
2442 ROM_REGION16_BE( 0x1000, "waverom", 0 )
2443 ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )
2444
2445 ROM_REGION32_BE( 0x1000000, "romboard", 0 ) /* 16MB for 64-bit ROM data */
2446 ROMX_LOAD( "fish_gr0.63-56", 0x000000, 0x100000, CRC(293a3308) SHA1(e4c88759c3b8f8a359db83817dbd0428350b4f7e), ROM_SKIP(7) ) // sldh
2447 ROMX_LOAD( "fish_gr0.55-48", 0x000001, 0x100000, CRC(18bb4bdf) SHA1(1f6c49b3b5946390fa7582b531f8d9af3baa2567), ROM_SKIP(7) ) // sldh
2448 ROMX_LOAD( "fish_gr0.47-40", 0x000002, 0x100000, CRC(1faedcc6) SHA1(1e4ecbe4553fb3ebfbd03bd7e16066ccb531d00b), ROM_SKIP(7) ) // sldh
2449 ROMX_LOAD( "fish_gr0.39-32", 0x000003, 0x100000, CRC(536bc349) SHA1(06d7ac38b2c8cdc85e2cb531bba9c836e50c8247), ROM_SKIP(7) ) // sldh
2450 ROMX_LOAD( "fish_gr0.31-24", 0x000004, 0x100000, CRC(813d4a31) SHA1(e024f9da2f15a482d8142870baf487297b995ed9), ROM_SKIP(7) ) // sldh
2451 ROMX_LOAD( "fish_gr0.23-16", 0x000005, 0x100000, CRC(f881514b) SHA1(a694f90621e2c1569a6a5ed8920838ba5506f72e), ROM_SKIP(7) ) // sldh
2452 ROMX_LOAD( "fish_gr0.15-08", 0x000006, 0x100000, CRC(d7634655) SHA1(d7ac83c0fa5d0ec57d096d4d704fe99ee8160e09), ROM_SKIP(7) ) // sldh
2453 ROMX_LOAD( "fish_gr0.07-00", 0x000007, 0x100000, CRC(3fca32a3) SHA1(22753a9678e04d9355238e013e58d9f45315579d), ROM_SKIP(7) ) // sldh
2454 ROMX_LOAD( "fish_gr1.63-56", 0x800000, 0x100000, CRC(a2b89d3a) SHA1(9cfcd0b88dea192ba39efcdccc78d1a0fd8f3388), ROM_SKIP(7) ) // sldh
2455 ROMX_LOAD( "fish_gr1.55-48", 0x800001, 0x100000, CRC(766822a8) SHA1(2c9b14542a5467c1a3451559ea296da09c2cfdb9), ROM_SKIP(7) ) // sldh
2456 ROMX_LOAD( "fish_gr1.47-40", 0x800002, 0x100000, CRC(112b519c) SHA1(f0e1ed1b8ad271fa9708f513b11d5cca6e550668), ROM_SKIP(7) ) // sldh
2457 ROMX_LOAD( "fish_gr1.39-32", 0x800003, 0x100000, CRC(435b5d37) SHA1(ecb6e7271d993f8e315b85e69166838e66dd41a8), ROM_SKIP(7) ) // sldh
2458 ROMX_LOAD( "fish_gr1.31-24", 0x800004, 0x100000, CRC(2637ae7f) SHA1(5e0bd0e08d8c1eaae725b4d55030c2698abd46e7), ROM_SKIP(7) ) // sldh
2459 ROMX_LOAD( "fish_gr1.23-16", 0x800005, 0x100000, CRC(e732f1bf) SHA1(a228aee0cc36a0089716f20bfa75d87750692adb), ROM_SKIP(7) ) // sldh
2460 ROMX_LOAD( "fish_gr1.15-08", 0x800006, 0x100000, CRC(7d4e2d9e) SHA1(4cb9b754b7585df4cae6bdd7085a57729d53e643), ROM_SKIP(7) ) // sldh
2461 ROMX_LOAD( "fish_gr1.07-00", 0x800007, 0x100000, CRC(8ea036af) SHA1(1f9baec6712e0ba0e8a744529e41799217760194), ROM_SKIP(7) ) // sldh
2462 ROM_END
2463
2464
2465 /*************************************
2466 *
2467 * Driver initialization
2468 *
2469 *************************************/
2470
2471 void jaguar_state::cojag_common_init(uint16_t gpu_jump_offs, uint16_t spin_pc)
2472 {
2473 m_is_cojag = true;
2474
2475 /* copy over the ROM */
2476 m_is_r3000 = (m_maincpu->type() == R3041);
2477
2478 /* install synchronization hooks for GPU */
2479 if (m_is_r3000)
2480 m_maincpu->space(AS_PROGRAM).install_write_handler(0x04f0b000 + gpu_jump_offs, 0x04f0b003 + gpu_jump_offs, write32s_delegate(*this, FUNC(jaguar_state::gpu_jump_w)));
2481 else
2482 m_maincpu->space(AS_PROGRAM).install_write_handler(0xf0b000 + gpu_jump_offs, 0xf0b003 + gpu_jump_offs, write32s_delegate(*this, FUNC(jaguar_state::gpu_jump_w)));
2483 m_gpu->space(AS_PROGRAM).install_read_handler(0xf03000 + gpu_jump_offs, 0xf03003 + gpu_jump_offs, read32smo_delegate(*this, FUNC(jaguar_state::gpu_jump_r)));
2484 m_gpu_jump_address = &m_gpu_ram[gpu_jump_offs/4];
2485 m_gpu_spin_pc = 0xf03000 + spin_pc;
2486 }
2487
2488
init_area51a()2489 void jaguar_state::init_area51a()
2490 {
2491 m_hacks_enabled = true;
2492 cojag_common_init(0x5c4, 0x5a0);
2493
2494 #if ENABLE_SPEEDUP_HACKS
2495 /* install speedup for main CPU */
2496 m_maincpu->space(AS_PROGRAM).install_write_handler(0xa02030, 0xa02033, write32s_delegate(*this, FUNC(jaguar_state::area51_main_speedup_w)));
2497 m_main_speedup = m_mainram + 0x2030/4;
2498 #endif
2499 }
2500
2501
init_area51()2502 void jaguar_state::init_area51()
2503 {
2504 m_hacks_enabled = true;
2505 cojag_common_init(0x0c0, 0x09e);
2506 #if ENABLE_SPEEDUP_HACKS
2507 /* install speedup for main CPU */
2508 m_main_speedup_max_cycles = 120;
2509 m_maincpu->space(AS_PROGRAM).install_read_handler(0x100062e8, 0x100062eb, read32smo_delegate(*this, FUNC(jaguar_state::cojagr3k_main_speedup_r)));
2510 m_main_speedup = m_mainram + 0x62e8/4;
2511 #endif
2512 }
2513
init_maxforce()2514 void jaguar_state::init_maxforce()
2515 {
2516 m_hacks_enabled = true;
2517 cojag_common_init(0x0c0, 0x09e);
2518
2519 /* patch the protection */
2520 memregion("maincpu")->as_u32(0x220/4) = 0x03e00008;
2521
2522 #if ENABLE_SPEEDUP_HACKS
2523 /* install speedup for main CPU */
2524 m_main_speedup_max_cycles = 120;
2525 m_maincpu->space(AS_PROGRAM).install_read_handler(0x1000865c, 0x1000865f, read32smo_delegate(*this, FUNC(jaguar_state::cojagr3k_main_speedup_r)));
2526 m_main_speedup = m_mainram + 0x865c/4;
2527 #endif
2528 }
2529
2530
init_area51mx()2531 void jaguar_state::init_area51mx()
2532 {
2533 m_hacks_enabled = true;
2534 cojag_common_init(0x0c0, 0x09e);
2535
2536 /* patch the protection */
2537 memregion("maincpu")->as_u32(0x418/4) = 0x4e754e75;
2538
2539 #if ENABLE_SPEEDUP_HACKS
2540 /* install speedup for main CPU */
2541 m_maincpu->space(AS_PROGRAM).install_write_handler(0xa19550, 0xa19557, write32s_delegate(*this, FUNC(jaguar_state::area51mx_main_speedup_w)));
2542 m_main_speedup = m_mainram + 0x19550/4;
2543 #endif
2544 }
2545
2546
init_a51mxr3k()2547 void jaguar_state::init_a51mxr3k()
2548 {
2549 m_hacks_enabled = true;
2550 cojag_common_init(0x0c0, 0x09e);
2551
2552 /* patch the protection */
2553 memregion("maincpu")->as_u32(0x220/4) = 0x03e00008;
2554
2555 #if ENABLE_SPEEDUP_HACKS
2556 /* install speedup for main CPU */
2557 m_main_speedup_max_cycles = 120;
2558 m_maincpu->space(AS_PROGRAM).install_read_handler(0x10006f0c, 0x10006f0f, read32smo_delegate(*this, FUNC(jaguar_state::cojagr3k_main_speedup_r)));
2559 m_main_speedup = m_mainram + 0x6f0c/4;
2560 #endif
2561 }
2562
2563
init_fishfren()2564 void jaguar_state::init_fishfren()
2565 {
2566 m_hacks_enabled = true;
2567 cojag_common_init(0x578, 0x554);
2568
2569 #if ENABLE_SPEEDUP_HACKS
2570 /* install speedup for main CPU */
2571 m_main_speedup_max_cycles = 200;
2572 m_maincpu->space(AS_PROGRAM).install_read_handler(0x10021b60, 0x10021b63, read32smo_delegate(*this, FUNC(jaguar_state::cojagr3k_main_speedup_r)));
2573 m_main_speedup = m_mainram + 0x21b60/4;
2574 #endif
2575 }
2576
2577
init_freeze_common(offs_t main_speedup_addr)2578 void jaguar_state::init_freeze_common(offs_t main_speedup_addr)
2579 {
2580 cojag_common_init(0x0bc, 0x09c);
2581
2582 #if ENABLE_SPEEDUP_HACKS
2583 /* install speedup for main CPU */
2584 m_main_speedup_max_cycles = 200;
2585 if (main_speedup_addr != 0) {
2586 m_maincpu->space(AS_PROGRAM).install_read_handler(main_speedup_addr, main_speedup_addr + 3, read32smo_delegate(*this, FUNC(jaguar_state::cojagr3k_main_speedup_r)));
2587 m_main_speedup = m_mainram + (main_speedup_addr - 0x10000000)/4;
2588 }
2589 m_maincpu->space(AS_PROGRAM).install_read_handler(0x0400d900, 0x0400d900 + 3, read32smo_delegate(*this, FUNC(jaguar_state::main_gpu_wait_r)));
2590 m_main_gpu_wait = m_shared_ram + 0xd900/4;
2591 #endif
2592 }
2593
init_freezeat()2594 void jaguar_state::init_freezeat() { m_hacks_enabled = true; init_freeze_common(0x1001a9f4); }
init_freezeat2()2595 void jaguar_state::init_freezeat2() { m_hacks_enabled = true; init_freeze_common(0x1001a8c4); }
init_freezeat3()2596 void jaguar_state::init_freezeat3() { m_hacks_enabled = true; init_freeze_common(0x1001a134); }
init_freezeat4()2597 void jaguar_state::init_freezeat4() { m_hacks_enabled = true; init_freeze_common(0x1001a134); }
init_freezeat5()2598 void jaguar_state::init_freezeat5() { m_hacks_enabled = true; init_freeze_common(0x10019b34); }
init_freezeat6()2599 void jaguar_state::init_freezeat6() { m_hacks_enabled = true; init_freeze_common(0x10019684); }
2600
init_vcircle()2601 void jaguar_state::init_vcircle()
2602 {
2603 m_hacks_enabled = true;
2604 cojag_common_init(0x5c0, 0x5a0);
2605
2606 #if ENABLE_SPEEDUP_HACKS
2607 /* install speedup for main CPU */
2608 m_main_speedup_max_cycles = 50;
2609 m_maincpu->space(AS_PROGRAM).install_read_handler(0x12005b34, 0x12005b37, read32smo_delegate(*this, FUNC(jaguar_state::cojagr3k_main_speedup_r)));
2610 m_main_speedup = m_mainram + 0x5b34/4;
2611 m_main_speedup = m_mainram2 + 0x5b34/4;
2612 #endif
2613 }
2614
2615
2616
2617 /*************************************
2618 *
2619 * Game driver(s)
2620 *
2621 *************************************/
2622
2623 /* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME */
2624 CONS( 1993, jaguar, 0, 0, jaguar, jaguar, jaguar_state, init_jaguar, "Atari", "Jaguar (NTSC)", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
2625 CONS( 1995, jaguarcd, jaguar, 0, jaguarcd, jaguar, jaguarcd_state, init_jaguarcd, "Atari", "Jaguar CD (NTSC)", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
2626
2627 /* YEAR NAME PARENT MACHINE INPUT CLASS INIT ROT COMPANY FULLNAME */
2628 GAME( 1996, area51, 0, cojagr3k, area51, jaguar_state, init_area51, ROT0, "Atari Games", "Area 51 (R3000)", 0 )
2629 GAME( 1995, area51t, area51, cojag68k, area51, jaguar_state, init_area51a, ROT0, "Atari Games (Time Warner license)", "Area 51 (Time Warner license, Oct 17, 1996)", 0 )
2630 GAME( 1995, area51ta, area51, cojag68k, area51, jaguar_state, init_area51a, ROT0, "Atari Games (Time Warner license)", "Area 51 (Time Warner license, Nov 27, 1995)", 0 )
2631 GAME( 1995, area51a, area51, cojag68k, area51, jaguar_state, init_area51a, ROT0, "Atari Games", "Area 51 (Atari Games license, Oct 25, 1995)", 0 )
2632 GAME( 1995, fishfren, 0, cojagr3k_rom, fishfren, jaguar_state, init_fishfren, ROT0, "Time Warner Interactive", "Fishin' Frenzy (prototype)", 0 )
2633 GAME( 1996, freezeat, 0, cojagr3k_rom, freezeat, jaguar_state, init_freezeat, ROT0, "Atari Games", "Freeze (Atari) (prototype, English voice, 96/10/25)", 0 )
2634 GAME( 1996, freezeatjp, freezeat, cojagr3k_rom, freezeat, jaguar_state, init_freezeat, ROT0, "Atari Games", "Freeze (Atari) (prototype, Japanese voice, 96/10/25)", 0 )
2635 GAME( 1996, freezeat2, freezeat, cojagr3k_rom, freezeat, jaguar_state, init_freezeat2, ROT0, "Atari Games", "Freeze (Atari) (prototype, 96/10/18)", 0 )
2636 GAME( 1996, freezeat3, freezeat, cojagr3k_rom, freezeat, jaguar_state, init_freezeat3, ROT0, "Atari Games", "Freeze (Atari) (prototype, 96/10/07)", 0 )
2637 GAME( 1996, freezeat4, freezeat, cojagr3k_rom, freezeat, jaguar_state, init_freezeat4, ROT0, "Atari Games", "Freeze (Atari) (prototype, 96/10/03)", 0 )
2638 GAME( 1996, freezeat5, freezeat, cojagr3k_rom, freezeat, jaguar_state, init_freezeat5, ROT0, "Atari Games", "Freeze (Atari) (prototype, 96/09/20, AMOA-96)", 0 )
2639 GAME( 1996, freezeat6, freezeat, cojagr3k_rom, freezeat, jaguar_state, init_freezeat6, ROT0, "Atari Games", "Freeze (Atari) (prototype, 96/09/07, Jamma-96)", 0 )
2640 GAME( 1996, maxforce, 0, cojagr3k, area51, jaguar_state, init_maxforce, ROT0, "Atari Games", "Maximum Force v1.05", 0 )
2641 GAME( 1996, maxf_102, maxforce, cojagr3k, area51, jaguar_state, init_maxforce, ROT0, "Atari Games", "Maximum Force v1.02", 0 )
2642 GAME( 1996, maxf_ng, maxforce, cojagr3k, area51, jaguar_state, init_maxforce, ROT0, "Atari Games", "Maximum Force (No Gore version)", 0 )
2643 GAME( 1998, area51mx, 0, cojag68k, area51, jaguar_state, init_area51mx, ROT0, "Atari Games", "Area 51 / Maximum Force Duo v2.0", 0 )
2644 GAME( 1998, a51mxr3k, area51mx, cojagr3k, area51, jaguar_state, init_a51mxr3k, ROT0, "Atari Games", "Area 51 / Maximum Force Duo (R3000, 2/10/98)", 0 )
2645 GAME( 1998, a51mxr3ka, area51mx, cojagr3k, area51, jaguar_state, init_a51mxr3k, ROT0, "Atari Games", "Area 51 / Maximum Force Duo (R3000, 2/02/98)", 0 )
2646 GAME( 1996, vcircle, 0, cojagr3k, vcircle, jaguar_state, init_vcircle, ROT0, "Atari Games", "Vicious Circle (prototype)", 0 )
2647