1 // license:BSD-3-Clause
2 // copyright-holders:Robbbert
3 /***********************************************************************************************
4
5 Onyx C8002
6
7 2013-08-18 Skeleton Driver
8
9 The C8002 is one of the earliest minicomputers to use Unix as an operating system.
10
11 The system consists of a main CPU (Z8002), and a slave CPU for Mass Storage control (Z80)
12
13 The Z80 board contains a 19.6608 and 16 MHz crystals; 2x Z80CTC; 3x Z80SIO/0; Z80DMA; 3x Z80PIO;
14 2 eproms marked 459-3 and 460-3, plus 2 proms.
15
16 The Z8002 board contains a 16 MHz crystal; 3x Z80CTC; 5x Z80SIO/0; 3x Z80PIO; 2 eproms marked
17 466-E and 467E, plus the remaining 7 small proms.
18
19 The system can handle 8 RS232 terminals, 7 hard drives, a tape cartridge drive, parallel i/o,
20 and be connected to a RS422 network.
21
22 Status:
23 - Main screen prints an error with CTC (because there's no clock into it atm)
24 - Subcpu screen (after a while) prints various statuses then waits for the fdc to respond
25
26 To Do:
27 - Hook up daisy chains (see p8k.cpp for how to hook up a 16-bit chain)
28 (keyboard input depends on interrupts)
29 - Remaining devices
30 - Whatever hooks up to the devices
31 - Eventually we'll need software
32 - Manuals / schematics would be nice
33
34 *************************************************************************************************/
35
36 #include "emu.h"
37 #include "cpu/z80/z80.h"
38 #include "cpu/z8000/z8000.h"
39 #include "machine/clock.h"
40 #include "bus/rs232/rs232.h"
41 //#include "machine/z80daisy.h"
42 #include "machine/z80ctc.h"
43 #include "machine/z80pio.h"
44 #include "machine/z80sio.h"
45 //#include "machine/z80dma.h"
46
47 class onyx_state : public driver_device
48 {
49 public:
onyx_state(const machine_config & mconfig,device_type type,const char * tag)50 onyx_state(const machine_config &mconfig, device_type type, const char *tag)
51 : driver_device(mconfig, type, tag)
52 , m_maincpu(*this, "maincpu")
53 , m_sio(*this, "sio%u", 1U)
54 , m_ctc(*this, "ctc%u", 1U)
55 , m_pio(*this, "pio%u", 1U)
56 { }
57
58 void c8002(machine_config &config);
59 void c5000(machine_config &config);
60 void c5000_io(address_map &map);
61
62 private:
63 void c5000_mem(address_map &map);
64 void c8002_io(address_map &map);
65 void c8002_mem(address_map &map);
66 void subio(address_map &map);
67 void submem(address_map &map);
68 void z8002_m1_w(uint8_t data);
69
70 required_device<cpu_device> m_maincpu; // z8002 or z80 depending on driver
71 optional_device_array<z80sio_device, 5> m_sio;
72 optional_device_array<z80ctc_device, 3> m_ctc;
73 optional_device_array<z80pio_device, 2> m_pio;
74 };
75
76
77 /* Input ports */
INPUT_PORTS_START(c8002)78 static INPUT_PORTS_START( c8002 )
79 INPUT_PORTS_END
80
81
82 void onyx_state::c8002_mem(address_map &map)
83 {
84 map(0x00000, 0x00fff).rom().share("share0");
85 map(0x01000, 0x07fff).ram().share("share1");
86 map(0x08000, 0x0ffff).ram().share("share2"); // Z8002 has 64k memory
87 }
88
z8002_m1_w(uint8_t data)89 void onyx_state::z8002_m1_w(uint8_t data)
90 {
91 // ED 4D (Z80 RETI opcode) is written here
92 for (auto &sio : m_sio)
93 sio->z80daisy_decode(data);
94 for (auto &ctc : m_ctc)
95 ctc->z80daisy_decode(data);
96 for (auto &pio : m_pio)
97 pio->z80daisy_decode(data);
98 }
99
c8002_io(address_map & map)100 void onyx_state::c8002_io(address_map &map)
101 {
102 map(0xff00, 0xff07).rw(m_sio[0], FUNC(z80sio_device::cd_ba_r), FUNC(z80sio_device::cd_ba_w)).umask16(0x00ff);
103 map(0xff08, 0xff0f).rw(m_sio[1], FUNC(z80sio_device::cd_ba_r), FUNC(z80sio_device::cd_ba_w)).umask16(0x00ff);
104 map(0xff10, 0xff17).rw(m_sio[2], FUNC(z80sio_device::cd_ba_r), FUNC(z80sio_device::cd_ba_w)).umask16(0x00ff);
105 map(0xff18, 0xff1f).rw(m_sio[3], FUNC(z80sio_device::cd_ba_r), FUNC(z80sio_device::cd_ba_w)).umask16(0x00ff);
106 map(0xff20, 0xff27).rw(m_sio[4], FUNC(z80sio_device::cd_ba_r), FUNC(z80sio_device::cd_ba_w)).umask16(0x00ff);
107 map(0xff30, 0xff37).rw(m_ctc[0], FUNC(z80ctc_device::read), FUNC(z80ctc_device::write)).umask16(0x00ff);
108 map(0xff38, 0xff3f).rw(m_ctc[1], FUNC(z80ctc_device::read), FUNC(z80ctc_device::write)).umask16(0x00ff);
109 map(0xff40, 0xff47).rw(m_ctc[2], FUNC(z80ctc_device::read), FUNC(z80ctc_device::write)).umask16(0x00ff);
110 map(0xff50, 0xff57).rw(m_pio[0], FUNC(z80pio_device::read), FUNC(z80pio_device::write)).umask16(0x00ff);
111 map(0xff58, 0xff5f).rw(m_pio[1], FUNC(z80pio_device::read), FUNC(z80pio_device::write)).umask16(0x00ff);
112 map(0xffb9, 0xffb9).w(FUNC(onyx_state::z8002_m1_w));
113 }
114
submem(address_map & map)115 void onyx_state::submem(address_map &map)
116 {
117 map(0x0000, 0x0fff).rom();
118 map(0x1000, 0xffff).ram();
119 }
120
subio(address_map & map)121 void onyx_state::subio(address_map &map)
122 {
123 map.global_mask(0xff);
124 map(0x00, 0x03).rw("pio1s", FUNC(z80pio_device::read), FUNC(z80pio_device::write));
125 map(0x04, 0x04).nopr(); // disk status?
126 map(0x0c, 0x0f).rw("sio1s", FUNC(z80sio_device::cd_ba_r), FUNC(z80sio_device::cd_ba_w));
127 }
128
129 /***************************************************************************
130
131 Machine Drivers
132
133 ****************************************************************************/
134
c8002(machine_config & config)135 void onyx_state::c8002(machine_config &config)
136 {
137 /* basic machine hardware */
138 z8002_device& maincpu(Z8002(config, m_maincpu, XTAL(4'000'000)));
139 //maincpu.set_daisy_config(main_daisy_chain);
140 maincpu.set_addrmap(AS_PROGRAM, &onyx_state::c8002_mem);
141 //maincpu.set_addrmap(AS_DATA, &onyx_state::c8002_data);
142 maincpu.set_addrmap(AS_IO, &onyx_state::c8002_io);
143
144 z80_device& subcpu(Z80(config, "subcpu", XTAL(4'000'000)));
145 //subcpu.set_daisy_config(sub_daisy_chain);
146 subcpu.set_addrmap(AS_PROGRAM, &onyx_state::submem);
147 subcpu.set_addrmap(AS_IO, &onyx_state::subio);
148
149 clock_device &sio1_clock(CLOCK(config, "sio1_clock", 307200));
150 sio1_clock.signal_handler().set(m_sio[0], FUNC(z80sio_device::rxca_w));
151 sio1_clock.signal_handler().append(m_sio[0], FUNC(z80sio_device::txca_w));
152
153 /* peripheral hardware */
154 Z80PIO(config, m_pio[0], XTAL(16'000'000)/4);
155 //m_pio[0]->out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
156 Z80PIO(config, m_pio[1], XTAL(16'000'000)/4);
157 //m_pio[1]->out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
158 Z80CTC(config, m_ctc[0], XTAL(16'000'000) /4);
159 Z80CTC(config, m_ctc[1], XTAL(16'000'000) /4);
160 Z80CTC(config, m_ctc[2], XTAL(16'000'000) /4);
161 Z80SIO(config, m_sio[0], XTAL(16'000'000) /4);
162 m_sio[0]->out_txda_callback().set("rs232", FUNC(rs232_port_device::write_txd));
163 m_sio[0]->out_dtra_callback().set("rs232", FUNC(rs232_port_device::write_dtr));
164 m_sio[0]->out_rtsa_callback().set("rs232", FUNC(rs232_port_device::write_rts));
165 Z80SIO(config, m_sio[1], XTAL(16'000'000) /4);
166 Z80SIO(config, m_sio[2], XTAL(16'000'000) /4);
167 Z80SIO(config, m_sio[3], XTAL(16'000'000) /4);
168 Z80SIO(config, m_sio[4], XTAL(16'000'000) /4);
169
170 rs232_port_device &rs232(RS232_PORT(config, "rs232", default_rs232_devices, "terminal"));
171 rs232.rxd_handler().set(m_sio[0], FUNC(z80sio_device::rxa_w));
172 rs232.dcd_handler().set(m_sio[0], FUNC(z80sio_device::dcda_w));
173 rs232.cts_handler().set(m_sio[0], FUNC(z80sio_device::ctsa_w));
174
175 Z80PIO(config, "pio1s", XTAL(16'000'000)/4);
176 //z80pio_device& pio1s(Z80PIO(config, "pio1s", XTAL(16'000'000)/4));
177 //pio1s->out_int_callback().set_inputline("subcpu", INPUT_LINE_IRQ0);
178
179 clock_device &sio1s_clock(CLOCK(config, "sio1s_clock", 614400));
180 sio1s_clock.signal_handler().set("sio1s", FUNC(z80sio_device::rxtxcb_w));
181 //sio1s_clock.signal_handler().append("sio1s", FUNC(z80sio_device::txca_w));
182
183 z80sio_device& sio1s(Z80SIO(config, "sio1s", XTAL(16'000'000) /4));
184 sio1s.out_txdb_callback().set("rs232s", FUNC(rs232_port_device::write_txd));
185 sio1s.out_dtrb_callback().set("rs232s", FUNC(rs232_port_device::write_dtr));
186 sio1s.out_rtsb_callback().set("rs232s", FUNC(rs232_port_device::write_rts));
187
188 rs232_port_device &rs232s(RS232_PORT(config, "rs232s", default_rs232_devices, "terminal"));
189 rs232s.rxd_handler().set("sio1s", FUNC(z80sio_device::rxb_w));
190 rs232s.dcd_handler().set("sio1s", FUNC(z80sio_device::dcdb_w));
191 rs232s.cts_handler().set("sio1s", FUNC(z80sio_device::ctsb_w));
192 }
193
194 /* ROM definition */
195 ROM_START( c8002 )
196 ROM_REGION16_BE( 0x100000, "maincpu", 0 )
197 ROM_LOAD16_BYTE("466-e", 0x0001, 0x0800, CRC(13534bcb) SHA1(976c76c69af40b0c0a5038e428a10b39a619a036))
198 ROM_LOAD16_BYTE("467-e", 0x0000, 0x0800, CRC(0d5b557f) SHA1(0802bc6c2774f4e7de38a9c92e8558d710eed287))
199
200 ROM_REGION( 0x10000, "subcpu", 0 )
CRC(c8906653)201 ROM_LOAD("459-3", 0x0000, 0x0800, CRC(c8906653) SHA1(7dea9fffa974479ef5926df567261f2aaa7a3283))
202 ROM_LOAD("460-3", 0x0800, 0x0800, CRC(ce6c0214) SHA1(f69ee4c6c0d1e72574a9cf828dbb3e08f06d029a))
203
204 ROM_REGION( 0x900, "proms", 0 )
205 // for main cpu
206 ROM_LOAD("468-a", 0x000, 0x100, CRC(89781491) SHA1(f874d0cf42a733eb2b92b15647aeac7178d7b9b1))
207 ROM_LOAD("469-a", 0x100, 0x100, CRC(45e439de) SHA1(4f1af44332ae709d92e919c9e48433f29df5e632))
208 ROM_LOAD("470a-3", 0x200, 0x100, CRC(c50622a9) SHA1(deda0df93fc4e4b5f4be313e4bfe0c5fc669a024))
209 ROM_LOAD("471-a", 0x300, 0x100, CRC(c09ca06b) SHA1(cb99172f5342427c68a109ee108a0c49b44e7010))
210 ROM_LOAD("472-a", 0x400, 0x100, CRC(e1316fed) SHA1(41ed2d822c74da4e1ce06eb229629576e7f5035f))
211 ROM_LOAD("473-a", 0x500, 0x100, CRC(5e8efd7f) SHA1(647064e0c3b0d795a333febc57228472b1b32345))
212 ROM_LOAD("474-a", 0x600, 0x100, CRC(0052edfd) SHA1(b5d18c9a6adce7a6d627ece40a60aab8c55a6597))
213 // for sub cpu
214 ROM_LOAD("453-a", 0x700, 0x100, CRC(7bc3871e) SHA1(6f75eb04911fa1ff66714276b8a88be62438a1b0))
215 ROM_LOAD("454-a", 0x800, 0x100, CRC(aa2233cd) SHA1(4ec3a8c06cccda02f080e89831ecd8a9c96d3650))
216 ROM_END
217
218 /* Driver */
219
220 // YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
221 COMP( 1982, c8002, 0, 0, c8002, c8002, onyx_state, empty_init, "Onyx Systems", "C8002", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW )
222
223
224
225 /********************************************************************************************************************************
226
227 Onyx Systems C5000.
228 (says C8000 on the backplate)
229
230 Chips: 256k dynamic RAM, Z80A, Z80DMA, 5x Z80PIO, 2x Z80SIO/0, 2x Z80CTC, 5? undumped proms, 3 red leds, 1x 4-sw DIP
231 Crystals: 16.000000, 19.660800
232 Labels of proms: 339, 153, XMN4, 2_1, 1_2
233
234 *********************************************************************************************************************************/
235
236 void onyx_state::c5000_mem(address_map &map)
237 {
238 map(0x0000, 0x1fff).rom();
239 map(0x2000, 0xffff).ram();
240 }
241
c5000_io(address_map & map)242 void onyx_state::c5000_io(address_map &map)
243 {
244 map.global_mask(0xff);
245 map(0x10, 0x13).rw(m_sio[0], FUNC(z80sio_device::cd_ba_r), FUNC(z80sio_device::cd_ba_w));
246 }
247
c5000(machine_config & config)248 void onyx_state::c5000(machine_config &config)
249 {
250 /* basic machine hardware */
251 z80_device& maincpu(Z80(config, m_maincpu, XTAL(16'000'000) / 4));
252 //maincpu.set_daisy_config(sub_daisy_chain);
253 maincpu.set_addrmap(AS_PROGRAM, &onyx_state::c5000_mem);
254 maincpu.set_addrmap(AS_IO, &onyx_state::c5000_io);
255
256 clock_device &sio1_clock(CLOCK(config, "sio1_clock", 614400));
257 sio1_clock.signal_handler().set(m_sio[0], FUNC(z80sio_device::rxtxcb_w));
258 //sio1_clock.signal_handler().append(m_sio[0], FUNC(z80sio_device::txca_w));
259
260 /* peripheral hardware */
261 //Z80PIO(config, m_pio[0], XTAL(16'000'000)/4);
262 //m_pio[0]->out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
263 //Z80PIO(config, m_pio[1], XTAL(16'000'000)/4);
264 //m_pio[1]->out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
265 //Z80CTC(config, m_ctc[0], XTAL(16'000'000) /4);
266 //Z80CTC(config, m_ctc[1], XTAL(16'000'000) /4);
267 //Z80CTC(config, m_ctc[2], XTAL(16'000'000) /4);
268
269 Z80SIO(config, m_sio[0], XTAL(16'000'000) /4);
270 m_sio[0]->out_txdb_callback().set("rs232", FUNC(rs232_port_device::write_txd));
271 m_sio[0]->out_dtrb_callback().set("rs232", FUNC(rs232_port_device::write_dtr));
272 m_sio[0]->out_rtsb_callback().set("rs232", FUNC(rs232_port_device::write_rts));
273
274 rs232_port_device &rs232(RS232_PORT(config, "rs232", default_rs232_devices, "terminal"));
275 rs232.rxd_handler().set(m_sio[0], FUNC(z80sio_device::rxb_w));
276 rs232.dcd_handler().set(m_sio[0], FUNC(z80sio_device::dcdb_w));
277 rs232.cts_handler().set(m_sio[0], FUNC(z80sio_device::ctsb_w));
278
279 //Z80SIO(config, m_sio[1], XTAL(16'000'000) /4);
280 }
281
282
283 ROM_START( c5000 )
284 ROM_REGION( 0x10000, "maincpu", 0 )
285 ROM_LOAD( "860-3.prom1", 0x0000, 0x1000, CRC(31b52df3) SHA1(e221c7829b4805805cde1bde763bd5a936e7db1a) )
286 ROM_LOAD( "861-3.prom2", 0x1000, 0x1000, CRC(d1eba182) SHA1(850035497975b821fc1e51fbb73642cba3ff9784) )
287 ROM_END
288
289 /* Driver */
290
291 // YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
292 COMP( 1981, c5000, 0, 0, c5000, c8002, onyx_state, empty_init, "Onyx Systems", "C5000", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW )
293