1 // license:BSD-3-Clause
2 // copyright-holders:Sergey Svishchev
3 
4 /***************************************************************************
5 
6   Netlist (tp1985) included from testpat.cpp
7 
8 ***************************************************************************/
9 
10 #define NL_PROHIBIT_BASEH_INCLUDE   1
11 #include "netlist/devices/net_lib.h"
12 
13 // gray scale
14 #define SB3 0
15 // vertical stripes
16 #define SB4 1
17 // vertical lines
18 #define SB5 0
19 // horizontal stripes
20 #define SB6 0
21 // horizontal lines
22 #define SB7 0
23 // "M"
24 #define SB8 1
25 // inverse
26 //efine SB9 0
27 
28 //
29 #define _R19 0
30 //
31 #define _VD4 0
32 //
33 #define _DD4 1
34 
35 NETLIST_START(tp1985)
36 
37 	SOLVER(Solver, 48000)
38 //  PARAM(Solver.PARALLEL, 0) // Don't do parallel solvers
39 	PARAM(Solver.ACCURACY, 1e-5) // ???
40 //  PARAM(Solver.LTE,     1e-4) // Default is not enough for paddle control if using LTE
41 	PARAM(NETLIST.USE_DEACTIVATE, 0)
42 
43 	ANALOG_INPUT(V5, 5)
44 	ALIAS(VCC, V5) // no-ttl-dip devices need VCC!
45 
46 	TTL_INPUT(high, 1)
47 	TTL_INPUT(low, 0)
48 	NET_C(VCC, high.VCC, low.VCC)
49 	NET_C(GND, high.GND, low.GND)
50 
51 	MAINCLOCK(clk, 4000000.0)
52 
53 // raster generator: DD1-DD4, DD5.3, DD5.4, DD6-DD7
54 
55 	RES(R1, 1000)
56 	NET_C(R1.1, V5)
57 
58 	// A, B, C, D,  CLEAR, LOADQ, CU, CD  [15, 1, 10, 9,  14, 11, 5, 4]
59 	TTL_74193(DD1, low, low, low, low,   GND, R1.2, DD2.CARRYQ, R1.2)
60 	TTL_74193(DD2, low, low, low, low,   GND, R1.2, clk, R1.2)
61 
62 	ALIAS(F250K, DD2.CARRYQ)
63 	ALIAS(F15625, DD1.CARRYQ)
64 
65 	RES(R2, 2000)
66 	RES(R3, 1000)
67 	RES(R4, 510)
68 	RES(R5, 240)
69 	RES(R6, 510)
70 	RES(R7, 510)
71 	RES(R8, 240)
72 	DIODE(VD1, "1N34A") // XXX actually D9B
73 	DIODE(VD2, "1N34A") // XXX actually D9B
74 #if SB3
75 	DIODE(VD6, "1N34A") // XXX actually D9B
76 #endif
77 
78 	NET_C(DD1.QA, R2.1, R6.1)
79 	NET_C(DD1.QB, R3.1, VD1.A)
80 	NET_C(DD1.QC, R4.1)
81 	NET_C(DD1.QD, R5.1)
82 
83 	NET_C(DD2.QC, R7.1)
84 	NET_C(DD2.QD, R8.1)
85 	NET_C(R6.2, DD3_2.D)
86 
87 	// and to SB1.1, SB4.2, SB3...
88 #if SB3
89 #if SB4
90 	NET_C(R2.2, R3.2, R4.2, R5.2)
91 	NET_C(GND, VD6.A)
92 #else
93 	NET_C(R2.2, R3.2, R4.2, R5.2, VD6.A)
94 #endif
95 #else
96 	NET_C(R2.2, R3.2, R4.2, R5.2)
97 #endif
98 
99 	// and to SB6.2
100 	NET_C(R7.2, R8.2, VD2.A)
101 
102 	// CLK, D, CLRQ, PREQ  [3, 2, 1, 4]
103 	TTL_7474(DD3_1, DD1.QA, DD1.QB, DD1.CARRYQ, DD3_1.QQ)
104 //  TTL_7474(DD3_2, VD1.K, DD2.QD, high, DD3_1.QQ) // per book, produces one pulse, shifted too far.
105 #if _DD4
106 	TTL_7474(DD3_2, DD2.QD, VD1.K, DD4.Y, DD3_1.QQ) // per journal, produces two pulse, shifted correctly.
107 #else
108 	TTL_7474(DD3_2, DD2.QD, VD1.K, high, DD3_1.QQ) // per journal, produces two pulse, shifted correctly.
109 #endif
110 	/*
111 	 * verified:
112 	 *
113 	 * DD3.1 = hblank generator, 12 us @ 75%
114 	 * DD3.2 = hsync generator, 4 us @ 100%, shifted 2 us after hblank
115 	 * hsync period = 64us (15625 Hz)
116 	 */
117 
118 #if _DD4
119 	RES(R12, 2000)
120 	RES(R13, 2000)
121 	CAP(C2, CAP_P(1000))
122 
123 	NET_C(V5, R13.1)
124 	NET_C(GND, R12.1)
125 	NET_C(C2.2, R13.2)
126 	NET_C(R13.2, R12.2)
127 	NET_C(DD6.QD, C2.1)
128 
129 	// CLK, STROBE, ENABLE, UNITY, CLR,  Bx
130 	//
131 	// STRB, ENin are tied to GND
132 	TTL_7497(DD4, DD3_1.QQ, low, low, DD5_3.Q, DD5_4.Q,  low, DD4.Y, low, DD5_3.Q, low, low)
133 //  TTL_7497(DD4, DD3_1.QQ, low, low, low, DD5_4.Q,  low, DD4.Y, low, DD5_3.Q, low, low)
134 //  TTL_7497(DD4, DD3_1.QQ, low, low, low, DD5_4.Q,  low, DD4.Y, low, low, low, low)
135 	TTL_7400_NAND(DD5_3, R13.2, DD4.Y)
136 //  TTL_7400_NAND(DD5_3, high, DD4.Y)
137 	TTL_7400_NAND(DD5_4, DD4.ENOUTQ, DD4.ENOUTQ)
138 	TTL_7493(DD6, DD4.ZQ, DD4.ENOUTQ, DD6.QD, DD6.QB) // CLK1, CLK2, R1, R2  [14, 1, 2, 3]
139 #else
140 	TTL_7497(DD4, DD3_1.QQ, low, low, low, low,  low, high, low, low, low, low)
141 //  TTL_7493(DDx, DD3_1.QQ, DD3_1.QQ, low, low)
142 	TTL_7493(DDx, DD3_1.QQ, DD3_1.QQ, DDx.QD, DDx.QB)
143 #endif
144 
145 // pattern selector
146 
147 	RES(R10, 1000)
148 	RES(R11, 240)
149 	RES(R14, 510)
150 	RES(R15, 1000)
151 	RES(R16, 510)
152 	DIODE(VD3, "1N34A") // XXX actually D9B
153 #if _VD4
154 	DIODE(VD4, "1N34A") // XXX actually D9B
155 #endif
156 	DIODE(VD5, "1N34A") // XXX actually D9B
157 
158 #if SB4
159 	ALIAS(hpatsource, DD1.QA)
160 #endif
161 #if SB5
162 	ALIAS(hpatsource, DD2.CARRYQ)
163 #endif
164 #if !(SB4+SB5)
165 	ALIAS(hpatsource, R11.2)
166 #endif
167 
168 #if SB6
169 	ALIAS(vpatsource, DD6.QA)
170 #endif
171 #if SB7
172 	ALIAS(vpatsource, DD4.Z)
173 #endif
174 #if !(SB6+SB7)
175 	ALIAS(vpatsource, R11.2)
176 #endif
177 
178 	NET_C(V5, R10.1)
179 	NET_C(V5, R11.1)
180 	NET_C(V5, R15.1)
181 	NET_C(R11.2, VD3.A)
182 	NET_C(hpatsource, R14.1)
183 	NET_C(R14.2, DD7_2.A)
184 
185 	TTL_7400_NAND(DD7_1, hpatsource, vpatsource)
186 #if !SB8
187 	TTL_7400_NAND(DD7_2, VD3.K, R15.2)
188 	NET_C(VD2.K, DD7_2.B)
189 #else
190 	TTL_7400_NAND(DD7_2, VD3.K, DD7_1.Q)
191 	NET_C(R15.2, GND)
192 	NET_C(VD2.K, GND)
193 #endif
194 
195 #if _VD4
196 	NET_C(DD7_2.Q, VD4.K)
197 	NET_C(VD4.A, R16.2)
198 #else
199 	NET_C(DD7_2.Q, R16.2)
200 #endif
201 	NET_C(DD3_1.Q, R16.1)
202 
203 	TTL_7400_NAND(DD7_3, DD7_2.Q, R10.2)
204 	TTL_7400_NAND(DD7_4, R16.1, DD7_3.Q)
205 
206 	NET_C(DD7_4.Q, VD5.A)
207 	NET_C(VD5.K, R17.1)
208 #if SB3
209 	NET_C(VD6.K, R17.1)
210 #endif
211 
212 // video mixer
213 
214 #ifdef VD7
215 	DIODE(VD7, "1N34A") // XXX actually D9B
216 #endif
217 	RES(R17, 10) // XXX actually 470 ohm POT
218 	RES(R18, 430)
219 #if _R19
220 	RES(R19, 430)
221 	CAP(C3, CAP_U(50))
222 #endif
223 
224 #ifdef VD7
225 	NET_C(DD3_2.QQ, VD7.A)
226 	NET_C(VD7.K, R18.1)
227 #else
228 	NET_C(DD3_2.QQ, R18.1)
229 #endif
230 	NET_C(R17.2, R18.2) // XXX
231 
232 #if _R19
233 	NET_C(GND, R19.1)
234 	NET_C(R18.2, C3.2)
235 	NET_C(R19.2, C3.2)
236 	ALIAS(videomix, C3.1)
237 #else
238 	ALIAS(videomix, R18.2)
239 	//LOG(logV, R18.2)
240 #endif
241 
242 #if 0
243 	HINT(clk, NO_DEACTIVATE)
244 #endif
245 
246 NETLIST_END()
247 
248