opBT_w_r_a16(uint32_t fetchdat)1 static int opBT_w_r_a16(uint32_t fetchdat)
2 {
3 uint16_t temp;
4
5 fetch_ea_16(fetchdat);
6 cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].w / 16) * 2); eal_r = 0;
7 temp = geteaw(); if (cpu_state.abrt) return 1;
8 flags_rebuild();
9 if (temp & (1 << (cpu_state.regs[cpu_reg].w & 15))) flags |= C_FLAG;
10 else flags &= ~C_FLAG;
11
12 CLOCK_CYCLES(3);
13 PREFETCH_RUN(3, 2, rmdat, 1,0,0,0, 0);
14 return 0;
15 }
opBT_w_r_a32(uint32_t fetchdat)16 static int opBT_w_r_a32(uint32_t fetchdat)
17 {
18 uint16_t temp;
19
20 fetch_ea_32(fetchdat);
21 cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].w / 16) * 2); eal_r = 0;
22 temp = geteaw(); if (cpu_state.abrt) return 1;
23 flags_rebuild();
24 if (temp & (1 << (cpu_state.regs[cpu_reg].w & 15))) flags |= C_FLAG;
25 else flags &= ~C_FLAG;
26
27 CLOCK_CYCLES(3);
28 PREFETCH_RUN(3, 2, rmdat, 1,0,0,0, 1);
29 return 0;
30 }
opBT_l_r_a16(uint32_t fetchdat)31 static int opBT_l_r_a16(uint32_t fetchdat)
32 {
33 uint32_t temp;
34
35 fetch_ea_16(fetchdat);
36 cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].l / 32) * 4); eal_r = 0;
37 temp = geteal(); if (cpu_state.abrt) return 1;
38 flags_rebuild();
39 if (temp & (1 << (cpu_state.regs[cpu_reg].l & 31))) flags |= C_FLAG;
40 else flags &= ~C_FLAG;
41
42 CLOCK_CYCLES(3);
43 PREFETCH_RUN(3, 2, rmdat, 0,1,0,0, 0);
44 return 0;
45 }
opBT_l_r_a32(uint32_t fetchdat)46 static int opBT_l_r_a32(uint32_t fetchdat)
47 {
48 uint32_t temp;
49
50 fetch_ea_32(fetchdat);
51 cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].l / 32) * 4); eal_r = 0;
52 temp = geteal(); if (cpu_state.abrt) return 1;
53 flags_rebuild();
54 if (temp & (1 << (cpu_state.regs[cpu_reg].l & 31))) flags |= C_FLAG;
55 else flags &= ~C_FLAG;
56
57 CLOCK_CYCLES(3);
58 PREFETCH_RUN(3, 2, rmdat, 0,1,0,0, 1);
59 return 0;
60 }
61
62 #define opBT(name, operation) \
63 static int opBT ## name ## _w_r_a16(uint32_t fetchdat) \
64 { \
65 int tempc; \
66 uint16_t temp; \
67 \
68 fetch_ea_16(fetchdat); \
69 cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].w / 16) * 2); eal_r = eal_w = 0; \
70 temp = geteaw(); if (cpu_state.abrt) return 1; \
71 tempc = (temp & (1 << (cpu_state.regs[cpu_reg].w & 15))) ? 1 : 0; \
72 temp operation (1 << (cpu_state.regs[cpu_reg].w & 15)); \
73 seteaw(temp); if (cpu_state.abrt) return 1; \
74 flags_rebuild(); \
75 if (tempc) flags |= C_FLAG; \
76 else flags &= ~C_FLAG; \
77 \
78 CLOCK_CYCLES(6); \
79 PREFETCH_RUN(6, 2, rmdat, 1,0,1,0, 0); \
80 return 0; \
81 } \
82 static int opBT ## name ## _w_r_a32(uint32_t fetchdat) \
83 { \
84 int tempc; \
85 uint16_t temp; \
86 \
87 fetch_ea_32(fetchdat); \
88 cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].w / 16) * 2); eal_r = eal_w = 0; \
89 temp = geteaw(); if (cpu_state.abrt) return 1; \
90 tempc = (temp & (1 << (cpu_state.regs[cpu_reg].w & 15))) ? 1 : 0; \
91 temp operation (1 << (cpu_state.regs[cpu_reg].w & 15)); \
92 seteaw(temp); if (cpu_state.abrt) return 1; \
93 flags_rebuild(); \
94 if (tempc) flags |= C_FLAG; \
95 else flags &= ~C_FLAG; \
96 \
97 CLOCK_CYCLES(6); \
98 PREFETCH_RUN(6, 2, rmdat, 1,0,1,0, 1); \
99 return 0; \
100 } \
101 static int opBT ## name ## _l_r_a16(uint32_t fetchdat) \
102 { \
103 int tempc; \
104 uint32_t temp; \
105 \
106 fetch_ea_16(fetchdat); \
107 cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].l / 32) * 4); eal_r = eal_w = 0; \
108 temp = geteal(); if (cpu_state.abrt) return 1; \
109 tempc = (temp & (1 << (cpu_state.regs[cpu_reg].l & 31))) ? 1 : 0; \
110 temp operation (1 << (cpu_state.regs[cpu_reg].l & 31)); \
111 seteal(temp); if (cpu_state.abrt) return 1; \
112 flags_rebuild(); \
113 if (tempc) flags |= C_FLAG; \
114 else flags &= ~C_FLAG; \
115 \
116 CLOCK_CYCLES(6); \
117 PREFETCH_RUN(6, 2, rmdat, 0,1,0,1, 0); \
118 return 0; \
119 } \
120 static int opBT ## name ## _l_r_a32(uint32_t fetchdat) \
121 { \
122 int tempc; \
123 uint32_t temp; \
124 \
125 fetch_ea_32(fetchdat); \
126 cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].l / 32) * 4); eal_r = eal_w = 0; \
127 temp = geteal(); if (cpu_state.abrt) return 1; \
128 tempc = (temp & (1 << (cpu_state.regs[cpu_reg].l & 31))) ? 1 : 0; \
129 temp operation (1 << (cpu_state.regs[cpu_reg].l & 31)); \
130 seteal(temp); if (cpu_state.abrt) return 1; \
131 flags_rebuild(); \
132 if (tempc) flags |= C_FLAG; \
133 else flags &= ~C_FLAG; \
134 \
135 CLOCK_CYCLES(6); \
136 PREFETCH_RUN(6, 2, rmdat, 0,1,0,1, 1); \
137 return 0; \
138 }
139
140 opBT(C, ^=)
141 opBT(R, &=~)
142 opBT(S, |=)
143
opBA_w_a16(uint32_t fetchdat)144 static int opBA_w_a16(uint32_t fetchdat)
145 {
146 int tempc, count;
147 uint16_t temp;
148
149 fetch_ea_16(fetchdat);
150
151 temp = geteaw();
152 count = getbyte(); if (cpu_state.abrt) return 1;
153 tempc = temp & (1 << count);
154 flags_rebuild();
155 switch (rmdat & 0x38)
156 {
157 case 0x20: /*BT w,imm*/
158 if (tempc) flags |= C_FLAG;
159 else flags &= ~C_FLAG;
160 CLOCK_CYCLES(3);
161 PREFETCH_RUN(3, 3, rmdat, (cpu_mod == 3) ? 0:1,0,0,0, 0);
162 return 0;
163 case 0x28: /*BTS w,imm*/
164 temp |= (1 << count);
165 break;
166 case 0x30: /*BTR w,imm*/
167 temp &= ~(1 << count);
168 break;
169 case 0x38: /*BTC w,imm*/
170 temp ^= (1 << count);
171 break;
172
173 default:
174 pclog("Bad 0F BA opcode %02X\n", rmdat & 0x38);
175 cpu_state.pc = cpu_state.oldpc;
176 x86illegal();
177 break;
178 }
179 seteaw(temp); if (cpu_state.abrt) return 1;
180 if (tempc) flags |= C_FLAG;
181 else flags &= ~C_FLAG;
182 CLOCK_CYCLES(6);
183 PREFETCH_RUN(6, 3, rmdat, (cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1,0, 0);
184 return 0;
185 }
opBA_w_a32(uint32_t fetchdat)186 static int opBA_w_a32(uint32_t fetchdat)
187 {
188 int tempc, count;
189 uint16_t temp;
190
191 fetch_ea_32(fetchdat);
192
193 temp = geteaw();
194 count = getbyte(); if (cpu_state.abrt) return 1;
195 tempc = temp & (1 << count);
196 flags_rebuild();
197 switch (rmdat & 0x38)
198 {
199 case 0x20: /*BT w,imm*/
200 if (tempc) flags |= C_FLAG;
201 else flags &= ~C_FLAG;
202 CLOCK_CYCLES(3);
203 PREFETCH_RUN(3, 3, rmdat, (cpu_mod == 3) ? 0:1,0,0,0, 1);
204 return 0;
205 case 0x28: /*BTS w,imm*/
206 temp |= (1 << count);
207 break;
208 case 0x30: /*BTR w,imm*/
209 temp &= ~(1 << count);
210 break;
211 case 0x38: /*BTC w,imm*/
212 temp ^= (1 << count);
213 break;
214
215 default:
216 pclog("Bad 0F BA opcode %02X\n", rmdat & 0x38);
217 cpu_state.pc = cpu_state.oldpc;
218 x86illegal();
219 break;
220 }
221 seteaw(temp); if (cpu_state.abrt) return 1;
222 if (tempc) flags |= C_FLAG;
223 else flags &= ~C_FLAG;
224 CLOCK_CYCLES(6);
225 PREFETCH_RUN(6, 3, rmdat, (cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1,0, 0);
226 return 0;
227 }
228
opBA_l_a16(uint32_t fetchdat)229 static int opBA_l_a16(uint32_t fetchdat)
230 {
231 int tempc, count;
232 uint32_t temp;
233
234 fetch_ea_16(fetchdat);
235
236 temp = geteal();
237 count = getbyte(); if (cpu_state.abrt) return 1;
238 tempc = temp & (1 << count);
239 flags_rebuild();
240 switch (rmdat & 0x38)
241 {
242 case 0x20: /*BT w,imm*/
243 if (tempc) flags |= C_FLAG;
244 else flags &= ~C_FLAG;
245 CLOCK_CYCLES(3);
246 PREFETCH_RUN(3, 3, rmdat, 0,(cpu_mod == 3) ? 0:1,0,0, 0);
247 return 0;
248 case 0x28: /*BTS w,imm*/
249 temp |= (1 << count);
250 break;
251 case 0x30: /*BTR w,imm*/
252 temp &= ~(1 << count);
253 break;
254 case 0x38: /*BTC w,imm*/
255 temp ^= (1 << count);
256 break;
257
258 default:
259 pclog("Bad 0F BA opcode %02X\n", rmdat & 0x38);
260 cpu_state.pc = cpu_state.oldpc;
261 x86illegal();
262 break;
263 }
264 seteal(temp); if (cpu_state.abrt) return 1;
265 if (tempc) flags |= C_FLAG;
266 else flags &= ~C_FLAG;
267 CLOCK_CYCLES(6);
268 PREFETCH_RUN(6, 3, rmdat, 0,(cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1, 0);
269 return 0;
270 }
opBA_l_a32(uint32_t fetchdat)271 static int opBA_l_a32(uint32_t fetchdat)
272 {
273 int tempc, count;
274 uint32_t temp;
275
276 fetch_ea_32(fetchdat);
277
278 temp = geteal();
279 count = getbyte(); if (cpu_state.abrt) return 1;
280 tempc = temp & (1 << count);
281 flags_rebuild();
282 switch (rmdat & 0x38)
283 {
284 case 0x20: /*BT w,imm*/
285 if (tempc) flags |= C_FLAG;
286 else flags &= ~C_FLAG;
287 CLOCK_CYCLES(3);
288 PREFETCH_RUN(3, 3, rmdat, 0,(cpu_mod == 3) ? 0:1,0,0, 1);
289 return 0;
290 case 0x28: /*BTS w,imm*/
291 temp |= (1 << count);
292 break;
293 case 0x30: /*BTR w,imm*/
294 temp &= ~(1 << count);
295 break;
296 case 0x38: /*BTC w,imm*/
297 temp ^= (1 << count);
298 break;
299
300 default:
301 pclog("Bad 0F BA opcode %02X\n", rmdat & 0x38);
302 cpu_state.pc = cpu_state.oldpc;
303 x86illegal();
304 break;
305 }
306 seteal(temp); if (cpu_state.abrt) return 1;
307 if (tempc) flags |= C_FLAG;
308 else flags &= ~C_FLAG;
309 CLOCK_CYCLES(6);
310 PREFETCH_RUN(6, 3, rmdat, 0,(cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1, 1);
311 return 0;
312 }
313