1 /* 2 * Generic intermediate code generation. 3 * 4 * Copyright (C) 2016-2017 Lluís Vilanova <vilanova@ac.upc.edu> 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2 or later. 7 * See the COPYING file in the top-level directory. 8 */ 9 10 #ifndef EXEC__TRANSLATOR_H 11 #define EXEC__TRANSLATOR_H 12 13 /* 14 * Include this header from a target-specific file, and add a 15 * 16 * DisasContextBase base; 17 * 18 * member in your target-specific DisasContext. 19 */ 20 21 22 #include "qemu/bswap.h" 23 #include "exec/exec-all.h" 24 #include "exec/cpu_ldst.h" 25 #include "exec/plugin-gen.h" 26 #include "tcg/tcg.h" 27 28 29 /** 30 * DisasJumpType: 31 * @DISAS_NEXT: Next instruction in program order. 32 * @DISAS_TOO_MANY: Too many instructions translated. 33 * @DISAS_NORETURN: Following code is dead. 34 * @DISAS_TARGET_*: Start of target-specific conditions. 35 * 36 * What instruction to disassemble next. 37 */ 38 typedef enum DisasJumpType { 39 DISAS_NEXT, 40 DISAS_TOO_MANY, 41 DISAS_NORETURN, 42 DISAS_TARGET_0, 43 DISAS_TARGET_1, 44 DISAS_TARGET_2, 45 DISAS_TARGET_3, 46 DISAS_TARGET_4, 47 DISAS_TARGET_5, 48 DISAS_TARGET_6, 49 DISAS_TARGET_7, 50 DISAS_TARGET_8, 51 DISAS_TARGET_9, 52 DISAS_TARGET_10, 53 DISAS_TARGET_11, 54 } DisasJumpType; 55 56 /** 57 * DisasContextBase: 58 * @tb: Translation block for this disassembly. 59 * @pc_first: Address of first guest instruction in this TB. 60 * @pc_next: Address of next guest instruction in this TB (current during 61 * disassembly). 62 * @is_jmp: What instruction to disassemble next. 63 * @num_insns: Number of translated instructions (including current). 64 * @max_insns: Maximum number of instructions to be translated in this TB. 65 * @singlestep_enabled: "Hardware" single stepping enabled. 66 * 67 * Architecture-agnostic disassembly context. 68 */ 69 typedef struct DisasContextBase { 70 TranslationBlock *tb; 71 target_ulong pc_first; 72 target_ulong pc_next; 73 DisasJumpType is_jmp; 74 int num_insns; 75 int max_insns; 76 bool singlestep_enabled; 77 #ifdef CONFIG_MIPS_LOG_INSTR 78 bool log_instr; 79 #endif 80 } DisasContextBase; 81 82 /** 83 * TranslatorOps: 84 * @init_disas_context: 85 * Initialize the target-specific portions of DisasContext struct. 86 * The generic DisasContextBase has already been initialized. 87 * 88 * @tb_start: 89 * Emit any code required before the start of the main loop, 90 * after the generic gen_tb_start(). 91 * 92 * @insn_start: 93 * Emit the tcg_gen_insn_start opcode. 94 * 95 * @breakpoint_check: 96 * When called, the breakpoint has already been checked to match the PC, 97 * but the target may decide the breakpoint missed the address 98 * (e.g., due to conditions encoded in their flags). Return true to 99 * indicate that the breakpoint did hit, in which case no more breakpoints 100 * are checked. If the breakpoint did hit, emit any code required to 101 * signal the exception, and set db->is_jmp as necessary to terminate 102 * the main loop. 103 * 104 * @translate_insn: 105 * Disassemble one instruction and set db->pc_next for the start 106 * of the following instruction. Set db->is_jmp as necessary to 107 * terminate the main loop. 108 * 109 * @tb_stop: 110 * Emit any opcodes required to exit the TB, based on db->is_jmp. 111 * 112 * @disas_log: 113 * Print instruction disassembly to log. 114 * 115 * @tb_in_user_mode: 116 * Return true if the TB will execute in user mode. Used for the "user-instr" 117 * isntruction logging feature (and MIPS magic nops) 118 */ 119 typedef struct TranslatorOps { 120 void (*init_disas_context)(DisasContextBase *db, CPUState *cpu); 121 void (*tb_start)(DisasContextBase *db, CPUState *cpu); 122 void (*insn_start)(DisasContextBase *db, CPUState *cpu); 123 bool (*breakpoint_check)(DisasContextBase *db, CPUState *cpu, 124 const CPUBreakpoint *bp); 125 void (*translate_insn)(DisasContextBase *db, CPUState *cpu); 126 void (*tb_stop)(DisasContextBase *db, CPUState *cpu); 127 void (*disas_log)(const DisasContextBase *db, CPUState *cpu); 128 bool (*tb_in_user_mode)(DisasContextBase *db, CPUState *cpu); 129 130 } TranslatorOps; 131 132 /** 133 * translator_loop: 134 * @ops: Target-specific operations. 135 * @db: Disassembly context. 136 * @cpu: Target vCPU. 137 * @tb: Translation block. 138 * @max_insns: Maximum number of insns to translate. 139 * 140 * Generic translator loop. 141 * 142 * Translation will stop in the following cases (in order): 143 * - When is_jmp set by #TranslatorOps::breakpoint_check. 144 * - set to DISAS_TOO_MANY exits after translating one more insn 145 * - set to any other value than DISAS_NEXT exits immediately. 146 * - When is_jmp set by #TranslatorOps::translate_insn. 147 * - set to any value other than DISAS_NEXT exits immediately. 148 * - When the TCG operation buffer is full. 149 * - When single-stepping is enabled (system-wide or on the current vCPU). 150 * - When too many instructions have been translated. 151 */ 152 void translator_loop(const TranslatorOps *ops, DisasContextBase *db, 153 CPUState *cpu, TranslationBlock *tb, int max_insns); 154 155 void translator_loop_temp_check(DisasContextBase *db); 156 157 /* 158 * Translator Load Functions 159 * 160 * These are intended to replace the direct usage of the cpu_ld*_code 161 * functions and are mandatory for front-ends that have been migrated 162 * to the common translator_loop. These functions are only intended 163 * to be called from the translation stage and should not be called 164 * from helper functions. Those functions should be converted to encode 165 * the relevant information at translation time. 166 */ 167 168 #define GEN_TRANSLATOR_LD(fullname, type, load_fn, swap_fn) \ 169 static inline type \ 170 fullname ## _swap(CPUArchState *env, abi_ptr pc, bool do_swap) \ 171 { \ 172 type ret = load_fn(env, pc); \ 173 if (do_swap) { \ 174 ret = swap_fn(ret); \ 175 } \ 176 plugin_insn_append(&ret, sizeof(ret)); \ 177 return ret; \ 178 } \ 179 \ 180 static inline type fullname(CPUArchState *env, abi_ptr pc) \ 181 { \ 182 return fullname ## _swap(env, pc, false); \ 183 } 184 185 GEN_TRANSLATOR_LD(translator_ldub, uint8_t, cpu_ldub_code, /* no swap */) 186 GEN_TRANSLATOR_LD(translator_ldsw, int16_t, cpu_ldsw_code, bswap16) 187 GEN_TRANSLATOR_LD(translator_lduw, uint16_t, cpu_lduw_code, bswap16) 188 GEN_TRANSLATOR_LD(translator_ldl, uint32_t, cpu_ldl_code, bswap32) 189 GEN_TRANSLATOR_LD(translator_ldq, uint64_t, cpu_ldq_code, bswap64) 190 #undef GEN_TRANSLATOR_LD 191 192 #endif /* EXEC__TRANSLATOR_H */ 193