1 /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) */ 2 /* 3 * Copyright (c) 2012-2016 VMware, Inc. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of EITHER the GNU General Public License 7 * version 2 as published by the Free Software Foundation or the BSD 8 * 2-Clause License. This program is distributed in the hope that it 9 * will be useful, but WITHOUT ANY WARRANTY; WITHOUT EVEN THE IMPLIED 10 * WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. 11 * See the GNU General Public License version 2 for more details at 12 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program available in the file COPYING in the main 16 * directory of this source tree. 17 * 18 * The BSD 2-Clause License 19 * 20 * Redistribution and use in source and binary forms, with or 21 * without modification, are permitted provided that the following 22 * conditions are met: 23 * 24 * - Redistributions of source code must retain the above 25 * copyright notice, this list of conditions and the following 26 * disclaimer. 27 * 28 * - Redistributions in binary form must reproduce the above 29 * copyright notice, this list of conditions and the following 30 * disclaimer in the documentation and/or other materials 31 * provided with the distribution. 32 * 33 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 34 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 35 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 36 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 37 * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 38 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 39 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 40 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 41 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 42 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 43 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 44 * OF THE POSSIBILITY OF SUCH DAMAGE. 45 */ 46 47 #ifndef __VMW_PVRDMA_ABI_H__ 48 #define __VMW_PVRDMA_ABI_H__ 49 50 #include "standard-headers/linux/types.h" 51 52 #define PVRDMA_UVERBS_ABI_VERSION 3 /* ABI Version. */ 53 #define PVRDMA_UAR_HANDLE_MASK 0x00FFFFFF /* Bottom 24 bits. */ 54 #define PVRDMA_UAR_QP_OFFSET 0 /* QP doorbell. */ 55 #define PVRDMA_UAR_QP_SEND (1 << 30) /* Send bit. */ 56 #define PVRDMA_UAR_QP_RECV (1 << 31) /* Recv bit. */ 57 #define PVRDMA_UAR_CQ_OFFSET 4 /* CQ doorbell. */ 58 #define PVRDMA_UAR_CQ_ARM_SOL (1 << 29) /* Arm solicited bit. */ 59 #define PVRDMA_UAR_CQ_ARM (1 << 30) /* Arm bit. */ 60 #define PVRDMA_UAR_CQ_POLL (1 << 31) /* Poll bit. */ 61 #define PVRDMA_UAR_SRQ_OFFSET 8 /* SRQ doorbell. */ 62 #define PVRDMA_UAR_SRQ_RECV (1 << 30) /* Recv bit. */ 63 64 enum pvrdma_wr_opcode { 65 PVRDMA_WR_RDMA_WRITE, 66 PVRDMA_WR_RDMA_WRITE_WITH_IMM, 67 PVRDMA_WR_SEND, 68 PVRDMA_WR_SEND_WITH_IMM, 69 PVRDMA_WR_RDMA_READ, 70 PVRDMA_WR_ATOMIC_CMP_AND_SWP, 71 PVRDMA_WR_ATOMIC_FETCH_AND_ADD, 72 PVRDMA_WR_LSO, 73 PVRDMA_WR_SEND_WITH_INV, 74 PVRDMA_WR_RDMA_READ_WITH_INV, 75 PVRDMA_WR_LOCAL_INV, 76 PVRDMA_WR_FAST_REG_MR, 77 PVRDMA_WR_MASKED_ATOMIC_CMP_AND_SWP, 78 PVRDMA_WR_MASKED_ATOMIC_FETCH_AND_ADD, 79 PVRDMA_WR_BIND_MW, 80 PVRDMA_WR_REG_SIG_MR, 81 PVRDMA_WR_ERROR, 82 }; 83 84 enum pvrdma_wc_status { 85 PVRDMA_WC_SUCCESS, 86 PVRDMA_WC_LOC_LEN_ERR, 87 PVRDMA_WC_LOC_QP_OP_ERR, 88 PVRDMA_WC_LOC_EEC_OP_ERR, 89 PVRDMA_WC_LOC_PROT_ERR, 90 PVRDMA_WC_WR_FLUSH_ERR, 91 PVRDMA_WC_MW_BIND_ERR, 92 PVRDMA_WC_BAD_RESP_ERR, 93 PVRDMA_WC_LOC_ACCESS_ERR, 94 PVRDMA_WC_REM_INV_REQ_ERR, 95 PVRDMA_WC_REM_ACCESS_ERR, 96 PVRDMA_WC_REM_OP_ERR, 97 PVRDMA_WC_RETRY_EXC_ERR, 98 PVRDMA_WC_RNR_RETRY_EXC_ERR, 99 PVRDMA_WC_LOC_RDD_VIOL_ERR, 100 PVRDMA_WC_REM_INV_RD_REQ_ERR, 101 PVRDMA_WC_REM_ABORT_ERR, 102 PVRDMA_WC_INV_EECN_ERR, 103 PVRDMA_WC_INV_EEC_STATE_ERR, 104 PVRDMA_WC_FATAL_ERR, 105 PVRDMA_WC_RESP_TIMEOUT_ERR, 106 PVRDMA_WC_GENERAL_ERR, 107 }; 108 109 enum pvrdma_wc_opcode { 110 PVRDMA_WC_SEND, 111 PVRDMA_WC_RDMA_WRITE, 112 PVRDMA_WC_RDMA_READ, 113 PVRDMA_WC_COMP_SWAP, 114 PVRDMA_WC_FETCH_ADD, 115 PVRDMA_WC_BIND_MW, 116 PVRDMA_WC_LSO, 117 PVRDMA_WC_LOCAL_INV, 118 PVRDMA_WC_FAST_REG_MR, 119 PVRDMA_WC_MASKED_COMP_SWAP, 120 PVRDMA_WC_MASKED_FETCH_ADD, 121 PVRDMA_WC_RECV = 1 << 7, 122 PVRDMA_WC_RECV_RDMA_WITH_IMM, 123 }; 124 125 enum pvrdma_wc_flags { 126 PVRDMA_WC_GRH = 1 << 0, 127 PVRDMA_WC_WITH_IMM = 1 << 1, 128 PVRDMA_WC_WITH_INVALIDATE = 1 << 2, 129 PVRDMA_WC_IP_CSUM_OK = 1 << 3, 130 PVRDMA_WC_WITH_SMAC = 1 << 4, 131 PVRDMA_WC_WITH_VLAN = 1 << 5, 132 PVRDMA_WC_WITH_NETWORK_HDR_TYPE = 1 << 6, 133 PVRDMA_WC_FLAGS_MAX = PVRDMA_WC_WITH_NETWORK_HDR_TYPE, 134 }; 135 136 enum pvrdma_network_type { 137 PVRDMA_NETWORK_IB, 138 PVRDMA_NETWORK_ROCE_V1 = PVRDMA_NETWORK_IB, 139 PVRDMA_NETWORK_IPV4, 140 PVRDMA_NETWORK_IPV6 141 }; 142 143 struct pvrdma_alloc_ucontext_resp { 144 uint32_t qp_tab_size; 145 uint32_t reserved; 146 }; 147 148 struct pvrdma_alloc_pd_resp { 149 uint32_t pdn; 150 uint32_t reserved; 151 }; 152 153 struct pvrdma_create_cq { 154 uint64_t __attribute__((aligned(8))) buf_addr; 155 uint32_t buf_size; 156 uint32_t reserved; 157 }; 158 159 struct pvrdma_create_cq_resp { 160 uint32_t cqn; 161 uint32_t reserved; 162 }; 163 164 struct pvrdma_resize_cq { 165 uint64_t __attribute__((aligned(8))) buf_addr; 166 uint32_t buf_size; 167 uint32_t reserved; 168 }; 169 170 struct pvrdma_create_srq { 171 uint64_t __attribute__((aligned(8))) buf_addr; 172 uint32_t buf_size; 173 uint32_t reserved; 174 }; 175 176 struct pvrdma_create_srq_resp { 177 uint32_t srqn; 178 uint32_t reserved; 179 }; 180 181 struct pvrdma_create_qp { 182 uint64_t __attribute__((aligned(8))) rbuf_addr; 183 uint64_t __attribute__((aligned(8))) sbuf_addr; 184 uint32_t rbuf_size; 185 uint32_t sbuf_size; 186 uint64_t __attribute__((aligned(8))) qp_addr; 187 }; 188 189 struct pvrdma_create_qp_resp { 190 uint32_t qpn; 191 uint32_t qp_handle; 192 }; 193 194 /* PVRDMA masked atomic compare and swap */ 195 struct pvrdma_ex_cmp_swap { 196 uint64_t __attribute__((aligned(8))) swap_val; 197 uint64_t __attribute__((aligned(8))) compare_val; 198 uint64_t __attribute__((aligned(8))) swap_mask; 199 uint64_t __attribute__((aligned(8))) compare_mask; 200 }; 201 202 /* PVRDMA masked atomic fetch and add */ 203 struct pvrdma_ex_fetch_add { 204 uint64_t __attribute__((aligned(8))) add_val; 205 uint64_t __attribute__((aligned(8))) field_boundary; 206 }; 207 208 /* PVRDMA address vector. */ 209 struct pvrdma_av { 210 uint32_t port_pd; 211 uint32_t sl_tclass_flowlabel; 212 uint8_t dgid[16]; 213 uint8_t src_path_bits; 214 uint8_t gid_index; 215 uint8_t stat_rate; 216 uint8_t hop_limit; 217 uint8_t dmac[6]; 218 uint8_t reserved[6]; 219 }; 220 221 /* PVRDMA scatter/gather entry */ 222 struct pvrdma_sge { 223 uint64_t __attribute__((aligned(8))) addr; 224 uint32_t length; 225 uint32_t lkey; 226 }; 227 228 /* PVRDMA receive queue work request */ 229 struct pvrdma_rq_wqe_hdr { 230 uint64_t __attribute__((aligned(8))) wr_id; /* wr id */ 231 uint32_t num_sge; /* size of s/g array */ 232 uint32_t total_len; /* reserved */ 233 }; 234 /* Use pvrdma_sge (ib_sge) for receive queue s/g array elements. */ 235 236 /* PVRDMA send queue work request */ 237 struct pvrdma_sq_wqe_hdr { 238 uint64_t __attribute__((aligned(8))) wr_id; /* wr id */ 239 uint32_t num_sge; /* size of s/g array */ 240 uint32_t total_len; /* reserved */ 241 uint32_t opcode; /* operation type */ 242 uint32_t send_flags; /* wr flags */ 243 union { 244 uint32_t imm_data; 245 uint32_t invalidate_rkey; 246 } ex; 247 uint32_t reserved; 248 union { 249 struct { 250 uint64_t __attribute__((aligned(8))) remote_addr; 251 uint32_t rkey; 252 uint8_t reserved[4]; 253 } rdma; 254 struct { 255 uint64_t __attribute__((aligned(8))) remote_addr; 256 uint64_t __attribute__((aligned(8))) compare_add; 257 uint64_t __attribute__((aligned(8))) swap; 258 uint32_t rkey; 259 uint32_t reserved; 260 } atomic; 261 struct { 262 uint64_t __attribute__((aligned(8))) remote_addr; 263 uint32_t log_arg_sz; 264 uint32_t rkey; 265 union { 266 struct pvrdma_ex_cmp_swap cmp_swap; 267 struct pvrdma_ex_fetch_add fetch_add; 268 } wr_data; 269 } masked_atomics; 270 struct { 271 uint64_t __attribute__((aligned(8))) iova_start; 272 uint64_t __attribute__((aligned(8))) pl_pdir_dma; 273 uint32_t page_shift; 274 uint32_t page_list_len; 275 uint32_t length; 276 uint32_t access_flags; 277 uint32_t rkey; 278 uint32_t reserved; 279 } fast_reg; 280 struct { 281 uint32_t remote_qpn; 282 uint32_t remote_qkey; 283 struct pvrdma_av av; 284 } ud; 285 } wr; 286 }; 287 /* Use pvrdma_sge (ib_sge) for send queue s/g array elements. */ 288 289 /* Completion queue element. */ 290 struct pvrdma_cqe { 291 uint64_t __attribute__((aligned(8))) wr_id; 292 uint64_t __attribute__((aligned(8))) qp; 293 uint32_t opcode; 294 uint32_t status; 295 uint32_t byte_len; 296 uint32_t imm_data; 297 uint32_t src_qp; 298 uint32_t wc_flags; 299 uint32_t vendor_err; 300 uint16_t pkey_index; 301 uint16_t slid; 302 uint8_t sl; 303 uint8_t dlid_path_bits; 304 uint8_t port_num; 305 uint8_t smac[6]; 306 uint8_t network_hdr_type; 307 uint8_t reserved2[6]; /* Pad to next power of 2 (64). */ 308 }; 309 310 #endif /* __VMW_PVRDMA_ABI_H__ */ 311