1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2011 Samsung Electronics 4 * Heungjun Kim <riverful.kim@samsung.com> 5 * 6 * Configuation settings for the SAMSUNG TRATS (EXYNOS4210) board. 7 */ 8 9 #ifndef __CONFIG_TRATS_H 10 #define __CONFIG_TRATS_H 11 12 #include <configs/exynos4-common.h> 13 14 #define CONFIG_TRATS 15 16 #define CONFIG_TIZEN /* TIZEN lib */ 17 18 #define CONFIG_SYS_L2CACHE_OFF 19 #ifndef CONFIG_SYS_L2CACHE_OFF 20 #define CONFIG_SYS_L2_PL310 21 #define CONFIG_SYS_PL310_BASE 0x10502000 22 #endif 23 24 /* TRATS has 4 banks of DRAM */ 25 #define CONFIG_SYS_SDRAM_BASE 0x40000000 26 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE 27 #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ 28 29 /* memtest works on */ 30 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 31 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000) 32 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000) 33 34 /* select serial console configuration */ 35 36 #define CONFIG_MACH_TYPE MACH_TYPE_TRATS 37 38 #define CONFIG_BOOTCOMMAND "run autoboot" 39 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" 40 41 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ 42 - GENERATED_GBL_DATA_SIZE) 43 44 #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ ~MessageLoopIdleTask()45 46 #define CONFIG_SYS_MONITOR_BASE 0x00000000 47 48 #define CONFIG_BOOTBLOCK "10" 49 #define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}" 50 51 #define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV 52 #define CONFIG_ENV_SIZE 4096 53 #define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */ 54 55 #define CONFIG_ENV_OVERWRITE 56 57 /* Tizen - partitions definitions */ 58 #define PARTS_CSA "csa-mmc" 59 #define PARTS_BOOT "boot" 60 #define PARTS_QBOOT "qboot" 61 #define PARTS_CSC "csc" 62 #define PARTS_ROOT "platform" 63 #define PARTS_DATA "data" 64 #define PARTS_UMS "ums" 65 66 #define PARTS_DEFAULT \ 67 "uuid_disk=${uuid_gpt_disk};" \ 68 "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \ 69 "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \ 70 "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \ 71 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \ 72 "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \ 73 "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \ 74 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \ 75 76 #define CONFIG_DFU_ALT \ 77 "u-boot raw 0x80 0x400;" \ 78 "/uImage ext4 0 2;" \ 79 "/modem.bin ext4 0 2;" \ 80 "/exynos4210-trats.dtb ext4 0 2;" \ 81 ""PARTS_CSA" part 0 1;" \ 82 ""PARTS_BOOT" part 0 2;" \ 83 ""PARTS_QBOOT" part 0 3;" \ 84 ""PARTS_CSC" part 0 4;" \ 85 ""PARTS_ROOT" part 0 5;" \ 86 ""PARTS_DATA" part 0 6;" \ 87 ""PARTS_UMS" part 0 7;" \ 88 "params.bin raw 0x38 0x8;" \ 89 "/Image.itb ext4 0 2\0" 90 91 #define CONFIG_EXTRA_ENV_SETTINGS \ 92 "bootk=" \ 93 "run loaduimage;" \ 94 "if run loaddtb; then " \ 95 "bootm 0x40007FC0 - ${fdtaddr};" \ 96 "fi;" \ 97 "bootm 0x40007FC0;\0" \ 98 "updatebackup=" \ 99 "mmc dev 0 2; mmc write 0 0x42100000 0 0x200;" \ 100 "mmc dev 0 0\0" \ 101 "updatebootb=" \ 102 "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \ 103 "lpj=lpj=3981312\0" \ 104 "nfsboot=" \ 105 "setenv bootargs root=/dev/nfs rw " \ 106 "nfsroot=${nfsroot},nolock,tcp " \ 107 "ip=${ipaddr}:${serverip}:${gatewayip}:" \ 108 "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \ 109 "; run bootk\0" \ 110 "ramfsboot=" \ 111 "setenv bootargs root=/dev/ram0 rw rootfstype=ext2 " \ 112 "${console} ${meminfo} " \ 113 "initrd=0x43000000,8M ramdisk=8192\0" \ 114 "mmcboot=" \ 115 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ 116 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \ 117 "run bootk\0" \ 118 "bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \ 119 "boottrace=setenv opts initcall_debug; run bootcmd\0" \ 120 "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \ 121 "verify=n\0" \ 122 "rootfstype=ext4\0" \ 123 "console=" CONFIG_DEFAULT_CONSOLE \ 124 "meminfo=crashkernel=32M@0x50000000\0" \ 125 "nfsroot=/nfsroot/arm\0" \ 126 "bootblock=" CONFIG_BOOTBLOCK "\0" \ 127 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \ 128 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \ 129 "${fdtfile}\0" \ 130 "mmcdev=0\0" \ 131 "mmcbootpart=2\0" \ 132 "mmcrootpart=5\0" \ 133 "opts=always_resume=1\0" \ 134 "partitions=" PARTS_DEFAULT \ 135 "dfu_alt_info=" CONFIG_DFU_ALT \ 136 "spladdr=0x40000100\0" \ 137 "splsize=0x200\0" \ 138 "splfile=falcon.bin\0" \ 139 "spl_export=" \ 140 "setexpr spl_imgsize ${splsize} + 8 ;" \ 141 "setenv spl_imgsize 0x${spl_imgsize};" \ 142 "setexpr spl_imgaddr ${spladdr} - 8 ;" \ 143 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \ 144 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \ 145 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ 146 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \ 147 "spl export atags 0x40007FC0;" \ 148 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \ 149 "mw.l ${spl_addr_tmp} ${splsize};" \ 150 "ext4write mmc ${mmcdev}:${mmcbootpart}" \ 151 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \ 152 "setenv spl_imgsize;" \ 153 "setenv spl_imgaddr;" \ 154 "setenv spl_addr_tmp;\0" \ 155 CONFIG_EXTRA_ENV_ITB \ 156 "fdtaddr=40800000\0" \ 157 158 /* Falcon mode definitions */ 159 #define CONFIG_SYS_SPL_ARGS_ADDR CONFIG_SYS_SDRAM_BASE + 0x100 160 161 /* GPT */ 162 163 /* Security subsystem - enable hw_rand() */ 164 #define CONFIG_EXYNOS_ACE_SHA 165 166 /* Common misc for Samsung */ 167 #define CONFIG_MISC_COMMON 168 169 /* Download menu - Samsung common */ 170 #define CONFIG_LCD_MENU 171 172 /* Download menu - definitions for check keys */ 173 #ifndef __ASSEMBLY__ 174 175 #define KEY_PWR_PMIC_NAME "MAX8997_PMIC" 176 #define KEY_PWR_STATUS_REG MAX8997_REG_STATUS1 177 #define KEY_PWR_STATUS_MASK (1 << 0) 178 #define KEY_PWR_INTERRUPT_REG MAX8997_REG_INT1 179 #define KEY_PWR_INTERRUPT_MASK (1 << 0) 180 181 #define KEY_VOL_UP_GPIO EXYNOS4_GPIO_X20 182 #define KEY_VOL_DOWN_GPIO EXYNOS4_GPIO_X21 183 #endif /* __ASSEMBLY__ */ 184 185 /* LCD console */ 186 #define LCD_BPP LCD_COLOR16 187 188 /* LCD */ 189 #define CONFIG_BMP_16BPP 190 #define CONFIG_FB_ADDR 0x52504000 191 #define CONFIG_EXYNOS_MIPI_DSIM 192 #define CONFIG_VIDEO_BMP_GZIP 193 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54) 194 195 #endif /* __CONFIG_H */ 196