1 /*
2 * QEMU sPAPR Dynamic DMA windows support
3 *
4 * Copyright (c) 2015 Alexey Kardashevskiy, IBM Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License,
9 * or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #include "qemu/osdep.h"
21 #include "cpu.h"
22 #include "qemu/error-report.h"
23 #include "hw/ppc/spapr.h"
24 #include "hw/pci-host/spapr.h"
25 #include "trace.h"
26
spapr_phb_get_active_win_num_cb(Object * child,void * opaque)27 static int spapr_phb_get_active_win_num_cb(Object *child, void *opaque)
28 {
29 sPAPRTCETable *tcet;
30
31 tcet = (sPAPRTCETable *) object_dynamic_cast(child, TYPE_SPAPR_TCE_TABLE);
32 if (tcet && tcet->nb_table) {
33 ++*(unsigned *)opaque;
34 }
35 return 0;
36 }
37
spapr_phb_get_active_win_num(sPAPRPHBState * sphb)38 static unsigned spapr_phb_get_active_win_num(sPAPRPHBState *sphb)
39 {
40 unsigned ret = 0;
41
42 object_child_foreach(OBJECT(sphb), spapr_phb_get_active_win_num_cb, &ret);
43
44 return ret;
45 }
46
spapr_phb_get_free_liobn_cb(Object * child,void * opaque)47 static int spapr_phb_get_free_liobn_cb(Object *child, void *opaque)
48 {
49 sPAPRTCETable *tcet;
50
51 tcet = (sPAPRTCETable *) object_dynamic_cast(child, TYPE_SPAPR_TCE_TABLE);
52 if (tcet && !tcet->nb_table) {
53 *(uint32_t *)opaque = tcet->liobn;
54 return 1;
55 }
56 return 0;
57 }
58
spapr_phb_get_free_liobn(sPAPRPHBState * sphb)59 static unsigned spapr_phb_get_free_liobn(sPAPRPHBState *sphb)
60 {
61 uint32_t liobn = 0;
62
63 object_child_foreach(OBJECT(sphb), spapr_phb_get_free_liobn_cb, &liobn);
64
65 return liobn;
66 }
67
spapr_page_mask_to_query_mask(uint64_t page_mask)68 static uint32_t spapr_page_mask_to_query_mask(uint64_t page_mask)
69 {
70 int i;
71 uint32_t mask = 0;
72 const struct { int shift; uint32_t mask; } masks[] = {
73 { 12, RTAS_DDW_PGSIZE_4K },
74 { 16, RTAS_DDW_PGSIZE_64K },
75 { 24, RTAS_DDW_PGSIZE_16M },
76 { 25, RTAS_DDW_PGSIZE_32M },
77 { 26, RTAS_DDW_PGSIZE_64M },
78 { 27, RTAS_DDW_PGSIZE_128M },
79 { 28, RTAS_DDW_PGSIZE_256M },
80 { 34, RTAS_DDW_PGSIZE_16G },
81 };
82
83 for (i = 0; i < ARRAY_SIZE(masks); ++i) {
84 if (page_mask & (1ULL << masks[i].shift)) {
85 mask |= masks[i].mask;
86 }
87 }
88
89 return mask;
90 }
91
rtas_ibm_query_pe_dma_window(PowerPCCPU * cpu,sPAPRMachineState * spapr,uint32_t token,uint32_t nargs,target_ulong args,uint32_t nret,target_ulong rets)92 static void rtas_ibm_query_pe_dma_window(PowerPCCPU *cpu,
93 sPAPRMachineState *spapr,
94 uint32_t token, uint32_t nargs,
95 target_ulong args,
96 uint32_t nret, target_ulong rets)
97 {
98 sPAPRPHBState *sphb;
99 uint64_t buid, max_window_size;
100 uint32_t avail, addr, pgmask = 0;
101 MachineState *machine = MACHINE(spapr);
102
103 if ((nargs != 3) || (nret != 5)) {
104 goto param_error_exit;
105 }
106
107 buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2);
108 addr = rtas_ld(args, 0);
109 sphb = spapr_pci_find_phb(spapr, buid);
110 if (!sphb || !sphb->ddw_enabled) {
111 goto param_error_exit;
112 }
113
114 /* Translate page mask to LoPAPR format */
115 pgmask = spapr_page_mask_to_query_mask(sphb->page_size_mask);
116
117 /*
118 * This is "Largest contiguous block of TCEs allocated specifically
119 * for (that is, are reserved for) this PE".
120 * Return the maximum number as maximum supported RAM size was in 4K pages.
121 */
122 if (machine->ram_size == machine->maxram_size) {
123 max_window_size = machine->ram_size;
124 } else {
125 max_window_size = machine->device_memory->base +
126 memory_region_size(&machine->device_memory->mr);
127 }
128
129 avail = SPAPR_PCI_DMA_MAX_WINDOWS - spapr_phb_get_active_win_num(sphb);
130
131 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
132 rtas_st(rets, 1, avail);
133 rtas_st(rets, 2, max_window_size >> SPAPR_TCE_PAGE_SHIFT);
134 rtas_st(rets, 3, pgmask);
135 rtas_st(rets, 4, 0); /* DMA migration mask, not supported */
136
137 trace_spapr_iommu_ddw_query(buid, addr, avail, max_window_size, pgmask);
138 return;
139
140 param_error_exit:
141 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
142 }
143
rtas_ibm_create_pe_dma_window(PowerPCCPU * cpu,sPAPRMachineState * spapr,uint32_t token,uint32_t nargs,target_ulong args,uint32_t nret,target_ulong rets)144 static void rtas_ibm_create_pe_dma_window(PowerPCCPU *cpu,
145 sPAPRMachineState *spapr,
146 uint32_t token, uint32_t nargs,
147 target_ulong args,
148 uint32_t nret, target_ulong rets)
149 {
150 sPAPRPHBState *sphb;
151 sPAPRTCETable *tcet = NULL;
152 uint32_t addr, page_shift, window_shift, liobn;
153 uint64_t buid, win_addr;
154 int windows;
155
156 if ((nargs != 5) || (nret != 4)) {
157 goto param_error_exit;
158 }
159
160 buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2);
161 addr = rtas_ld(args, 0);
162 sphb = spapr_pci_find_phb(spapr, buid);
163 if (!sphb || !sphb->ddw_enabled) {
164 goto param_error_exit;
165 }
166
167 page_shift = rtas_ld(args, 3);
168 window_shift = rtas_ld(args, 4);
169 liobn = spapr_phb_get_free_liobn(sphb);
170 windows = spapr_phb_get_active_win_num(sphb);
171
172 if (!(sphb->page_size_mask & (1ULL << page_shift)) ||
173 (window_shift < page_shift)) {
174 goto param_error_exit;
175 }
176
177 if (!liobn || !sphb->ddw_enabled || windows == SPAPR_PCI_DMA_MAX_WINDOWS) {
178 goto hw_error_exit;
179 }
180
181 tcet = spapr_tce_find_by_liobn(liobn);
182 if (!tcet) {
183 goto hw_error_exit;
184 }
185
186 win_addr = (windows == 0) ? sphb->dma_win_addr : sphb->dma64_win_addr;
187 spapr_tce_table_enable(tcet, page_shift, win_addr,
188 1ULL << (window_shift - page_shift));
189 if (!tcet->nb_table) {
190 goto hw_error_exit;
191 }
192
193 trace_spapr_iommu_ddw_create(buid, addr, 1ULL << page_shift,
194 1ULL << window_shift, tcet->bus_offset, liobn);
195
196 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
197 rtas_st(rets, 1, liobn);
198 rtas_st(rets, 2, tcet->bus_offset >> 32);
199 rtas_st(rets, 3, tcet->bus_offset & ((uint32_t) -1));
200
201 return;
202
203 hw_error_exit:
204 rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
205 return;
206
207 param_error_exit:
208 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
209 }
210
rtas_ibm_remove_pe_dma_window(PowerPCCPU * cpu,sPAPRMachineState * spapr,uint32_t token,uint32_t nargs,target_ulong args,uint32_t nret,target_ulong rets)211 static void rtas_ibm_remove_pe_dma_window(PowerPCCPU *cpu,
212 sPAPRMachineState *spapr,
213 uint32_t token, uint32_t nargs,
214 target_ulong args,
215 uint32_t nret, target_ulong rets)
216 {
217 sPAPRPHBState *sphb;
218 sPAPRTCETable *tcet;
219 uint32_t liobn;
220
221 if ((nargs != 1) || (nret != 1)) {
222 goto param_error_exit;
223 }
224
225 liobn = rtas_ld(args, 0);
226 tcet = spapr_tce_find_by_liobn(liobn);
227 if (!tcet) {
228 goto param_error_exit;
229 }
230
231 sphb = SPAPR_PCI_HOST_BRIDGE(OBJECT(tcet)->parent);
232 if (!sphb || !sphb->ddw_enabled || !tcet->nb_table) {
233 goto param_error_exit;
234 }
235
236 spapr_tce_table_disable(tcet);
237 trace_spapr_iommu_ddw_remove(liobn);
238
239 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
240 return;
241
242 param_error_exit:
243 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
244 }
245
rtas_ibm_reset_pe_dma_window(PowerPCCPU * cpu,sPAPRMachineState * spapr,uint32_t token,uint32_t nargs,target_ulong args,uint32_t nret,target_ulong rets)246 static void rtas_ibm_reset_pe_dma_window(PowerPCCPU *cpu,
247 sPAPRMachineState *spapr,
248 uint32_t token, uint32_t nargs,
249 target_ulong args,
250 uint32_t nret, target_ulong rets)
251 {
252 sPAPRPHBState *sphb;
253 uint64_t buid;
254 uint32_t addr;
255
256 if ((nargs != 3) || (nret != 1)) {
257 goto param_error_exit;
258 }
259
260 buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2);
261 addr = rtas_ld(args, 0);
262 sphb = spapr_pci_find_phb(spapr, buid);
263 if (!sphb || !sphb->ddw_enabled) {
264 goto param_error_exit;
265 }
266
267 spapr_phb_dma_reset(sphb);
268 trace_spapr_iommu_ddw_reset(buid, addr);
269
270 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
271
272 return;
273
274 param_error_exit:
275 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
276 }
277
spapr_rtas_ddw_init(void)278 static void spapr_rtas_ddw_init(void)
279 {
280 spapr_rtas_register(RTAS_IBM_QUERY_PE_DMA_WINDOW,
281 "ibm,query-pe-dma-window",
282 rtas_ibm_query_pe_dma_window);
283 spapr_rtas_register(RTAS_IBM_CREATE_PE_DMA_WINDOW,
284 "ibm,create-pe-dma-window",
285 rtas_ibm_create_pe_dma_window);
286 spapr_rtas_register(RTAS_IBM_REMOVE_PE_DMA_WINDOW,
287 "ibm,remove-pe-dma-window",
288 rtas_ibm_remove_pe_dma_window);
289 spapr_rtas_register(RTAS_IBM_RESET_PE_DMA_WINDOW,
290 "ibm,reset-pe-dma-window",
291 rtas_ibm_reset_pe_dma_window);
292 }
293
294 type_init(spapr_rtas_ddw_init)
295