1 /*
2 * (C) Copyright 2008
3 * Texas Instruments, <www.ti.com>
4 *
5 * Author :
6 * Manikandan Pillai <mani.pillai@ti.com>
7 *
8 * Derived from Beagle Board and 3430 SDP code by
9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Syed Mohammed Khasim <khasim@ti.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28 #include <common.h>
29 #include <asm/io.h>
30 #include <asm/arch/mem.h> /* get mem tables */
31 #include <asm/arch/sys_proto.h>
32 #include <i2c.h>
33
34 extern omap3_sysinfo sysinfo;
35 static struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
36 static char *rev_s[CPU_3XX_MAX_REV] = {
37 "1.0",
38 "2.0",
39 "2.1",
40 "3.0",
41 "3.1"};
42
43 /*****************************************************************
44 * dieid_num_r(void) - read and set die ID
45 *****************************************************************/
dieid_num_r(void)46 void dieid_num_r(void)
47 {
48 struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
49 char *uid_s, die_id[34];
50 u32 id[4];
51
52 memset(die_id, 0, sizeof(die_id));
53
54 uid_s = getenv("dieid#");
55
56 if (uid_s == NULL) {
57 id[3] = readl(&id_base->die_id_0);
58 id[2] = readl(&id_base->die_id_1);
59 id[1] = readl(&id_base->die_id_2);
60 id[0] = readl(&id_base->die_id_3);
61 sprintf(die_id, "%08x%08x%08x%08x", id[0], id[1], id[2], id[3]);
62 setenv("dieid#", die_id);
63 uid_s = die_id;
64 }
65
66 printf("Die ID #%s\n", uid_s);
67 }
68
69 /******************************************
70 * get_cpu_type(void) - extract cpu info
71 ******************************************/
get_cpu_type(void)72 u32 get_cpu_type(void)
73 {
74 return readl(&ctrl_base->ctrl_omap_stat);
75 }
76
77 /******************************************
78 * get_cpu_rev(void) - extract version info
79 ******************************************/
get_cpu_rev(void)80 u32 get_cpu_rev(void)
81 {
82 u32 cpuid = 0;
83 struct ctrl_id *id_base;
84
85 /*
86 * On ES1.0 the IDCODE register is not exposed on L4
87 * so using CPU ID to differentiate between ES1.0 and > ES1.0.
88 */
89 __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r"(cpuid));
90 if ((cpuid & 0xf) == 0x0)
91 return CPU_3XX_ES10;
92 else {
93 /* Decode the IDs on > ES1.0 */
94 id_base = (struct ctrl_id *) OMAP34XX_ID_L4_IO_BASE;
95
96 cpuid = (readl(&id_base->idcode) >> CPU_3XX_ID_SHIFT) & 0xf;
97
98 /* Some early ES2.0 seem to report ID 0, fix this */
99 if(cpuid == 0)
100 cpuid = CPU_3XX_ES20;
101
102 return cpuid;
103 }
104 }
105
106 /***************************************************************************
107 * get_gpmc0_base() - Return current address hardware will be
108 * fetching from. The below effectively gives what is correct, its a bit
109 * mis-leading compared to the TRM. For the most general case the mask
110 * needs to be also taken into account this does work in practice.
111 * - for u-boot we currently map:
112 * -- 0 to nothing,
113 * -- 4 to flash
114 * -- 8 to enent
115 * -- c to wifi
116 ****************************************************************************/
get_gpmc0_base(void)117 u32 get_gpmc0_base(void)
118 {
119 u32 b;
120
121 b = readl(&gpmc_cfg->cs[0].config7);
122 b &= 0x1F; /* keep base [5:0] */
123 b = b << 24; /* ret 0x0b000000 */
124 return b;
125 }
126
127 /*******************************************************************
128 * get_gpmc0_width() - See if bus is in x8 or x16 (mainly for nand)
129 *******************************************************************/
get_gpmc0_width(void)130 u32 get_gpmc0_width(void)
131 {
132 return WIDTH_16BIT;
133 }
134
135 /*************************************************************************
136 * get_board_rev() - setup to pass kernel board revision information
137 * returns:(bit[0-3] sub version, higher bit[7-4] is higher version)
138 *************************************************************************/
get_board_rev(void)139 u32 get_board_rev(void)
140 {
141 return 0x20;
142 }
143
144 /********************************************************
145 * get_base(); get upper addr of current execution
146 *******************************************************/
get_base(void)147 u32 get_base(void)
148 {
149 u32 val;
150
151 __asm__ __volatile__("mov %0, pc \n":"=r"(val)::"memory");
152 val &= 0xF0000000;
153 val >>= 28;
154 return val;
155 }
156
157 /********************************************************
158 * is_running_in_flash() - tell if currently running in
159 * FLASH.
160 *******************************************************/
is_running_in_flash(void)161 u32 is_running_in_flash(void)
162 {
163 if (get_base() < 4)
164 return 1; /* in FLASH */
165
166 return 0; /* running in SRAM or SDRAM */
167 }
168
169 /********************************************************
170 * is_running_in_sram() - tell if currently running in
171 * SRAM.
172 *******************************************************/
is_running_in_sram(void)173 u32 is_running_in_sram(void)
174 {
175 if (get_base() == 4)
176 return 1; /* in SRAM */
177
178 return 0; /* running in FLASH or SDRAM */
179 }
180
181 /********************************************************
182 * is_running_in_sdram() - tell if currently running in
183 * SDRAM.
184 *******************************************************/
is_running_in_sdram(void)185 u32 is_running_in_sdram(void)
186 {
187 if (get_base() > 4)
188 return 1; /* in SDRAM */
189
190 return 0; /* running in SRAM or FLASH */
191 }
192
193 /***************************************************************
194 * get_boot_type() - Is this an XIP type device or a stream one
195 * bits 4-0 specify type. Bit 5 says mem/perif
196 ***************************************************************/
get_boot_type(void)197 u32 get_boot_type(void)
198 {
199 return (readl(&ctrl_base->status) & SYSBOOT_MASK);
200 }
201
202 /*************************************************************
203 * get_device_type(): tell if GP/HS/EMU/TST
204 *************************************************************/
get_device_type(void)205 u32 get_device_type(void)
206 {
207 return ((readl(&ctrl_base->status) & (DEVICE_MASK)) >> 8);
208 }
209
210 #ifdef CONFIG_DISPLAY_CPUINFO
211 /**
212 * Print CPU information
213 */
print_cpuinfo(void)214 int print_cpuinfo (void)
215 {
216 char *cpu_s, *sec_s;
217
218 switch (get_cpu_type()) {
219 case OMAP3503:
220 cpu_s = "3503";
221 break;
222 case OMAP3515:
223 cpu_s = "3515";
224 break;
225 case OMAP3525:
226 cpu_s = "3525";
227 break;
228 case OMAP3530:
229 cpu_s = "3530";
230 break;
231 default:
232 cpu_s = "35XX";
233 break;
234 }
235
236 switch (get_device_type()) {
237 case TST_DEVICE:
238 sec_s = "TST";
239 break;
240 case EMU_DEVICE:
241 sec_s = "EMU";
242 break;
243 case HS_DEVICE:
244 sec_s = "HS";
245 break;
246 case GP_DEVICE:
247 sec_s = "GP";
248 break;
249 default:
250 sec_s = "?";
251 }
252
253 printf("OMAP%s-%s ES%s, CPU-OPP2 L3-165MHz\n",
254 cpu_s, sec_s, rev_s[get_cpu_rev()]);
255
256 return 0;
257 }
258 #endif /* CONFIG_DISPLAY_CPUINFO */
259