1 /*
2 * PowerPC ISAV3 BookS emulation generic mmu helpers for qemu.
3 *
4 * Copyright (c) 2017 Suraj Jitindar Singh, IBM Corporation
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #include "qemu/osdep.h"
21 #include "cpu.h"
22 #include "mmu-book3s-v3.h"
23
ppc64_v3_handle_mmu_fault(PowerPCCPU * cpu,vaddr eaddr,int rwx,int mmu_idx)24 int ppc64_v3_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx,
25 int mmu_idx)
26 {
27 if (ppc64_v3_radix(cpu)) { /* Guest uses radix */
28 return ppc_radix64_handle_mmu_fault(cpu, eaddr, rwx, mmu_idx);
29 } else { /* Guest uses hash */
30 return ppc_hash64_handle_mmu_fault(cpu, eaddr, rwx, mmu_idx);
31 }
32 }
33
ppc64_v3_get_phys_page_debug(PowerPCCPU * cpu,vaddr eaddr)34 hwaddr ppc64_v3_get_phys_page_debug(PowerPCCPU *cpu, vaddr eaddr)
35 {
36 if (ppc64_v3_radix(cpu)) {
37 return ppc_radix64_get_phys_page_debug(cpu, eaddr);
38 } else {
39 return ppc_hash64_get_phys_page_debug(cpu, eaddr);
40 }
41 }
42
ppc64_v3_get_pate(PowerPCCPU * cpu,target_ulong lpid,ppc_v3_pate_t * entry)43 bool ppc64_v3_get_pate(PowerPCCPU *cpu, target_ulong lpid, ppc_v3_pate_t *entry)
44 {
45 uint64_t patb = cpu->env.spr[SPR_PTCR] & PTCR_PATB;
46 uint64_t pats = cpu->env.spr[SPR_PTCR] & PTCR_PATS;
47
48 /* Calculate number of entries */
49 pats = 1ull << (pats + 12 - 4);
50 if (pats <= lpid) {
51 return false;
52 }
53
54 /* Grab entry */
55 patb += 16 * lpid;
56 entry->dw0 = ldq_phys(CPU(cpu)->as, patb);
57 entry->dw1 = ldq_phys(CPU(cpu)->as, patb + 8);
58 return true;
59 }
60
61