1
2 /*
3 * QEMU OldWorld PowerMac (currently ~G3 Beige) hardware System Emulator
4 *
5 * Copyright (c) 2004-2007 Fabrice Bellard
6 * Copyright (c) 2007 Jocelyn Mayer
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
25 */
26
27 #include "qemu/osdep.h"
28 #include "qemu-common.h"
29 #include "qemu/units.h"
30 #include "qapi/error.h"
31 #include "hw/ppc/ppc.h"
32 #include "hw/qdev-properties.h"
33 #include "mac.h"
34 #include "hw/input/adb.h"
35 #include "sysemu/sysemu.h"
36 #include "net/net.h"
37 #include "hw/isa/isa.h"
38 #include "hw/pci/pci.h"
39 #include "hw/pci/pci_host.h"
40 #include "hw/boards.h"
41 #include "hw/nvram/fw_cfg.h"
42 #include "hw/char/escc.h"
43 #include "hw/misc/macio/macio.h"
44 #include "hw/ide.h"
45 #include "hw/loader.h"
46 #include "hw/fw-path-provider.h"
47 #include "elf.h"
48 #include "qemu/error-report.h"
49 #include "sysemu/kvm.h"
50 #include "sysemu/reset.h"
51 #include "kvm_ppc.h"
52 #include "exec/address-spaces.h"
53
54 #define MAX_IDE_BUS 2
55 #define CFG_ADDR 0xf0000510
56 #define TBFREQ 16600000UL
57 #define CLOCKFREQ 266000000UL
58 #define BUSFREQ 66000000UL
59
60 #define NDRV_VGA_FILENAME "qemu_vga.ndrv"
61
62 #define GRACKLE_BASE 0xfec00000
63
64 /* FreeBSD headers define this */
65 #ifdef round_page
66 #undef round_page
67 #endif
68
fw_cfg_boot_set(void * opaque,const char * boot_device,Error ** errp)69 static void fw_cfg_boot_set(void *opaque, const char *boot_device,
70 Error **errp)
71 {
72 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
73 }
74
translate_kernel_address(void * opaque,uint64_t addr)75 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
76 {
77 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
78 }
79
ppc_heathrow_reset(void * opaque)80 static void ppc_heathrow_reset(void *opaque)
81 {
82 PowerPCCPU *cpu = opaque;
83
84 cpu_reset(CPU(cpu));
85 }
86
ppc_heathrow_init(MachineState * machine)87 static void ppc_heathrow_init(MachineState *machine)
88 {
89 ram_addr_t ram_size = machine->ram_size;
90 const char *kernel_filename = machine->kernel_filename;
91 const char *kernel_cmdline = machine->kernel_cmdline;
92 const char *initrd_filename = machine->initrd_filename;
93 const char *boot_device = machine->boot_order;
94 MemoryRegion *sysmem = get_system_memory();
95 PowerPCCPU *cpu = NULL;
96 CPUPPCState *env = NULL;
97 char *filename;
98 int linux_boot, i;
99 MemoryRegion *ram = g_new(MemoryRegion, 1);
100 MemoryRegion *bios = g_new(MemoryRegion, 1);
101 uint32_t kernel_base, initrd_base, cmdline_base = 0;
102 int32_t kernel_size, initrd_size;
103 PCIBus *pci_bus;
104 OldWorldMacIOState *macio;
105 MACIOIDEState *macio_ide;
106 SysBusDevice *s;
107 DeviceState *dev, *pic_dev;
108 BusState *adb_bus;
109 int bios_size;
110 unsigned int smp_cpus = machine->smp.cpus;
111 uint16_t ppc_boot_device;
112 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
113 void *fw_cfg;
114 uint64_t tbfreq;
115
116 linux_boot = (kernel_filename != NULL);
117
118 /* init CPUs */
119 for (i = 0; i < smp_cpus; i++) {
120 cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
121 env = &cpu->env;
122
123 /* Set time-base frequency to 16.6 Mhz */
124 cpu_ppc_tb_init(env, TBFREQ);
125 qemu_register_reset(ppc_heathrow_reset, cpu);
126 }
127
128 /* allocate RAM */
129 if (ram_size > 2047 * MiB) {
130 error_report("Too much memory for this machine: %" PRId64 " MB, "
131 "maximum 2047 MB", ram_size / MiB);
132 exit(1);
133 }
134
135 memory_region_allocate_system_memory(ram, NULL, "ppc_heathrow.ram",
136 ram_size);
137 memory_region_add_subregion(sysmem, 0, ram);
138
139 /* allocate and load BIOS */
140 memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE,
141 &error_fatal);
142
143 if (bios_name == NULL)
144 bios_name = PROM_FILENAME;
145 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
146 memory_region_set_readonly(bios, true);
147 memory_region_add_subregion(sysmem, PROM_ADDR, bios);
148
149 /* Load OpenBIOS (ELF) */
150 if (filename) {
151 bios_size = load_elf(filename, NULL, 0, NULL, NULL, NULL, NULL,
152 1, PPC_ELF_MACHINE, 0, 0);
153 g_free(filename);
154 } else {
155 bios_size = -1;
156 }
157 if (bios_size < 0 || bios_size > BIOS_SIZE) {
158 error_report("could not load PowerPC bios '%s'", bios_name);
159 exit(1);
160 }
161
162 if (linux_boot) {
163 uint64_t lowaddr = 0;
164 int bswap_needed;
165
166 #ifdef BSWAP_NEEDED
167 bswap_needed = 1;
168 #else
169 bswap_needed = 0;
170 #endif
171 kernel_base = KERNEL_LOAD_ADDR;
172 kernel_size = load_elf(kernel_filename, NULL,
173 translate_kernel_address, NULL,
174 NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE,
175 0, 0);
176 if (kernel_size < 0)
177 kernel_size = load_aout(kernel_filename, kernel_base,
178 ram_size - kernel_base, bswap_needed,
179 TARGET_PAGE_SIZE);
180 if (kernel_size < 0)
181 kernel_size = load_image_targphys(kernel_filename,
182 kernel_base,
183 ram_size - kernel_base);
184 if (kernel_size < 0) {
185 error_report("could not load kernel '%s'", kernel_filename);
186 exit(1);
187 }
188 /* load initrd */
189 if (initrd_filename) {
190 initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
191 initrd_size = load_image_targphys(initrd_filename, initrd_base,
192 ram_size - initrd_base);
193 if (initrd_size < 0) {
194 error_report("could not load initial ram disk '%s'",
195 initrd_filename);
196 exit(1);
197 }
198 cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size);
199 } else {
200 initrd_base = 0;
201 initrd_size = 0;
202 cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
203 }
204 ppc_boot_device = 'm';
205 } else {
206 kernel_base = 0;
207 kernel_size = 0;
208 initrd_base = 0;
209 initrd_size = 0;
210 ppc_boot_device = '\0';
211 for (i = 0; boot_device[i] != '\0'; i++) {
212 /* TOFIX: for now, the second IDE channel is not properly
213 * used by OHW. The Mac floppy disk are not emulated.
214 * For now, OHW cannot boot from the network.
215 */
216 #if 0
217 if (boot_device[i] >= 'a' && boot_device[i] <= 'f') {
218 ppc_boot_device = boot_device[i];
219 break;
220 }
221 #else
222 if (boot_device[i] >= 'c' && boot_device[i] <= 'd') {
223 ppc_boot_device = boot_device[i];
224 break;
225 }
226 #endif
227 }
228 if (ppc_boot_device == '\0') {
229 error_report("No valid boot device for G3 Beige machine");
230 exit(1);
231 }
232 }
233
234 /* XXX: we register only 1 output pin for heathrow PIC */
235 pic_dev = qdev_create(NULL, TYPE_HEATHROW);
236 qdev_init_nofail(pic_dev);
237
238 /* Connect the heathrow PIC outputs to the 6xx bus */
239 for (i = 0; i < smp_cpus; i++) {
240 switch (PPC_INPUT(env)) {
241 case PPC_FLAGS_INPUT_6xx:
242 qdev_connect_gpio_out(pic_dev, 0,
243 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]);
244 break;
245 default:
246 error_report("Bus model not supported on OldWorld Mac machine");
247 exit(1);
248 }
249 }
250
251 /* Timebase Frequency */
252 if (kvm_enabled()) {
253 tbfreq = kvmppc_get_tbfreq();
254 } else {
255 tbfreq = TBFREQ;
256 }
257
258 /* init basic PC hardware */
259 if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
260 error_report("Only 6xx bus is supported on heathrow machine");
261 exit(1);
262 }
263
264 /* Grackle PCI host bridge */
265 dev = qdev_create(NULL, TYPE_GRACKLE_PCI_HOST_BRIDGE);
266 qdev_prop_set_uint32(dev, "ofw-addr", 0x80000000);
267 object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
268 &error_abort);
269 qdev_init_nofail(dev);
270 s = SYS_BUS_DEVICE(dev);
271 sysbus_mmio_map(s, 0, GRACKLE_BASE);
272 sysbus_mmio_map(s, 1, GRACKLE_BASE + 0x200000);
273 /* PCI hole */
274 memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
275 sysbus_mmio_get_region(s, 2));
276 /* Register 2 MB of ISA IO space */
277 memory_region_add_subregion(get_system_memory(), 0xfe000000,
278 sysbus_mmio_get_region(s, 3));
279
280 pci_bus = PCI_HOST_BRIDGE(dev)->bus;
281
282 pci_vga_init(pci_bus);
283
284 for (i = 0; i < nb_nics; i++) {
285 pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL);
286 }
287
288 ide_drive_get(hd, ARRAY_SIZE(hd));
289
290 /* MacIO */
291 macio = OLDWORLD_MACIO(pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO));
292 dev = DEVICE(macio);
293 qdev_prop_set_uint64(dev, "frequency", tbfreq);
294 object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic",
295 &error_abort);
296 qdev_init_nofail(dev);
297
298 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
299 "ide[0]"));
300 macio_ide_init_drives(macio_ide, hd);
301
302 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
303 "ide[1]"));
304 macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
305
306 dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
307 adb_bus = qdev_get_child_bus(dev, "adb.0");
308 dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD);
309 qdev_init_nofail(dev);
310 dev = qdev_create(adb_bus, TYPE_ADB_MOUSE);
311 qdev_init_nofail(dev);
312
313 if (machine_usb(machine)) {
314 pci_create_simple(pci_bus, -1, "pci-ohci");
315 }
316
317 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
318 graphic_depth = 15;
319
320 /* No PCI init: the BIOS will do it */
321
322 dev = qdev_create(NULL, TYPE_FW_CFG_MEM);
323 fw_cfg = FW_CFG(dev);
324 qdev_prop_set_uint32(dev, "data_width", 1);
325 qdev_prop_set_bit(dev, "dma_enabled", false);
326 object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG,
327 OBJECT(fw_cfg), NULL);
328 qdev_init_nofail(dev);
329 s = SYS_BUS_DEVICE(dev);
330 sysbus_mmio_map(s, 0, CFG_ADDR);
331 sysbus_mmio_map(s, 1, CFG_ADDR + 2);
332
333 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
334 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
335 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
336 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
337 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
338 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
339 if (kernel_cmdline) {
340 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
341 pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
342 } else {
343 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
344 }
345 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
346 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
347 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
348
349 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
350 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
351 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
352
353 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
354 if (kvm_enabled()) {
355 uint8_t *hypercall;
356
357 hypercall = g_malloc(16);
358 kvmppc_get_hypercall(env, hypercall, 16);
359 fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
360 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
361 }
362 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq);
363 /* Mac OS X requires a "known good" clock-frequency value; pass it one. */
364 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ);
365 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
366
367 /* MacOS NDRV VGA driver */
368 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME);
369 if (filename) {
370 gchar *ndrv_file;
371 gsize ndrv_size;
372
373 if (g_file_get_contents(filename, &ndrv_file, &ndrv_size, NULL)) {
374 fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size);
375 }
376 g_free(filename);
377 }
378
379 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
380 }
381
382 /*
383 * Implementation of an interface to adjust firmware path
384 * for the bootindex property handling.
385 */
heathrow_fw_dev_path(FWPathProvider * p,BusState * bus,DeviceState * dev)386 static char *heathrow_fw_dev_path(FWPathProvider *p, BusState *bus,
387 DeviceState *dev)
388 {
389 PCIDevice *pci;
390 IDEBus *ide_bus;
391 IDEState *ide_s;
392 MACIOIDEState *macio_ide;
393
394 if (!strcmp(object_get_typename(OBJECT(dev)), "macio-oldworld")) {
395 pci = PCI_DEVICE(dev);
396 return g_strdup_printf("mac-io@%x", PCI_SLOT(pci->devfn));
397 }
398
399 if (!strcmp(object_get_typename(OBJECT(dev)), "macio-ide")) {
400 macio_ide = MACIO_IDE(dev);
401 return g_strdup_printf("ata-3@%x", macio_ide->addr);
402 }
403
404 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-drive")) {
405 ide_bus = IDE_BUS(qdev_get_parent_bus(dev));
406 ide_s = idebus_active_if(ide_bus);
407
408 if (ide_s->drive_kind == IDE_CD) {
409 return g_strdup("cdrom");
410 }
411
412 return g_strdup("disk");
413 }
414
415 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-hd")) {
416 return g_strdup("disk");
417 }
418
419 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-cd")) {
420 return g_strdup("cdrom");
421 }
422
423 if (!strcmp(object_get_typename(OBJECT(dev)), "virtio-blk-device")) {
424 return g_strdup("disk");
425 }
426
427 return NULL;
428 }
429
heathrow_kvm_type(MachineState * machine,const char * arg)430 static int heathrow_kvm_type(MachineState *machine, const char *arg)
431 {
432 /* Always force PR KVM */
433 return 2;
434 }
435
heathrow_class_init(ObjectClass * oc,void * data)436 static void heathrow_class_init(ObjectClass *oc, void *data)
437 {
438 MachineClass *mc = MACHINE_CLASS(oc);
439 FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
440
441 mc->desc = "Heathrow based PowerMAC";
442 mc->init = ppc_heathrow_init;
443 mc->block_default_type = IF_IDE;
444 mc->max_cpus = MAX_CPUS;
445 #ifndef TARGET_PPC64
446 mc->is_default = 1;
447 #endif
448 /* TOFIX "cad" when Mac floppy is implemented */
449 mc->default_boot_order = "cd";
450 mc->kvm_type = heathrow_kvm_type;
451 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("750_v3.1");
452 mc->default_display = "std";
453 mc->ignore_boot_device_suffixes = true;
454 fwc->get_dev_path = heathrow_fw_dev_path;
455 }
456
457 static const TypeInfo ppc_heathrow_machine_info = {
458 .name = MACHINE_TYPE_NAME("g3beige"),
459 .parent = TYPE_MACHINE,
460 .class_init = heathrow_class_init,
461 .interfaces = (InterfaceInfo[]) {
462 { TYPE_FW_PATH_PROVIDER },
463 { }
464 },
465 };
466
ppc_heathrow_register_types(void)467 static void ppc_heathrow_register_types(void)
468 {
469 type_register_static(&ppc_heathrow_machine_info);
470 }
471
472 type_init(ppc_heathrow_register_types);
473