1 /** @file
2 
3   Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
4   SPDX-License-Identifier: BSD-2-Clause-Patent
5 
6 **/
7 
8 #ifndef _CACHE_LIB_INTERNAL_H_
9 #define _CACHE_LIB_INTERNAL_H_
10 
11 #define EFI_MSR_CACHE_VARIABLE_MTRR_BASE       0x00000200
12 #define EFI_MSR_CACHE_VARIABLE_MTRR_END        0x0000020F
13 #define   V_EFI_FIXED_MTRR_NUMBER                                      11
14 
15 #define EFI_MSR_IA32_MTRR_FIX64K_00000         0x00000250
16 #define EFI_MSR_IA32_MTRR_FIX16K_80000         0x00000258
17 #define EFI_MSR_IA32_MTRR_FIX16K_A0000         0x00000259
18 #define EFI_MSR_IA32_MTRR_FIX4K_C0000          0x00000268
19 #define EFI_MSR_IA32_MTRR_FIX4K_C8000          0x00000269
20 #define EFI_MSR_IA32_MTRR_FIX4K_D0000          0x0000026A
21 #define EFI_MSR_IA32_MTRR_FIX4K_D8000          0x0000026B
22 #define EFI_MSR_IA32_MTRR_FIX4K_E0000          0x0000026C
23 #define EFI_MSR_IA32_MTRR_FIX4K_E8000          0x0000026D
24 #define EFI_MSR_IA32_MTRR_FIX4K_F0000          0x0000026E
25 #define EFI_MSR_IA32_MTRR_FIX4K_F8000          0x0000026F
26 #define EFI_MSR_CACHE_IA32_MTRR_DEF_TYPE       0x000002FF
27 #define   B_EFI_MSR_CACHE_MTRR_VALID                                   BIT11
28 #define   B_EFI_MSR_GLOBAL_MTRR_ENABLE                                 BIT11
29 #define   B_EFI_MSR_FIXED_MTRR_ENABLE                                  BIT10
30 #define   B_EFI_MSR_CACHE_MEMORY_TYPE                                  (BIT2 | BIT1 | BIT0)
31 
32 #define EFI_MSR_VALID_MASK                     0xFFFFFFFFF
33 #define EFI_CACHE_VALID_ADDRESS                0xFFFFFF000
34 #define EFI_SMRR_CACHE_VALID_ADDRESS           0xFFFFF000
35 #define EFI_CACHE_VALID_EXTENDED_ADDRESS       0xFFFFFFFFFF000
36 
37 // Leave one MTRR pairs for OS use
38 #define EFI_CACHE_NUM_VAR_MTRR_PAIRS_FOR_OS   1
39 #define EFI_CACHE_LAST_VARIABLE_MTRR_FOR_BIOS (EFI_MSR_CACHE_VARIABLE_MTRR_END) - \
40         (EFI_CACHE_NUM_VAR_MTRR_PAIRS_FOR_OS * 2)
41 
42 #define EFI_MSR_IA32_MTRR_CAP                  0x000000FE
43 #define   B_EFI_MSR_IA32_MTRR_CAP_EMRR_SUPPORT                         BIT12
44 #define   B_EFI_MSR_IA32_MTRR_CAP_SMRR_SUPPORT                         BIT11
45 #define   B_EFI_MSR_IA32_MTRR_CAP_WC_SUPPORT                           BIT10
46 #define   B_EFI_MSR_IA32_MTRR_CAP_FIXED_SUPPORT                        BIT8
47 #define   B_EFI_MSR_IA32_MTRR_CAP_VARIABLE_SUPPORT                     (BIT7 | BIT6 | BIT5 | BIT4 | BIT3 | BIT2 | BIT1 | BIT0)
48 
49 #define CPUID_VIR_PHY_ADDRESS_SIZE                                    0x80000008
50 #define CPUID_EXTENDED_FUNCTION                                       0x80000000
51 
52 #endif
53 
54