1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  *  Copyright (C) 2010 Samsung Electronics
4  *  Minkyu Kang <mk7.kang@samsung.com>
5  *  Kyungmin Park <kyungmin.park@samsung.com>
6  */
7 
8 #include <common.h>
9 #include <spi.h>
10 #include <lcd.h>
11 #include <asm/io.h>
12 #include <asm/gpio.h>
13 #include <asm/arch/adc.h>
14 #include <asm/arch/pinmux.h>
15 #include <asm/arch/watchdog.h>
16 #include <ld9040.h>
17 #include <power/pmic.h>
18 #include <usb.h>
19 #include <usb/dwc2_udc.h>
20 #include <asm/arch/cpu.h>
21 #include <power/max8998_pmic.h>
22 #include <libtizen.h>
23 #include <samsung/misc.h>
24 #include <usb_mass_storage.h>
25 #include <asm/mach-types.h>
26 
27 DECLARE_GLOBAL_DATA_PTR;
28 
29 unsigned int board_rev;
30 static int init_pmic_lcd(void);
31 
get_board_rev(void)32 u32 get_board_rev(void)
33 {
34 	return board_rev;
35 }
36 
exynos_power_init(void)37 int exynos_power_init(void)
38 {
39 	return init_pmic_lcd();
40 }
41 
get_hwrev(void)42 static int get_hwrev(void)
43 {
44 	return board_rev & 0xFF;
45 }
46 
get_adc_value(int channel)47 static unsigned short get_adc_value(int channel)
48 {
49 	struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
50 	unsigned short ret = 0;
51 	unsigned int reg;
52 	unsigned int loop = 0;
53 
54 	writel(channel & 0xF, &adc->adcmux);
55 	writel((1 << 14) | (49 << 6), &adc->adccon);
56 	writel(1000 & 0xffff, &adc->adcdly);
57 	writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
58 	udelay(10);
59 	writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
60 	udelay(10);
61 
62 	do {
63 		udelay(1);
64 		reg = readl(&adc->adccon);
65 	} while (!(reg & (1 << 15)) && (loop++ < 1000));
66 
67 	ret = readl(&adc->adcdat0) & 0xFFF;
68 
69 	return ret;
70 }
71 
adc_power_control(int on)72 static int adc_power_control(int on)
73 {
74 	struct udevice *dev;
75 	int ret;
76 	u8 reg;
77 
78 	ret = pmic_get("max8998-pmic", &dev);
79 	if (ret) {
80 		puts("Failed to get MAX8998!\n");
81 		return ret;
82 	}
83 
84 	reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
85 	if (on)
86 		reg |= MAX8998_LDO4;
87 	else
88 		reg &= ~MAX8998_LDO4;
89 
90 	ret = pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
91 	if (ret) {
92 		puts("MAX8998 LDO setting error\n");
93 		return -EINVAL;
94 	}
95 
96 	return 0;
97 }
98 
get_hw_revision(void)99 static unsigned int get_hw_revision(void)
100 {
101 	int hwrev, mode0, mode1;
102 
103 	adc_power_control(1);
104 
105 	mode0 = get_adc_value(1);		/* HWREV_MODE0 */
106 	mode1 = get_adc_value(2);		/* HWREV_MODE1 */
107 
108 	/*
109 	 * XXX Always set the default hwrev as the latest board
110 	 * ADC = (voltage) / 3.3 * 4096
111 	 */
112 	hwrev = 3;
113 
114 #define IS_RANGE(x, min, max)	((x) > (min) && (x) < (max))
115 	if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
116 		hwrev = 0x0;		/* 0.01V	0.01V */
117 	if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
118 		hwrev = 0x1;		/* 610mV	0.01V */
119 	if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
120 		hwrev = 0x2;		/* 1.16V	0.01V */
121 	if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
122 		hwrev = 0x3;		/* 1.79V	0.01V */
123 #undef IS_RANGE
124 
125 	debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
126 
127 	adc_power_control(0);
128 
129 	return hwrev;
130 }
131 
check_hw_revision(void)132 static void check_hw_revision(void)
133 {
134 	int hwrev;
135 
136 	hwrev = get_hw_revision();
137 
138 	board_rev |= hwrev;
139 }
140 
141 #ifdef CONFIG_USB_GADGET
s5pc210_phy_control(int on)142 static int s5pc210_phy_control(int on)
143 {
144 	struct udevice *dev;
145 	int ret;
146 	u8 reg;
147 
148 	ret = pmic_get("max8998-pmic", &dev);
149 	if (ret) {
150 		puts("Failed to get MAX8998!\n");
151 		return ret;
152 	}
153 
154 	if (on) {
155 		reg = pmic_reg_read(dev, MAX8998_REG_BUCK_ACTIVE_DISCHARGE3);
156 		reg |= MAX8998_SAFEOUT1;
157 		ret |= pmic_reg_write(dev,
158 			MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, reg);
159 
160 		reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
161 		reg |= MAX8998_LDO3;
162 		ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
163 
164 		reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
165 		reg |= MAX8998_LDO8;
166 		ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
167 
168 	} else {
169 		reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
170 		reg &= ~MAX8998_LDO8;
171 		ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
172 
173 		reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
174 		reg &= ~MAX8998_LDO3;
175 		ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
176 
177 		reg = pmic_reg_read(dev, MAX8998_REG_BUCK_ACTIVE_DISCHARGE3);
178 		reg &= ~MAX8998_SAFEOUT1;
179 		ret |= pmic_reg_write(dev,
180 			MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, reg);
181 	}
182 
183 	if (ret) {
184 		puts("MAX8998 LDO setting error!\n");
185 		return -EINVAL;
186 	}
187 
188 	return 0;
189 }
190 
191 struct dwc2_plat_otg_data s5pc210_otg_data = {
192 	.phy_control = s5pc210_phy_control,
193 	.regs_phy = EXYNOS4_USBPHY_BASE,
194 	.regs_otg = EXYNOS4_USBOTG_BASE,
195 	.usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
196 	.usb_flags = PHY0_SLEEP,
197 };
198 #endif
199 
board_usb_init(int index,enum usb_init_type init)200 int board_usb_init(int index, enum usb_init_type init)
201 {
202 	debug("USB_udc_probe\n");
203 	return dwc2_udc_probe(&s5pc210_otg_data);
204 }
205 
exynos_early_init_f(void)206 int exynos_early_init_f(void)
207 {
208 	wdt_stop();
209 
210 	return 0;
211 }
212 
init_pmic_lcd(void)213 static int init_pmic_lcd(void)
214 {
215 	struct udevice *dev;
216 	unsigned char val;
217 	int ret = 0;
218 
219 	ret = pmic_get("max8998-pmic", &dev);
220 	if (ret) {
221 		puts("Failed to get MAX8998 for init_pmic_lcd()!\n");
222 		return ret;
223 	}
224 
225 	/* LDO7 1.8V */
226 	val = 0x02; /* (1800 - 1600) / 100; */
227 	ret |= pmic_reg_write(dev,  MAX8998_REG_LDO7, val);
228 
229 	/* LDO17 3.0V */
230 	val = 0xe; /* (3000 - 1600) / 100; */
231 	ret |= pmic_reg_write(dev,  MAX8998_REG_LDO17, val);
232 
233 	/* Disable unneeded regulators */
234 	/*
235 	 * ONOFF1
236 	 * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
237 	 * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
238 	 */
239 	val = 0xB9;
240 	ret |= pmic_reg_write(dev,  MAX8998_REG_ONOFF1, val);
241 
242 	/* ONOFF2
243 	 * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
244 	 * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
245 	 */
246 	val = 0x50;
247 	ret |= pmic_reg_write(dev,  MAX8998_REG_ONOFF2, val);
248 
249 	/* ONOFF3
250 	 * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
251 	 * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
252 	 */
253 	val = 0x00;
254 	ret |= pmic_reg_write(dev,  MAX8998_REG_ONOFF3, val);
255 
256 	if (ret) {
257 		puts("LCD pmic initialisation error!\n");
258 		return -EINVAL;
259 	}
260 
261 	return 0;
262 }
263 
exynos_cfg_lcd_gpio(void)264 void exynos_cfg_lcd_gpio(void)
265 {
266 	unsigned int i, f3_end = 4;
267 
268 	for (i = 0; i < 8; i++) {
269 		/* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
270 		gpio_cfg_pin(EXYNOS4_GPIO_F00 + i, S5P_GPIO_FUNC(2));
271 		gpio_cfg_pin(EXYNOS4_GPIO_F10 + i, S5P_GPIO_FUNC(2));
272 		gpio_cfg_pin(EXYNOS4_GPIO_F20 + i, S5P_GPIO_FUNC(2));
273 		/* pull-up/down disable */
274 		gpio_set_pull(EXYNOS4_GPIO_F00 + i, S5P_GPIO_PULL_NONE);
275 		gpio_set_pull(EXYNOS4_GPIO_F10 + i, S5P_GPIO_PULL_NONE);
276 		gpio_set_pull(EXYNOS4_GPIO_F20 + i, S5P_GPIO_PULL_NONE);
277 
278 		/* drive strength to max (24bit) */
279 		gpio_set_drv(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_4X);
280 		gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
281 		gpio_set_drv(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_4X);
282 		gpio_set_rate(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_SLOW);
283 		gpio_set_drv(EXYNOS4_GPIO_F20 + i, S5P_GPIO_DRV_4X);
284 		gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
285 	}
286 
287 	for (i = EXYNOS4_GPIO_F30; i < (EXYNOS4_GPIO_F30 + f3_end); i++) {
288 		/* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
289 		gpio_cfg_pin(i, S5P_GPIO_FUNC(2));
290 		/* pull-up/down disable */
291 		gpio_set_pull(i, S5P_GPIO_PULL_NONE);
292 		/* drive strength to max (24bit) */
293 		gpio_set_drv(i, S5P_GPIO_DRV_4X);
294 		gpio_set_rate(i, S5P_GPIO_DRV_SLOW);
295 	}
296 
297 	/* gpio pad configuration for LCD reset. */
298 	gpio_request(EXYNOS4_GPIO_Y45, "lcd_reset");
299 	gpio_cfg_pin(EXYNOS4_GPIO_Y45, S5P_GPIO_OUTPUT);
300 }
301 
mipi_power(void)302 int mipi_power(void)
303 {
304 	return 0;
305 }
306 
exynos_reset_lcd(void)307 void exynos_reset_lcd(void)
308 {
309 	gpio_set_value(EXYNOS4_GPIO_Y45, 1);
310 	udelay(10000);
311 	gpio_set_value(EXYNOS4_GPIO_Y45, 0);
312 	udelay(10000);
313 	gpio_set_value(EXYNOS4_GPIO_Y45, 1);
314 	udelay(100);
315 }
316 
exynos_lcd_power_on(void)317 void exynos_lcd_power_on(void)
318 {
319 	struct udevice *dev;
320 	int ret;
321 	u8 reg;
322 
323 	ret = pmic_get("max8998-pmic", &dev);
324 	if (ret) {
325 		puts("Failed to get MAX8998!\n");
326 		return;
327 	}
328 
329 	reg = pmic_reg_read(dev, MAX8998_REG_ONOFF3);
330 	reg |= MAX8998_LDO17;
331 	ret = pmic_reg_write(dev, MAX8998_REG_ONOFF3, reg);
332 	if (ret) {
333 		puts("MAX8998 LDO setting error\n");
334 		return;
335 	}
336 
337 	reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
338 	reg |= MAX8998_LDO7;
339 	ret = pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
340 	if (ret) {
341 		puts("MAX8998 LDO setting error\n");
342 		return;
343 	}
344 }
345 
exynos_cfg_ldo(void)346 void exynos_cfg_ldo(void)
347 {
348 	ld9040_cfg_ldo();
349 }
350 
exynos_enable_ldo(unsigned int onoff)351 void exynos_enable_ldo(unsigned int onoff)
352 {
353 	ld9040_enable_ldo(onoff);
354 }
355 
exynos_init(void)356 int exynos_init(void)
357 {
358 	gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
359 
360 	switch (get_hwrev()) {
361 	case 0:
362 		/*
363 		 * Set the low to enable LDO_EN
364 		 * But when you use the test board for eMMC booting
365 		 * you should set it HIGH since it removes the inverter
366 		 */
367 		/* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
368 		gpio_request(EXYNOS4_GPIO_E36, "ldo_en");
369 		gpio_direction_output(EXYNOS4_GPIO_E36, 0);
370 		break;
371 	default:
372 		/*
373 		 * Default reset state is High and there's no inverter
374 		 * But set it as HIGH to ensure
375 		 */
376 		/* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
377 		gpio_request(EXYNOS4_GPIO_E13, "massmemory_en");
378 		gpio_direction_output(EXYNOS4_GPIO_E13, 1);
379 		break;
380 	}
381 
382 	check_hw_revision();
383 	printf("HW Revision:\t0x%x\n", board_rev);
384 
385 	return 0;
386 }
387 
388 #ifdef CONFIG_LCD
exynos_lcd_misc_init(vidinfo_t * vid)389 void exynos_lcd_misc_init(vidinfo_t *vid)
390 {
391 #ifdef CONFIG_TIZEN
392 	get_tizen_logo_info(vid);
393 #endif
394 
395 	/* for LD9040. */
396 	vid->pclk_name = 1;	/* MPLL */
397 	vid->sclk_div = 1;
398 
399 	env_set("lcdinfo", "lcd=ld9040");
400 }
401 #endif
402