1 #ifndef CAPSTONE_ENGINE_H 2 #define CAPSTONE_ENGINE_H 3 4 /* Capstone Disassembly Engine */ 5 /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2016 */ 6 7 #ifdef __cplusplus 8 extern "C" { 9 #endif 10 11 #include <stdarg.h> 12 13 #if defined(CAPSTONE_HAS_OSXKERNEL) 14 #include <libkern/libkern.h> 15 #else 16 #include <stdlib.h> 17 #include <stdio.h> 18 #endif 19 20 #include "platform.h" 21 22 #ifdef _MSC_VER 23 #pragma warning(disable:4201) 24 #pragma warning(disable:4100) 25 #define CAPSTONE_API __cdecl 26 #ifdef CAPSTONE_SHARED 27 #define CAPSTONE_EXPORT __declspec(dllexport) 28 #else // defined(CAPSTONE_STATIC) 29 #define CAPSTONE_EXPORT 30 #endif 31 #else 32 #define CAPSTONE_API 33 #if (defined(__GNUC__) || defined(__IBMC__)) && !defined(CAPSTONE_STATIC) 34 #define CAPSTONE_EXPORT __attribute__((visibility("default"))) 35 #else // defined(CAPSTONE_STATIC) 36 #define CAPSTONE_EXPORT 37 #endif 38 #endif 39 40 #if (defined(__GNUC__) || defined(__IBMC__)) 41 #define CAPSTONE_DEPRECATED __attribute__((deprecated)) 42 #elif defined(_MSC_VER) 43 #define CAPSTONE_DEPRECATED __declspec(deprecated) 44 #else 45 #pragma message("WARNING: You need to implement CAPSTONE_DEPRECATED for this compiler") 46 #define CAPSTONE_DEPRECATED 47 #endif 48 49 // Capstone API version 50 #define CS_API_MAJOR 5 51 #define CS_API_MINOR 0 52 53 // Version for bleeding edge code of the Github's "next" branch. 54 // Use this if you want the absolutely latest development code. 55 // This version number will be bumped up whenever we have a new major change. 56 #define CS_NEXT_VERSION 5 57 58 // Capstone package version 59 #define CS_VERSION_MAJOR CS_API_MAJOR 60 #define CS_VERSION_MINOR CS_API_MINOR 61 #define CS_VERSION_EXTRA 0 62 63 /// Macro to create combined version which can be compared to 64 /// result of cs_version() API. 65 #define CS_MAKE_VERSION(major, minor) ((major << 8) + minor) 66 67 /// Maximum size of an instruction mnemonic string. 68 #define CS_MNEMONIC_SIZE 32 69 70 // Handle using with all API 71 typedef size_t csh; 72 73 /// Architecture type 74 typedef enum cs_arch { 75 CS_ARCH_ARM = 0, ///< ARM architecture (including Thumb, Thumb-2) 76 CS_ARCH_ARM64, ///< ARM-64, also called AArch64 77 CS_ARCH_MIPS, ///< Mips architecture 78 CS_ARCH_X86, ///< X86 architecture (including x86 & x86-64) 79 CS_ARCH_PPC, ///< PowerPC architecture 80 CS_ARCH_SPARC, ///< Sparc architecture 81 CS_ARCH_SYSZ, ///< SystemZ architecture 82 CS_ARCH_XCORE, ///< XCore architecture 83 CS_ARCH_M68K, ///< 68K architecture 84 CS_ARCH_TMS320C64X, ///< TMS320C64x architecture 85 CS_ARCH_M680X, ///< 680X architecture 86 CS_ARCH_EVM, ///< Ethereum architecture 87 CS_ARCH_MOS65XX, ///< MOS65XX architecture (including MOS6502) 88 CS_ARCH_WASM, ///< WebAssembly architecture 89 CS_ARCH_BPF, ///< Berkeley Packet Filter architecture (including eBPF) 90 CS_ARCH_RISCV, ///< RISCV architecture 91 CS_ARCH_MAX, 92 CS_ARCH_ALL = 0xFFFF, // All architectures - for cs_support() 93 } cs_arch; 94 95 // Support value to verify diet mode of the engine. 96 // If cs_support(CS_SUPPORT_DIET) return True, the engine was compiled 97 // in diet mode. 98 #define CS_SUPPORT_DIET (CS_ARCH_ALL + 1) 99 100 // Support value to verify X86 reduce mode of the engine. 101 // If cs_support(CS_SUPPORT_X86_REDUCE) return True, the engine was compiled 102 // in X86 reduce mode. 103 #define CS_SUPPORT_X86_REDUCE (CS_ARCH_ALL + 2) 104 105 /// Mode type 106 typedef enum cs_mode { 107 CS_MODE_LITTLE_ENDIAN = 0, ///< little-endian mode (default mode) 108 CS_MODE_ARM = 0, ///< 32-bit ARM 109 CS_MODE_16 = 1 << 1, ///< 16-bit mode (X86) 110 CS_MODE_32 = 1 << 2, ///< 32-bit mode (X86) 111 CS_MODE_64 = 1 << 3, ///< 64-bit mode (X86, PPC) 112 CS_MODE_THUMB = 1 << 4, ///< ARM's Thumb mode, including Thumb-2 113 CS_MODE_MCLASS = 1 << 5, ///< ARM's Cortex-M series 114 CS_MODE_V8 = 1 << 6, ///< ARMv8 A32 encodings for ARM 115 CS_MODE_MICRO = 1 << 4, ///< MicroMips mode (MIPS) 116 CS_MODE_MIPS3 = 1 << 5, ///< Mips III ISA 117 CS_MODE_MIPS32R6 = 1 << 6, ///< Mips32r6 ISA 118 CS_MODE_MIPS2 = 1 << 7, ///< Mips II ISA 119 CS_MODE_V9 = 1 << 4, ///< SparcV9 mode (Sparc) 120 CS_MODE_QPX = 1 << 4, ///< Quad Processing eXtensions mode (PPC) 121 CS_MODE_SPE = 1 << 5, ///< Signal Processing Engine mode (PPC) 122 CS_MODE_BOOKE = 1 << 6, ///< Book-E mode (PPC) 123 CS_MODE_M68K_000 = 1 << 1, ///< M68K 68000 mode 124 CS_MODE_M68K_010 = 1 << 2, ///< M68K 68010 mode 125 CS_MODE_M68K_020 = 1 << 3, ///< M68K 68020 mode 126 CS_MODE_M68K_030 = 1 << 4, ///< M68K 68030 mode 127 CS_MODE_M68K_040 = 1 << 5, ///< M68K 68040 mode 128 CS_MODE_M68K_060 = 1 << 6, ///< M68K 68060 mode 129 CS_MODE_BIG_ENDIAN = 1 << 31, ///< big-endian mode 130 CS_MODE_MIPS32 = CS_MODE_32, ///< Mips32 ISA (Mips) 131 CS_MODE_MIPS64 = CS_MODE_64, ///< Mips64 ISA (Mips) 132 CS_MODE_M680X_6301 = 1 << 1, ///< M680X Hitachi 6301,6303 mode 133 CS_MODE_M680X_6309 = 1 << 2, ///< M680X Hitachi 6309 mode 134 CS_MODE_M680X_6800 = 1 << 3, ///< M680X Motorola 6800,6802 mode 135 CS_MODE_M680X_6801 = 1 << 4, ///< M680X Motorola 6801,6803 mode 136 CS_MODE_M680X_6805 = 1 << 5, ///< M680X Motorola/Freescale 6805 mode 137 CS_MODE_M680X_6808 = 1 << 6, ///< M680X Motorola/Freescale/NXP 68HC08 mode 138 CS_MODE_M680X_6809 = 1 << 7, ///< M680X Motorola 6809 mode 139 CS_MODE_M680X_6811 = 1 << 8, ///< M680X Motorola/Freescale/NXP 68HC11 mode 140 CS_MODE_M680X_CPU12 = 1 << 9, ///< M680X Motorola/Freescale/NXP CPU12 141 ///< used on M68HC12/HCS12 142 CS_MODE_M680X_HCS08 = 1 << 10, ///< M680X Freescale/NXP HCS08 mode 143 CS_MODE_BPF_CLASSIC = 0, ///< Classic BPF mode (default) 144 CS_MODE_BPF_EXTENDED = 1 << 0, ///< Extended BPF mode 145 CS_MODE_RISCV32 = 1 << 0, ///< RISCV RV32G 146 CS_MODE_RISCV64 = 1 << 1, ///< RISCV RV64G 147 CS_MODE_RISCVC = 1 << 2, ///< RISCV compressed instructure mode 148 CS_MODE_MOS65XX_6502 = 1 << 1, ///< MOS65XXX MOS 6502 149 CS_MODE_MOS65XX_65C02 = 1 << 2, ///< MOS65XXX WDC 65c02 150 CS_MODE_MOS65XX_W65C02 = 1 << 3, ///< MOS65XXX WDC W65c02 151 CS_MODE_MOS65XX_65816 = 1 << 4, ///< MOS65XXX WDC 65816, 8-bit m/x 152 CS_MODE_MOS65XX_65816_LONG_M = (1 << 5), ///< MOS65XXX WDC 65816, 16-bit m, 8-bit x 153 CS_MODE_MOS65XX_65816_LONG_X = (1 << 6), ///< MOS65XXX WDC 65816, 8-bit m, 16-bit x 154 CS_MODE_MOS65XX_65816_LONG_MX = CS_MODE_MOS65XX_65816_LONG_M | CS_MODE_MOS65XX_65816_LONG_X, 155 } cs_mode; 156 157 typedef void* (CAPSTONE_API *cs_malloc_t)(size_t size); 158 typedef void* (CAPSTONE_API *cs_calloc_t)(size_t nmemb, size_t size); 159 typedef void* (CAPSTONE_API *cs_realloc_t)(void *ptr, size_t size); 160 typedef void (CAPSTONE_API *cs_free_t)(void *ptr); 161 typedef int (CAPSTONE_API *cs_vsnprintf_t)(char *str, size_t size, const char *format, va_list ap); 162 163 164 /// User-defined dynamic memory related functions: malloc/calloc/realloc/free/vsnprintf() 165 /// By default, Capstone uses system's malloc(), calloc(), realloc(), free() & vsnprintf(). 166 typedef struct cs_opt_mem { 167 cs_malloc_t malloc; 168 cs_calloc_t calloc; 169 cs_realloc_t realloc; 170 cs_free_t free; 171 cs_vsnprintf_t vsnprintf; 172 } cs_opt_mem; 173 174 /// Customize mnemonic for instructions with alternative name. 175 /// To reset existing customized instruction to its default mnemonic, 176 /// call cs_option(CS_OPT_MNEMONIC) again with the same @id and NULL value 177 /// for @mnemonic. 178 typedef struct cs_opt_mnem { 179 /// ID of instruction to be customized. 180 unsigned int id; 181 /// Customized instruction mnemonic. 182 const char *mnemonic; 183 } cs_opt_mnem; 184 185 /// Runtime option for the disassembled engine 186 typedef enum cs_opt_type { 187 CS_OPT_INVALID = 0, ///< No option specified 188 CS_OPT_SYNTAX, ///< Assembly output syntax 189 CS_OPT_DETAIL, ///< Break down instruction structure into details 190 CS_OPT_MODE, ///< Change engine's mode at run-time 191 CS_OPT_MEM, ///< User-defined dynamic memory related functions 192 CS_OPT_SKIPDATA, ///< Skip data when disassembling. Then engine is in SKIPDATA mode. 193 CS_OPT_SKIPDATA_SETUP, ///< Setup user-defined function for SKIPDATA option 194 CS_OPT_MNEMONIC, ///< Customize instruction mnemonic 195 CS_OPT_UNSIGNED, ///< print immediate operands in unsigned form 196 } cs_opt_type; 197 198 /// Runtime option value (associated with option type above) 199 typedef enum cs_opt_value { 200 CS_OPT_OFF = 0, ///< Turn OFF an option - default for CS_OPT_DETAIL, CS_OPT_SKIPDATA, CS_OPT_UNSIGNED. 201 CS_OPT_ON = 3, ///< Turn ON an option (CS_OPT_DETAIL, CS_OPT_SKIPDATA). 202 CS_OPT_SYNTAX_DEFAULT = 0, ///< Default asm syntax (CS_OPT_SYNTAX). 203 CS_OPT_SYNTAX_INTEL, ///< X86 Intel asm syntax - default on X86 (CS_OPT_SYNTAX). 204 CS_OPT_SYNTAX_ATT, ///< X86 ATT asm syntax (CS_OPT_SYNTAX). 205 CS_OPT_SYNTAX_NOREGNAME, ///< Prints register name with only number (CS_OPT_SYNTAX) 206 CS_OPT_SYNTAX_MASM, ///< X86 Intel Masm syntax (CS_OPT_SYNTAX). 207 CS_OPT_SYNTAX_MOTOROLA, ///< MOS65XX use $ as hex prefix 208 } cs_opt_value; 209 210 /// Common instruction operand types - to be consistent across all architectures. 211 typedef enum cs_op_type { 212 CS_OP_INVALID = 0, ///< uninitialized/invalid operand. 213 CS_OP_REG, ///< Register operand. 214 CS_OP_IMM, ///< Immediate operand. 215 CS_OP_MEM, ///< Memory operand. 216 CS_OP_FP, ///< Floating-Point operand. 217 } cs_op_type; 218 219 /// Common instruction operand access types - to be consistent across all architectures. 220 /// It is possible to combine access types, for example: CS_AC_READ | CS_AC_WRITE 221 typedef enum cs_ac_type { 222 CS_AC_INVALID = 0, ///< Uninitialized/invalid access type. 223 CS_AC_READ = 1 << 0, ///< Operand read from memory or register. 224 CS_AC_WRITE = 1 << 1, ///< Operand write to memory or register. 225 } cs_ac_type; 226 227 /// Common instruction groups - to be consistent across all architectures. 228 typedef enum cs_group_type { 229 CS_GRP_INVALID = 0, ///< uninitialized/invalid group. 230 CS_GRP_JUMP, ///< all jump instructions (conditional+direct+indirect jumps) 231 CS_GRP_CALL, ///< all call instructions 232 CS_GRP_RET, ///< all return instructions 233 CS_GRP_INT, ///< all interrupt instructions (int+syscall) 234 CS_GRP_IRET, ///< all interrupt return instructions 235 CS_GRP_PRIVILEGE, ///< all privileged instructions 236 CS_GRP_BRANCH_RELATIVE, ///< all relative branching instructions 237 } cs_group_type; 238 239 /** 240 User-defined callback function for SKIPDATA option. 241 See tests/test_skipdata.c for sample code demonstrating this API. 242 243 @code: the input buffer containing code to be disassembled. 244 This is the same buffer passed to cs_disasm(). 245 @code_size: size (in bytes) of the above @code buffer. 246 @offset: the position of the currently-examining byte in the input 247 buffer @code mentioned above. 248 @user_data: user-data passed to cs_option() via @user_data field in 249 cs_opt_skipdata struct below. 250 251 @return: return number of bytes to skip, or 0 to immediately stop disassembling. 252 */ 253 typedef size_t (CAPSTONE_API *cs_skipdata_cb_t)(const uint8_t *code, size_t code_size, size_t offset, void *user_data); 254 255 /// User-customized setup for SKIPDATA option 256 typedef struct cs_opt_skipdata { 257 /// Capstone considers data to skip as special "instructions". 258 /// User can specify the string for this instruction's "mnemonic" here. 259 /// By default (if @mnemonic is NULL), Capstone use ".byte". 260 const char *mnemonic; 261 262 /// User-defined callback function to be called when Capstone hits data. 263 /// If the returned value from this callback is positive (>0), Capstone 264 /// will skip exactly that number of bytes & continue. Otherwise, if 265 /// the callback returns 0, Capstone stops disassembling and returns 266 /// immediately from cs_disasm() 267 /// NOTE: if this callback pointer is NULL, Capstone would skip a number 268 /// of bytes depending on architectures, as following: 269 /// Arm: 2 bytes (Thumb mode) or 4 bytes. 270 /// Arm64: 4 bytes. 271 /// Mips: 4 bytes. 272 /// M680x: 1 byte. 273 /// PowerPC: 4 bytes. 274 /// Sparc: 4 bytes. 275 /// SystemZ: 2 bytes. 276 /// X86: 1 bytes. 277 /// XCore: 2 bytes. 278 /// EVM: 1 bytes. 279 /// RISCV: 4 bytes. 280 /// WASM: 1 bytes. 281 /// MOS65XX: 1 bytes. 282 /// BPF: 8 bytes. 283 cs_skipdata_cb_t callback; // default value is NULL 284 285 /// User-defined data to be passed to @callback function pointer. 286 void *user_data; 287 } cs_opt_skipdata; 288 289 290 #include "arm.h" 291 #include "arm64.h" 292 #include "m68k.h" 293 #include "mips.h" 294 #include "ppc.h" 295 #include "sparc.h" 296 #include "systemz.h" 297 #include "x86.h" 298 #include "xcore.h" 299 #include "tms320c64x.h" 300 #include "m680x.h" 301 #include "evm.h" 302 #include "riscv.h" 303 #include "wasm.h" 304 #include "mos65xx.h" 305 #include "bpf.h" 306 307 /// NOTE: All information in cs_detail is only available when CS_OPT_DETAIL = CS_OPT_ON 308 /// Initialized as memset(., 0, offsetof(cs_detail, ARCH)+sizeof(cs_ARCH)) 309 /// by ARCH_getInstruction in arch/ARCH/ARCHDisassembler.c 310 /// if cs_detail changes, in particular if a field is added after the union, 311 /// then update arch/ARCH/ARCHDisassembler.c accordingly 312 typedef struct cs_detail { 313 uint16_t regs_read[16]; ///< list of implicit registers read by this insn 314 uint8_t regs_read_count; ///< number of implicit registers read by this insn 315 316 uint16_t regs_write[20]; ///< list of implicit registers modified by this insn 317 uint8_t regs_write_count; ///< number of implicit registers modified by this insn 318 319 uint8_t groups[8]; ///< list of group this instruction belong to 320 uint8_t groups_count; ///< number of groups this insn belongs to 321 322 /// Architecture-specific instruction info 323 union { 324 cs_x86 x86; ///< X86 architecture, including 16-bit, 32-bit & 64-bit mode 325 cs_arm64 arm64; ///< ARM64 architecture (aka AArch64) 326 cs_arm arm; ///< ARM architecture (including Thumb/Thumb2) 327 cs_m68k m68k; ///< M68K architecture 328 cs_mips mips; ///< MIPS architecture 329 cs_ppc ppc; ///< PowerPC architecture 330 cs_sparc sparc; ///< Sparc architecture 331 cs_sysz sysz; ///< SystemZ architecture 332 cs_xcore xcore; ///< XCore architecture 333 cs_tms320c64x tms320c64x; ///< TMS320C64x architecture 334 cs_m680x m680x; ///< M680X architecture 335 cs_evm evm; ///< Ethereum architecture 336 cs_mos65xx mos65xx; ///< MOS65XX architecture (including MOS6502) 337 cs_wasm wasm; ///< Web Assembly architecture 338 cs_bpf bpf; ///< Berkeley Packet Filter architecture (including eBPF) 339 cs_riscv riscv; ///< RISCV architecture 340 }; 341 } cs_detail; 342 343 /// Detail information of disassembled instruction 344 typedef struct cs_insn { 345 /// Instruction ID (basically a numeric ID for the instruction mnemonic) 346 /// Find the instruction id in the '[ARCH]_insn' enum in the header file 347 /// of corresponding architecture, such as 'arm_insn' in arm.h for ARM, 348 /// 'x86_insn' in x86.h for X86, etc... 349 /// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF 350 /// NOTE: in Skipdata mode, "data" instruction has 0 for this id field. 351 unsigned int id; 352 353 /// Address (EIP) of this instruction 354 /// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF 355 uint64_t address; 356 357 /// Size of this instruction 358 /// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF 359 uint16_t size; 360 361 /// Machine bytes of this instruction, with number of bytes indicated by @size above 362 /// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF 363 uint8_t bytes[24]; 364 365 /// Ascii text of instruction mnemonic 366 /// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF 367 char mnemonic[CS_MNEMONIC_SIZE]; 368 369 /// Ascii text of instruction operands 370 /// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF 371 char op_str[160]; 372 373 /// Pointer to cs_detail. 374 /// NOTE: detail pointer is only valid when both requirements below are met: 375 /// (1) CS_OP_DETAIL = CS_OPT_ON 376 /// (2) Engine is not in Skipdata mode (CS_OP_SKIPDATA option set to CS_OPT_ON) 377 /// 378 /// NOTE 2: when in Skipdata mode, or when detail mode is OFF, even if this pointer 379 /// is not NULL, its content is still irrelevant. 380 cs_detail *detail; 381 } cs_insn; 382 383 384 /// Calculate the offset of a disassembled instruction in its buffer, given its position 385 /// in its array of disassembled insn 386 /// NOTE: this macro works with position (>=1), not index 387 #define CS_INSN_OFFSET(insns, post) (insns[post - 1].address - insns[0].address) 388 389 390 /// All type of errors encountered by Capstone API. 391 /// These are values returned by cs_errno() 392 typedef enum cs_err { 393 CS_ERR_OK = 0, ///< No error: everything was fine 394 CS_ERR_MEM, ///< Out-Of-Memory error: cs_open(), cs_disasm(), cs_disasm_iter() 395 CS_ERR_ARCH, ///< Unsupported architecture: cs_open() 396 CS_ERR_HANDLE, ///< Invalid handle: cs_op_count(), cs_op_index() 397 CS_ERR_CSH, ///< Invalid csh argument: cs_close(), cs_errno(), cs_option() 398 CS_ERR_MODE, ///< Invalid/unsupported mode: cs_open() 399 CS_ERR_OPTION, ///< Invalid/unsupported option: cs_option() 400 CS_ERR_DETAIL, ///< Information is unavailable because detail option is OFF 401 CS_ERR_MEMSETUP, ///< Dynamic memory management uninitialized (see CS_OPT_MEM) 402 CS_ERR_VERSION, ///< Unsupported version (bindings) 403 CS_ERR_DIET, ///< Access irrelevant data in "diet" engine 404 CS_ERR_SKIPDATA, ///< Access irrelevant data for "data" instruction in SKIPDATA mode 405 CS_ERR_X86_ATT, ///< X86 AT&T syntax is unsupported (opt-out at compile time) 406 CS_ERR_X86_INTEL, ///< X86 Intel syntax is unsupported (opt-out at compile time) 407 CS_ERR_X86_MASM, ///< X86 Masm syntax is unsupported (opt-out at compile time) 408 } cs_err; 409 410 /** 411 Return combined API version & major and minor version numbers. 412 413 @major: major number of API version 414 @minor: minor number of API version 415 416 @return hexical number as (major << 8 | minor), which encodes both 417 major & minor versions. 418 NOTE: This returned value can be compared with version number made 419 with macro CS_MAKE_VERSION 420 421 For example, second API version would return 1 in @major, and 1 in @minor 422 The return value would be 0x0101 423 424 NOTE: if you only care about returned value, but not major and minor values, 425 set both @major & @minor arguments to NULL. 426 */ 427 CAPSTONE_EXPORT 428 unsigned int CAPSTONE_API cs_version(int *major, int *minor); 429 430 431 /** 432 This API can be used to either ask for archs supported by this library, 433 or check to see if the library was compile with 'diet' option (or called 434 in 'diet' mode). 435 436 To check if a particular arch is supported by this library, set @query to 437 arch mode (CS_ARCH_* value). 438 To verify if this library supports all the archs, use CS_ARCH_ALL. 439 440 To check if this library is in 'diet' mode, set @query to CS_SUPPORT_DIET. 441 442 @return True if this library supports the given arch, or in 'diet' mode. 443 */ 444 CAPSTONE_EXPORT 445 bool CAPSTONE_API cs_support(int query); 446 447 /** 448 Initialize CS handle: this must be done before any usage of CS. 449 450 @arch: architecture type (CS_ARCH_*) 451 @mode: hardware mode. This is combined of CS_MODE_* 452 @handle: pointer to handle, which will be updated at return time 453 454 @return CS_ERR_OK on success, or other value on failure (refer to cs_err enum 455 for detailed error). 456 */ 457 CAPSTONE_EXPORT 458 cs_err CAPSTONE_API cs_open(cs_arch arch, cs_mode mode, csh *handle); 459 460 /** 461 Close CS handle: MUST do to release the handle when it is not used anymore. 462 NOTE: this must be only called when there is no longer usage of Capstone, 463 not even access to cs_insn array. The reason is the this API releases some 464 cached memory, thus access to any Capstone API after cs_close() might crash 465 your application. 466 467 In fact,this API invalidate @handle by ZERO out its value (i.e *handle = 0). 468 469 @handle: pointer to a handle returned by cs_open() 470 471 @return CS_ERR_OK on success, or other value on failure (refer to cs_err enum 472 for detailed error). 473 */ 474 CAPSTONE_EXPORT 475 cs_err CAPSTONE_API cs_close(csh *handle); 476 477 /** 478 Set option for disassembling engine at runtime 479 480 @handle: handle returned by cs_open() 481 @type: type of option to be set 482 @value: option value corresponding with @type 483 484 @return: CS_ERR_OK on success, or other value on failure. 485 Refer to cs_err enum for detailed error. 486 487 NOTE: in the case of CS_OPT_MEM, handle's value can be anything, 488 so that cs_option(handle, CS_OPT_MEM, value) can (i.e must) be called 489 even before cs_open() 490 */ 491 CAPSTONE_EXPORT 492 cs_err CAPSTONE_API cs_option(csh handle, cs_opt_type type, size_t value); 493 494 /** 495 Report the last error number when some API function fail. 496 Like glibc's errno, cs_errno might not retain its old value once accessed. 497 498 @handle: handle returned by cs_open() 499 500 @return: error code of cs_err enum type (CS_ERR_*, see above) 501 */ 502 CAPSTONE_EXPORT 503 cs_err CAPSTONE_API cs_errno(csh handle); 504 505 506 /** 507 Return a string describing given error code. 508 509 @code: error code (see CS_ERR_* above) 510 511 @return: returns a pointer to a string that describes the error code 512 passed in the argument @code 513 */ 514 CAPSTONE_EXPORT 515 const char * CAPSTONE_API cs_strerror(cs_err code); 516 517 /** 518 Disassemble binary code, given the code buffer, size, address and number 519 of instructions to be decoded. 520 This API dynamically allocate memory to contain disassembled instruction. 521 Resulting instructions will be put into @*insn 522 523 NOTE 1: this API will automatically determine memory needed to contain 524 output disassembled instructions in @insn. 525 526 NOTE 2: caller must free the allocated memory itself to avoid memory leaking. 527 528 NOTE 3: for system with scarce memory to be dynamically allocated such as 529 OS kernel or firmware, the API cs_disasm_iter() might be a better choice than 530 cs_disasm(). The reason is that with cs_disasm(), based on limited available 531 memory, we have to calculate in advance how many instructions to be disassembled, 532 which complicates things. This is especially troublesome for the case @count=0, 533 when cs_disasm() runs uncontrollably (until either end of input buffer, or 534 when it encounters an invalid instruction). 535 536 @handle: handle returned by cs_open() 537 @code: buffer containing raw binary code to be disassembled. 538 @code_size: size of the above code buffer. 539 @address: address of the first instruction in given raw code buffer. 540 @insn: array of instructions filled in by this API. 541 NOTE: @insn will be allocated by this function, and should be freed 542 with cs_free() API. 543 @count: number of instructions to be disassembled, or 0 to get all of them 544 545 @return: the number of successfully disassembled instructions, 546 or 0 if this function failed to disassemble the given code 547 548 On failure, call cs_errno() for error code. 549 */ 550 CAPSTONE_EXPORT 551 size_t CAPSTONE_API cs_disasm(csh handle, 552 const uint8_t *code, size_t code_size, 553 uint64_t address, 554 size_t count, 555 cs_insn **insn); 556 557 /** 558 Free memory allocated by cs_malloc() or cs_disasm() (argument @insn) 559 560 @insn: pointer returned by @insn argument in cs_disasm() or cs_malloc() 561 @count: number of cs_insn structures returned by cs_disasm(), or 1 562 to free memory allocated by cs_malloc(). 563 */ 564 CAPSTONE_EXPORT 565 void CAPSTONE_API cs_free(cs_insn *insn, size_t count); 566 567 568 /** 569 Allocate memory for 1 instruction to be used by cs_disasm_iter(). 570 571 @handle: handle returned by cs_open() 572 573 NOTE: when no longer in use, you can reclaim the memory allocated for 574 this instruction with cs_free(insn, 1) 575 */ 576 CAPSTONE_EXPORT 577 cs_insn * CAPSTONE_API cs_malloc(csh handle); 578 579 /** 580 Fast API to disassemble binary code, given the code buffer, size, address 581 and number of instructions to be decoded. 582 This API puts the resulting instruction into a given cache in @insn. 583 See tests/test_iter.c for sample code demonstrating this API. 584 585 NOTE 1: this API will update @code, @size & @address to point to the next 586 instruction in the input buffer. Therefore, it is convenient to use 587 cs_disasm_iter() inside a loop to quickly iterate all the instructions. 588 While decoding one instruction at a time can also be achieved with 589 cs_disasm(count=1), some benchmarks shown that cs_disasm_iter() can be 30% 590 faster on random input. 591 592 NOTE 2: the cache in @insn can be created with cs_malloc() API. 593 594 NOTE 3: for system with scarce memory to be dynamically allocated such as 595 OS kernel or firmware, this API is recommended over cs_disasm(), which 596 allocates memory based on the number of instructions to be disassembled. 597 The reason is that with cs_disasm(), based on limited available memory, 598 we have to calculate in advance how many instructions to be disassembled, 599 which complicates things. This is especially troublesome for the case 600 @count=0, when cs_disasm() runs uncontrollably (until either end of input 601 buffer, or when it encounters an invalid instruction). 602 603 @handle: handle returned by cs_open() 604 @code: buffer containing raw binary code to be disassembled 605 @size: size of above code 606 @address: address of the first insn in given raw code buffer 607 @insn: pointer to instruction to be filled in by this API. 608 609 @return: true if this API successfully decode 1 instruction, 610 or false otherwise. 611 612 On failure, call cs_errno() for error code. 613 */ 614 CAPSTONE_EXPORT 615 bool CAPSTONE_API cs_disasm_iter(csh handle, 616 const uint8_t **code, size_t *size, 617 uint64_t *address, cs_insn *insn); 618 619 /** 620 Return friendly name of register in a string. 621 Find the instruction id from header file of corresponding architecture (arm.h for ARM, 622 x86.h for X86, ...) 623 624 WARN: when in 'diet' mode, this API is irrelevant because engine does not 625 store register name. 626 627 @handle: handle returned by cs_open() 628 @reg_id: register id 629 630 @return: string name of the register, or NULL if @reg_id is invalid. 631 */ 632 CAPSTONE_EXPORT 633 const char * CAPSTONE_API cs_reg_name(csh handle, unsigned int reg_id); 634 635 /** 636 Return friendly name of an instruction in a string. 637 Find the instruction id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...) 638 639 WARN: when in 'diet' mode, this API is irrelevant because the engine does not 640 store instruction name. 641 642 @handle: handle returned by cs_open() 643 @insn_id: instruction id 644 645 @return: string name of the instruction, or NULL if @insn_id is invalid. 646 */ 647 CAPSTONE_EXPORT 648 const char * CAPSTONE_API cs_insn_name(csh handle, unsigned int insn_id); 649 650 /** 651 Return friendly name of a group id (that an instruction can belong to) 652 Find the group id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...) 653 654 WARN: when in 'diet' mode, this API is irrelevant because the engine does not 655 store group name. 656 657 @handle: handle returned by cs_open() 658 @group_id: group id 659 660 @return: string name of the group, or NULL if @group_id is invalid. 661 */ 662 CAPSTONE_EXPORT 663 const char * CAPSTONE_API cs_group_name(csh handle, unsigned int group_id); 664 665 /** 666 Check if a disassembled instruction belong to a particular group. 667 Find the group id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...) 668 Internally, this simply verifies if @group_id matches any member of insn->groups array. 669 670 NOTE: this API is only valid when detail option is ON (which is OFF by default). 671 672 WARN: when in 'diet' mode, this API is irrelevant because the engine does not 673 update @groups array. 674 675 @handle: handle returned by cs_open() 676 @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter() 677 @group_id: group that you want to check if this instruction belong to. 678 679 @return: true if this instruction indeed belongs to the given group, or false otherwise. 680 */ 681 CAPSTONE_EXPORT 682 bool CAPSTONE_API cs_insn_group(csh handle, const cs_insn *insn, unsigned int group_id); 683 684 /** 685 Check if a disassembled instruction IMPLICITLY used a particular register. 686 Find the register id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...) 687 Internally, this simply verifies if @reg_id matches any member of insn->regs_read array. 688 689 NOTE: this API is only valid when detail option is ON (which is OFF by default) 690 691 WARN: when in 'diet' mode, this API is irrelevant because the engine does not 692 update @regs_read array. 693 694 @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter() 695 @reg_id: register that you want to check if this instruction used it. 696 697 @return: true if this instruction indeed implicitly used the given register, or false otherwise. 698 */ 699 CAPSTONE_EXPORT 700 bool CAPSTONE_API cs_reg_read(csh handle, const cs_insn *insn, unsigned int reg_id); 701 702 /** 703 Check if a disassembled instruction IMPLICITLY modified a particular register. 704 Find the register id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...) 705 Internally, this simply verifies if @reg_id matches any member of insn->regs_write array. 706 707 NOTE: this API is only valid when detail option is ON (which is OFF by default) 708 709 WARN: when in 'diet' mode, this API is irrelevant because the engine does not 710 update @regs_write array. 711 712 @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter() 713 @reg_id: register that you want to check if this instruction modified it. 714 715 @return: true if this instruction indeed implicitly modified the given register, or false otherwise. 716 */ 717 CAPSTONE_EXPORT 718 bool CAPSTONE_API cs_reg_write(csh handle, const cs_insn *insn, unsigned int reg_id); 719 720 /** 721 Count the number of operands of a given type. 722 Find the operand type in header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...) 723 724 NOTE: this API is only valid when detail option is ON (which is OFF by default) 725 726 @handle: handle returned by cs_open() 727 @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter() 728 @op_type: Operand type to be found. 729 730 @return: number of operands of given type @op_type in instruction @insn, 731 or -1 on failure. 732 */ 733 CAPSTONE_EXPORT 734 int CAPSTONE_API cs_op_count(csh handle, const cs_insn *insn, unsigned int op_type); 735 736 /** 737 Retrieve the position of operand of given type in <arch>.operands[] array. 738 Later, the operand can be accessed using the returned position. 739 Find the operand type in header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...) 740 741 NOTE: this API is only valid when detail option is ON (which is OFF by default) 742 743 @handle: handle returned by cs_open() 744 @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter() 745 @op_type: Operand type to be found. 746 @position: position of the operand to be found. This must be in the range 747 [1, cs_op_count(handle, insn, op_type)] 748 749 @return: index of operand of given type @op_type in <arch>.operands[] array 750 in instruction @insn, or -1 on failure. 751 */ 752 CAPSTONE_EXPORT 753 int CAPSTONE_API cs_op_index(csh handle, const cs_insn *insn, unsigned int op_type, 754 unsigned int position); 755 756 /// Type of array to keep the list of registers 757 typedef uint16_t cs_regs[64]; 758 759 /** 760 Retrieve all the registers accessed by an instruction, either explicitly or 761 implicitly. 762 763 WARN: when in 'diet' mode, this API is irrelevant because engine does not 764 store registers. 765 766 @handle: handle returned by cs_open() 767 @insn: disassembled instruction structure returned from cs_disasm() or cs_disasm_iter() 768 @regs_read: on return, this array contains all registers read by instruction. 769 @regs_read_count: number of registers kept inside @regs_read array. 770 @regs_write: on return, this array contains all registers written by instruction. 771 @regs_write_count: number of registers kept inside @regs_write array. 772 773 @return CS_ERR_OK on success, or other value on failure (refer to cs_err enum 774 for detailed error). 775 */ 776 CAPSTONE_EXPORT 777 cs_err CAPSTONE_API cs_regs_access(csh handle, const cs_insn *insn, 778 cs_regs regs_read, uint8_t *regs_read_count, 779 cs_regs regs_write, uint8_t *regs_write_count); 780 781 #ifdef __cplusplus 782 } 783 #endif 784 785 #endif 786