1 /** @file 2 3 Copyright (c) 2011-2018, ARM Ltd. All rights reserved.<BR> 4 SPDX-License-Identifier: BSD-2-Clause-Patent 5 6 **/ 7 8 #ifndef LCD_PLATFORM_LIB_H_ 9 #define LCD_PLATFORM_LIB_H_ 10 11 #include <Protocol/GraphicsOutput.h> 12 13 #define LCD_VRAM_SIZE SIZE_8MB 14 15 // Modes definitions 16 #define VGA 0 17 #define SVGA 1 18 #define XGA 2 19 #define SXGA 3 20 #define WSXGA 4 21 #define UXGA 5 22 #define HD 6 23 #define WVGA 7 24 #define QHD 8 25 #define WSVGA 9 26 #define HD720 10 27 #define WXGA 11 28 29 // VGA Mode: 640 x 480 30 #define VGA_H_RES_PIXELS 640 31 #define VGA_V_RES_PIXELS 480 32 #define VGA_OSC_FREQUENCY 23750000 /* 0x016A6570 */ 33 34 #define VGA_H_SYNC ( 80 - 1) 35 #define VGA_H_FRONT_PORCH ( 16 - 1) 36 #define VGA_H_BACK_PORCH ( 64 - 1) 37 38 #define VGA_V_SYNC ( 4 - 1) 39 #define VGA_V_FRONT_PORCH ( 3 - 1) 40 #define VGA_V_BACK_PORCH ( 13 - 1) 41 42 // SVGA Mode: 800 x 600 43 #define SVGA_H_RES_PIXELS 800 44 #define SVGA_V_RES_PIXELS 600 45 #define SVGA_OSC_FREQUENCY 38250000 /* 0x0247A610 */ 46 47 #define SVGA_H_SYNC ( 80 - 1) 48 #define SVGA_H_FRONT_PORCH ( 32 - 1) 49 #define SVGA_H_BACK_PORCH (112 - 1) 50 51 #define SVGA_V_SYNC ( 4 - 1) 52 #define SVGA_V_FRONT_PORCH ( 3 - 1) 53 #define SVGA_V_BACK_PORCH ( 17 - 1) 54 55 // XGA Mode: 1024 x 768 56 #define XGA_H_RES_PIXELS 1024 57 #define XGA_V_RES_PIXELS 768 58 #define XGA_OSC_FREQUENCY 63500000 /* 0x03C8EEE0 */ 59 60 #define XGA_H_SYNC (104 - 1) 61 #define XGA_H_FRONT_PORCH ( 48 - 1) 62 #define XGA_H_BACK_PORCH (152 - 1) 63 64 #define XGA_V_SYNC ( 4 - 1) 65 #define XGA_V_FRONT_PORCH ( 3 - 1) 66 #define XGA_V_BACK_PORCH ( 23 - 1) 67 68 // SXGA Mode: 1280 x 1024 69 #define SXGA_H_RES_PIXELS 1280 70 #define SXGA_V_RES_PIXELS 1024 71 #define SXGA_OSC_FREQUENCY 109000000 /* 0x067F3540 */ 72 73 #define SXGA_H_SYNC (136 - 1) 74 #define SXGA_H_FRONT_PORCH ( 80 - 1) 75 #define SXGA_H_BACK_PORCH (216 - 1) 76 77 #define SXGA_V_SYNC ( 7 - 1) 78 #define SXGA_V_FRONT_PORCH ( 3 - 1) 79 #define SXGA_V_BACK_PORCH ( 29 - 1) 80 81 // WSXGA+ Mode: 1680 x 1050 82 #define WSXGA_H_RES_PIXELS 1680 83 #define WSXGA_V_RES_PIXELS 1050 84 #define WSXGA_OSC_FREQUENCY 147000000 /* 0x08C30AC0 */ 85 86 #define WSXGA_H_SYNC (170 - 1) 87 #define WSXGA_H_FRONT_PORCH (104 - 1) 88 #define WSXGA_H_BACK_PORCH (274 - 1) 89 90 #define WSXGA_V_SYNC ( 5 - 1) 91 #define WSXGA_V_FRONT_PORCH ( 4 - 1) 92 #define WSXGA_V_BACK_PORCH ( 41 - 1) 93 94 // UXGA Mode: 1600 x 1200 95 #define UXGA_H_RES_PIXELS 1600 96 #define UXGA_V_RES_PIXELS 1200 97 #define UXGA_OSC_FREQUENCY 161000000 /* 0x0998AA40 */ 98 99 #define UXGA_H_SYNC (168 - 1) 100 #define UXGA_H_FRONT_PORCH (112 - 1) 101 #define UXGA_H_BACK_PORCH (280 - 1) 102 103 #define UXGA_V_SYNC ( 4 - 1) 104 #define UXGA_V_FRONT_PORCH ( 3 - 1) 105 #define UXGA_V_BACK_PORCH ( 38 - 1) 106 107 // HD Mode: 1920 x 1080 108 #define HD_H_RES_PIXELS 1920 109 #define HD_V_RES_PIXELS 1080 110 #define HD_OSC_FREQUENCY 165000000 /* 0x09D5B340 */ 111 112 #define HD_H_SYNC ( 79 - 1) 113 #define HD_H_FRONT_PORCH (128 - 1) 114 #define HD_H_BACK_PORCH (328 - 1) 115 116 #define HD_V_SYNC ( 5 - 1) 117 #define HD_V_FRONT_PORCH ( 3 - 1) 118 #define HD_V_BACK_PORCH ( 32 - 1) 119 120 // WVGA Mode: 800 x 480 121 #define WVGA_H_RES_PIXELS 800 122 #define WVGA_V_RES_PIXELS 480 123 #define WVGA_OSC_FREQUENCY 29500000 /* 0x01C22260 */ 124 #define WVGA_H_SYNC ( 72 - 1) 125 #define WVGA_H_FRONT_PORCH ( 24 - 1) 126 #define WVGA_H_BACK_PORCH ( 96 - 1) 127 #define WVGA_V_SYNC ( 7 - 1) 128 #define WVGA_V_FRONT_PORCH ( 3 - 1) 129 #define WVGA_V_BACK_PORCH ( 10 - 1) 130 131 // QHD Mode: 960 x 540 132 #define QHD_H_RES_PIXELS 960 133 #define QHD_V_RES_PIXELS 540 134 #define QHD_OSC_FREQUENCY 40750000 /* 0x026DCBB0 */ 135 #define QHD_H_SYNC ( 96 - 1) 136 #define QHD_H_FRONT_PORCH ( 32 - 1) 137 #define QHD_H_BACK_PORCH (128 - 1) 138 #define QHD_V_SYNC ( 5 - 1) 139 #define QHD_V_FRONT_PORCH ( 3 - 1) 140 #define QHD_V_BACK_PORCH ( 14 - 1) 141 142 // WSVGA Mode: 1024 x 600 143 #define WSVGA_H_RES_PIXELS 1024 144 #define WSVGA_V_RES_PIXELS 600 145 #define WSVGA_OSC_FREQUENCY 49000000 /* 0x02EBAE40 */ 146 #define WSVGA_H_SYNC (104 - 1) 147 #define WSVGA_H_FRONT_PORCH ( 40 - 1) 148 #define WSVGA_H_BACK_PORCH (144 - 1) 149 #define WSVGA_V_SYNC ( 10 - 1) 150 #define WSVGA_V_FRONT_PORCH ( 3 - 1) 151 #define WSVGA_V_BACK_PORCH ( 11 - 1) 152 153 // HD720 Mode: 1280 x 720 154 #define HD720_H_RES_PIXELS 1280 155 #define HD720_V_RES_PIXELS 720 156 #define HD720_OSC_FREQUENCY 74500000 /* 0x0470C7A0 */ 157 #define HD720_H_SYNC (128 - 1) 158 #define HD720_H_FRONT_PORCH ( 64 - 1) 159 #define HD720_H_BACK_PORCH (192 - 1) 160 #define HD720_V_SYNC ( 5 - 1) 161 #define HD720_V_FRONT_PORCH ( 3 - 1) 162 #define HD720_V_BACK_PORCH ( 20 - 1) 163 164 // WXGA Mode: 1280 x 800 165 #define WXGA_H_RES_PIXELS 1280 166 #define WXGA_V_RES_PIXELS 800 167 #define WXGA_OSC_FREQUENCY 83500000 /* 0x04FA1BE0 */ 168 #define WXGA_H_SYNC (128 - 1) 169 #define WXGA_H_FRONT_PORCH ( 72 - 1) 170 #define WXGA_H_BACK_PORCH (200 - 1) 171 #define WXGA_V_SYNC ( 6 - 1) 172 #define WXGA_V_FRONT_PORCH ( 3 - 1) 173 #define WXGA_V_BACK_PORCH ( 22 - 1) 174 175 // Colour Masks 176 #define LCD_24BPP_RED_MASK 0x00FF0000 177 #define LCD_24BPP_GREEN_MASK 0x0000FF00 178 #define LCD_24BPP_BLUE_MASK 0x000000FF 179 #define LCD_24BPP_RESERVED_MASK 0xFF000000 180 181 #define LCD_16BPP_555_RED_MASK 0x00007C00 182 #define LCD_16BPP_555_GREEN_MASK 0x000003E0 183 #define LCD_16BPP_555_BLUE_MASK 0x0000001F 184 #define LCD_16BPP_555_RESERVED_MASK 0x00000000 185 186 #define LCD_16BPP_565_RED_MASK 0x0000F800 187 #define LCD_16BPP_565_GREEN_MASK 0x000007E0 188 #define LCD_16BPP_565_BLUE_MASK 0x0000001F 189 #define LCD_16BPP_565_RESERVED_MASK 0x00008000 190 191 #define LCD_12BPP_444_RED_MASK 0x00000F00 192 #define LCD_12BPP_444_GREEN_MASK 0x000000F0 193 #define LCD_12BPP_444_BLUE_MASK 0x0000000F 194 #define LCD_12BPP_444_RESERVED_MASK 0x0000F000 195 196 /** The enumeration maps the PL111 LcdBpp values used in the LCD Control 197 Register 198 **/ 199 typedef enum { 200 LCD_BITS_PER_PIXEL_1 = 0, 201 LCD_BITS_PER_PIXEL_2, 202 LCD_BITS_PER_PIXEL_4, 203 LCD_BITS_PER_PIXEL_8, 204 LCD_BITS_PER_PIXEL_16_555, 205 LCD_BITS_PER_PIXEL_24, 206 LCD_BITS_PER_PIXEL_16_565, 207 LCD_BITS_PER_PIXEL_12_444 208 } LCD_BPP; 209 210 // Display timing settings. 211 typedef struct { 212 UINT32 Resolution; 213 UINT32 Sync; 214 UINT32 BackPorch; 215 UINT32 FrontPorch; 216 } SCAN_TIMINGS; 217 218 /** Platform related initialization function. 219 220 @param[in] Handle Handle to the LCD device instance. 221 222 @retval EFI_SUCCESS Plaform library initialized successfully. 223 @retval !(EFI_SUCCESS) Other errors. 224 **/ 225 EFI_STATUS 226 LcdPlatformInitializeDisplay ( 227 IN EFI_HANDLE Handle 228 ); 229 230 /** Allocate VRAM memory in DRAM for the framebuffer 231 (unless it is reserved already). 232 233 The allocated address can be used to set the framebuffer. 234 235 @param[out] VramBaseAddress A pointer to the framebuffer address. 236 @param[out] VramSize A pointer to the size of the frame 237 buffer in bytes 238 239 @retval EFI_SUCCESS Frame buffer memory allocated successfully. 240 @retval !(EFI_SUCCESS) Other errors. 241 **/ 242 EFI_STATUS 243 LcdPlatformGetVram ( 244 OUT EFI_PHYSICAL_ADDRESS* VramBaseAddress, 245 OUT UINTN* VramSize 246 ); 247 248 /** Return total number of modes supported. 249 250 Note: Valid mode numbers are 0 to MaxMode - 1 251 See Section 12.9 of the UEFI Specification 2.7 252 253 @retval UINT32 Mode Number. 254 **/ 255 UINT32 256 LcdPlatformGetMaxMode ( 257 VOID 258 ); 259 260 /** Set the requested display mode. 261 262 @param[in] ModeNumber Mode Number. 263 264 @retval EFI_SUCCESS Mode set successfully. 265 @retval EFI_INVALID_PARAMETER Requested mode not found. 266 @retval !(EFI_SUCCESS) Other errors. 267 **/ 268 EFI_STATUS 269 LcdPlatformSetMode ( 270 IN UINT32 ModeNumber 271 ); 272 273 /** Return information for the requested mode number. 274 275 @param[in] ModeNumber Mode Number. 276 @param[out] Info Pointer for returned mode information 277 (on success). 278 279 @retval EFI_SUCCESS Mode information for the requested mode 280 returned successfully. 281 @retval EFI_INVALID_PARAMETER Requested mode not found. 282 **/ 283 EFI_STATUS 284 LcdPlatformQueryMode ( 285 IN UINT32 ModeNumber, 286 OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION *Info 287 ); 288 289 /** Return display timing information for the requested mode number. 290 291 @param[in] ModeNumber Mode Number. 292 293 @param[out] Horizontal Pointer to horizontal timing parameters. 294 (Resolution, Sync, Back porch, Front porch) 295 @param[out] Vertical Pointer to vertical timing parameters. 296 (Resolution, Sync, Back porch, Front porch) 297 298 299 @retval EFI_SUCCESS Display timing information for the requested 300 mode returned successfully. 301 @retval EFI_INVALID_PARAMETER Requested mode not found. 302 **/ 303 EFI_STATUS 304 LcdPlatformGetTimings ( 305 IN UINT32 ModeNumber, 306 OUT SCAN_TIMINGS **Horizontal, 307 OUT SCAN_TIMINGS **Vertical 308 ); 309 310 /** Return bits per pixel information for a mode number. 311 312 @param[in] ModeNumber Mode Number. 313 314 @param[out] Bpp Pointer to value bits per pixel information. 315 316 @retval EFI_SUCCESS Bit per pixel information for the requested 317 mode returned successfully. 318 @retval EFI_INVALID_PARAMETER Requested mode not found. 319 **/ 320 EFI_STATUS 321 LcdPlatformGetBpp ( 322 IN UINT32 ModeNumber, 323 OUT LCD_BPP* Bpp 324 ); 325 326 #endif /* LCD_PLATFORM_LIB_H_ */ 327