1 #ifndef __ATA_H 2 #define __ATA_H 3 4 #include "block.h" // struct drive_s 5 #include "config.h" // CONFIG_MAX_ATA_INTERFACES 6 #include "types.h" // u8 7 8 struct ata_channel_s { 9 u16 iobase1; 10 u16 iobase2; 11 u16 iomaster; 12 u8 irq; 13 u8 chanid; 14 u8 ataid; 15 int pci_bdf; 16 struct pci_device *pci_tmp; 17 }; 18 19 struct atadrive_s { 20 struct drive_s drive; 21 struct ata_channel_s *chan_gf; 22 u8 slave; 23 }; 24 25 // ata.c 26 char *ata_extract_model(char *model, u32 size, u16 *buffer); 27 int ata_extract_version(u16 *buffer); 28 int ata_process_op(struct disk_op_s *op); 29 int ata_atapi_process_op(struct disk_op_s *op); 30 void ata_setup(void); 31 32 #define PORT_ATA2_CMD_BASE 0x0170 33 #define PORT_ATA1_CMD_BASE 0x01f0 34 #define PORT_ATA2_CTRL_BASE 0x0374 35 #define PORT_ATA1_CTRL_BASE 0x03f4 36 37 // Global defines -- ATA register and register bits. 38 // command block & control block regs 39 #define ATA_CB_DATA 0 // data reg in/out pio_base_addr1+0 40 #define ATA_CB_ERR 1 // error in pio_base_addr1+1 41 #define ATA_CB_FR 1 // feature reg out pio_base_addr1+1 42 #define ATA_CB_SC 2 // sector count in/out pio_base_addr1+2 43 #define ATA_CB_SN 3 // sector number in/out pio_base_addr1+3 44 #define ATA_CB_CL 4 // cylinder low in/out pio_base_addr1+4 45 #define ATA_CB_CH 5 // cylinder high in/out pio_base_addr1+5 46 #define ATA_CB_DH 6 // device head in/out pio_base_addr1+6 47 #define ATA_CB_STAT 7 // primary status in pio_base_addr1+7 48 #define ATA_CB_CMD 7 // command out pio_base_addr1+7 49 50 #define ATA_CB_ASTAT 2 // alternate status in pio_base_addr2+2 51 #define ATA_CB_DC 2 // device control out pio_base_addr2+2 52 #define ATA_CB_DA 3 // device address in pio_base_addr2+3 53 54 #define ATA_CB_ER_ICRC 0x80 // ATA Ultra DMA bad CRC 55 #define ATA_CB_ER_BBK 0x80 // ATA bad block 56 #define ATA_CB_ER_UNC 0x40 // ATA uncorrected error 57 #define ATA_CB_ER_MC 0x20 // ATA media change 58 #define ATA_CB_ER_IDNF 0x10 // ATA id not found 59 #define ATA_CB_ER_MCR 0x08 // ATA media change request 60 #define ATA_CB_ER_ABRT 0x04 // ATA command aborted 61 #define ATA_CB_ER_NTK0 0x02 // ATA track 0 not found 62 #define ATA_CB_ER_NDAM 0x01 // ATA address mark not found 63 64 #define ATA_CB_ER_P_SNSKEY 0xf0 // ATAPI sense key (mask) 65 #define ATA_CB_ER_P_MCR 0x08 // ATAPI Media Change Request 66 #define ATA_CB_ER_P_ABRT 0x04 // ATAPI command abort 67 #define ATA_CB_ER_P_EOM 0x02 // ATAPI End of Media 68 #define ATA_CB_ER_P_ILI 0x01 // ATAPI Illegal Length Indication 69 70 // ATAPI Interrupt Reason bits in the Sector Count reg (CB_SC) 71 #define ATA_CB_SC_P_TAG 0xf8 // ATAPI tag (mask) 72 #define ATA_CB_SC_P_REL 0x04 // ATAPI release 73 #define ATA_CB_SC_P_IO 0x02 // ATAPI I/O 74 #define ATA_CB_SC_P_CD 0x01 // ATAPI C/D 75 76 // bits 7-4 of the device/head (CB_DH) reg 77 #define ATA_CB_DH_DEV0 0xa0 // select device 0 78 #define ATA_CB_DH_DEV1 0xb0 // select device 1 79 #define ATA_CB_DH_LBA 0x40 // use LBA 80 81 // status reg (CB_STAT and CB_ASTAT) bits 82 #define ATA_CB_STAT_BSY 0x80 // busy 83 #define ATA_CB_STAT_RDY 0x40 // ready 84 #define ATA_CB_STAT_DF 0x20 // device fault 85 #define ATA_CB_STAT_WFT 0x20 // write fault (old name) 86 #define ATA_CB_STAT_SKC 0x10 // seek complete 87 #define ATA_CB_STAT_SERV 0x10 // service 88 #define ATA_CB_STAT_DRQ 0x08 // data request 89 #define ATA_CB_STAT_CORR 0x04 // corrected 90 #define ATA_CB_STAT_IDX 0x02 // index 91 #define ATA_CB_STAT_ERR 0x01 // error (ATA) 92 #define ATA_CB_STAT_CHK 0x01 // check (ATAPI) 93 94 // device control reg (CB_DC) bits 95 #define ATA_CB_DC_HD15 0x08 // bit should always be set to one 96 #define ATA_CB_DC_SRST 0x04 // soft reset 97 #define ATA_CB_DC_NIEN 0x02 // disable interrupts 98 99 // Most mandtory and optional ATA commands (from ATA-3), 100 #define ATA_CMD_NOP 0x00 101 #define ATA_CMD_CFA_REQUEST_EXT_ERR_CODE 0x03 102 #define ATA_CMD_DEVICE_RESET 0x08 103 #define ATA_CMD_RECALIBRATE 0x10 104 #define ATA_CMD_READ_SECTORS 0x20 105 #define ATA_CMD_READ_SECTORS_EXT 0x24 106 #define ATA_CMD_READ_DMA_EXT 0x25 107 #define ATA_CMD_READ_DMA_QUEUED_EXT 0x26 108 #define ATA_CMD_READ_NATIVE_MAX_ADDRESS_EXT 0x27 109 #define ATA_CMD_READ_MULTIPLE_EXT 0x29 110 #define ATA_CMD_READ_LOG_EXT 0x2F 111 #define ATA_CMD_WRITE_SECTORS 0x30 112 #define ATA_CMD_WRITE_SECTORS_EXT 0x34 113 #define ATA_CMD_WRITE_DMA_EXT 0x35 114 #define ATA_CMD_WRITE_DMA_QUEUED_EXT 0x36 115 #define ATA_CMD_SET_MAX_ADDRESS_EXT 0x37 116 #define ATA_CMD_CFA_WRITE_SECTORS_WO_ERASE 0x38 117 #define ATA_CMD_WRITE_MULTIPLE_EXT 0x39 118 #define ATA_CMD_WRITE_VERIFY 0x3C 119 #define ATA_CMD_WRITE_LOG_EXT 0x3F 120 #define ATA_CMD_READ_VERIFY_SECTORS 0x40 121 #define ATA_CMD_READ_VERIFY_SECTORS_EXT 0x42 122 #define ATA_CMD_FORMAT_TRACK 0x50 123 #define ATA_CMD_SEEK 0x70 124 #define ATA_CMD_CFA_TRANSLATE_SECTOR 0x87 125 #define ATA_CMD_EXECUTE_DEVICE_DIAGNOSTIC 0x90 126 #define ATA_CMD_INITIALIZE_DEVICE_PARAMETERS 0x91 127 #define ATA_CMD_STANDBY_IMMEDIATE2 0x94 128 #define ATA_CMD_IDLE_IMMEDIATE2 0x95 129 #define ATA_CMD_STANDBY2 0x96 130 #define ATA_CMD_IDLE2 0x97 131 #define ATA_CMD_CHECK_POWER_MODE2 0x98 132 #define ATA_CMD_SLEEP2 0x99 133 #define ATA_CMD_PACKET 0xA0 134 #define ATA_CMD_IDENTIFY_PACKET_DEVICE 0xA1 135 #define ATA_CMD_CFA_ERASE_SECTORS 0xC0 136 #define ATA_CMD_READ_MULTIPLE 0xC4 137 #define ATA_CMD_WRITE_MULTIPLE 0xC5 138 #define ATA_CMD_SET_MULTIPLE_MODE 0xC6 139 #define ATA_CMD_READ_DMA_QUEUED 0xC7 140 #define ATA_CMD_READ_DMA 0xC8 141 #define ATA_CMD_WRITE_DMA 0xCA 142 #define ATA_CMD_WRITE_DMA_QUEUED 0xCC 143 #define ATA_CMD_CFA_WRITE_MULTIPLE_WO_ERASE 0xCD 144 #define ATA_CMD_STANDBY_IMMEDIATE 0xE0 145 #define ATA_CMD_IDLE_IMMEDIATE 0xE1 146 #define ATA_CMD_STANDBY 0xE2 147 #define ATA_CMD_IDLE 0xE3 148 #define ATA_CMD_READ_BUFFER 0xE4 149 #define ATA_CMD_CHECK_POWER_MODE 0xE5 150 #define ATA_CMD_SLEEP 0xE6 151 #define ATA_CMD_FLUSH_CACHE 0xE7 152 #define ATA_CMD_WRITE_BUFFER 0xE8 153 #define ATA_CMD_IDENTIFY_DEVICE 0xEC 154 #define ATA_CMD_SET_FEATURES 0xEF 155 #define ATA_CMD_READ_NATIVE_MAX_ADDRESS 0xF8 156 #define ATA_CMD_SET_MAX 0xF9 157 158 #define ATA_SET_FEATRUE_TRANSFER_MODE 0x03 159 #define ATA_TRANSFER_MODE_ULTRA_DMA 0x40 160 #define ATA_TRANSFER_MODE_MULTIWORD_DMA 0x20 161 #define ATA_TRANSFER_MODE_PIO_FLOW_CTRL 0x08 162 #define ATA_TRANSFER_MODE_DEFAULT_PIO 0x00 163 #endif // ata.h 164