1 // Main VGA bios initialization
2 //
3 // Copyright (C) 2009-2013 Kevin O'Connor <kevin@koconnor.net>
4 // Copyright (C) 2001-2008 the LGPL VGABios developers Team
5 //
6 // This file may be distributed under the terms of the GNU LGPLv3 license.
7
8 #include "biosvar.h" // SET_BDA
9 #include "bregs.h" // struct bregs
10 #include "hw/pci.h" // pci_config_readw
11 #include "hw/pci_regs.h" // PCI_VENDOR_ID
12 #include "hw/serialio.h" // serial_debug_preinit
13 #include "output.h" // dprintf
14 #include "std/optionrom.h" // struct pci_data
15 #include "std/pmm.h" // struct pmmheader
16 #include "string.h" // checksum_far
17 #include "vgabios.h" // SET_VGA
18 #include "vgahw.h" // vgahw_setup
19 #include "vgautil.h" // swcursor_check_event
20
21 // Type of emulator platform - for dprintf with certain compile options.
22 int PlatformRunningOn VAR16;
23
24
25 /****************************************************************
26 * PCI Data
27 ****************************************************************/
28
29 struct pci_data rom_pci_data VAR16 VISIBLE16 = {
30 .signature = PCI_ROM_SIGNATURE,
31 .vendor = CONFIG_VGA_VID,
32 .device = CONFIG_VGA_DID,
33 .dlen = 0x18,
34 .class_hi = 0x300,
35 .irevision = 1,
36 .type = PCIROM_CODETYPE_X86,
37 .indicator = 0x80,
38 };
39
40
41 /****************************************************************
42 * PMM call and extra stack setup
43 ****************************************************************/
44
45 u32
allocate_pmm(u32 size,int highmem,int aligned)46 allocate_pmm(u32 size, int highmem, int aligned)
47 {
48 u32 pmmscan;
49 for (pmmscan=0; pmmscan < BUILD_BIOS_SIZE; pmmscan+=16) {
50 struct pmmheader *pmm = (void*)pmmscan;
51 if (GET_FARVAR(SEG_BIOS, pmm->signature) != PMM_SIGNATURE)
52 continue;
53 if (checksum_far(SEG_BIOS, pmm, GET_FARVAR(SEG_BIOS, pmm->length)))
54 continue;
55 struct segoff_s entry = GET_FARVAR(SEG_BIOS, pmm->entry);
56 dprintf(1, "Attempting to allocate %u bytes %s via pmm call to %04x:%04x\n"
57 , size, highmem ? "highmem" : "lowmem"
58 , entry.seg, entry.offset);
59 u16 res1, res2;
60 u16 flags = 8 |
61 ( highmem ? 2 : 1 )|
62 ( aligned ? 4 : 0 );
63 size >>= 4;
64 asm volatile(
65 "pushl %0\n"
66 "pushw %2\n" // flags
67 "pushl $0xffffffff\n" // Anonymous handle
68 "pushl %1\n" // size
69 "pushw $0x00\n" // PMM allocation request
70 "lcallw *12(%%esp)\n"
71 "addl $16, %%esp\n"
72 "cli\n"
73 "cld\n"
74 : "+r" (entry.segoff), "+r" (size), "+r" (flags),
75 "=a" (res1), "=d" (res2) : : "cc", "memory");
76 u32 res = res1 | (res2 << 16);
77 if (!res || res == PMM_FUNCTION_NOT_SUPPORTED)
78 return 0;
79 return res;
80 }
81 return 0;
82 }
83
84 u16 ExtraStackSeg VAR16 VISIBLE16;
85
86 static void
allocate_extra_stack(void)87 allocate_extra_stack(void)
88 {
89 if (!CONFIG_VGA_ALLOCATE_EXTRA_STACK)
90 return;
91 u32 res = allocate_pmm(CONFIG_VGA_EXTRA_STACK_SIZE, 0, 0);
92 if (!res)
93 return;
94 dprintf(1, "VGA stack allocated at %x\n", res);
95 SET_VGA(ExtraStackSeg, res >> 4);
96 extern void entry_10_extrastack(void);
97 SET_IVT(0x10, SEGOFF(get_global_seg(), (u32)entry_10_extrastack));
98 return;
99 }
100
101
102 /****************************************************************
103 * Timer hook
104 ****************************************************************/
105
106 struct segoff_s Timer_Hook_Resume VAR16 VISIBLE16;
107
108 void VISIBLE16
handle_timer_hook(void)109 handle_timer_hook(void)
110 {
111 swcursor_check_event();
112 }
113
114 static void
hook_timer_irq(void)115 hook_timer_irq(void)
116 {
117 if (!CONFIG_VGA_EMULATE_TEXT)
118 return;
119 extern void entry_timer_hook(void);
120 extern void entry_timer_hook_extrastack(void);
121 struct segoff_s oldirq = GET_IVT(0x08);
122 struct segoff_s newirq = SEGOFF(get_global_seg(), (u32)entry_timer_hook);
123 if (CONFIG_VGA_ALLOCATE_EXTRA_STACK && GET_GLOBAL(ExtraStackSeg))
124 newirq = SEGOFF(get_global_seg(), (u32)entry_timer_hook_extrastack);
125 dprintf(1, "Hooking hardware timer irq (old=%x new=%x)\n"
126 , oldirq.segoff, newirq.segoff);
127 SET_VGA(Timer_Hook_Resume, oldirq);
128 SET_IVT(0x08, newirq);
129 }
130
131
132 /****************************************************************
133 * VGA post
134 ****************************************************************/
135
136 static void
init_bios_area(void)137 init_bios_area(void)
138 {
139 // init detected hardware BIOS Area
140 // set 80x25 color (not clear from RBIL but usual)
141 set_equipment_flags(0x30, 0x20);
142
143 // Set the basic modeset options
144 SET_BDA(modeset_ctl, 0x51);
145
146 SET_BDA(dcc_index, CONFIG_VGA_STDVGA_PORTS ? 0x08 : 0xff);
147
148 // FIXME
149 SET_BDA(video_msr, 0x00); // Unavailable on vanilla vga, but...
150 SET_BDA(video_pal, 0x00); // Unavailable on vanilla vga, but...
151 }
152
153 int VgaBDF VAR16 = -1;
154 int HaveRunInit VAR16;
155
156 void VISIBLE16
vga_post(struct bregs * regs)157 vga_post(struct bregs *regs)
158 {
159 serial_debug_preinit();
160 dprintf(1, "Start SeaVGABIOS (version %s)\n", VERSION);
161 dprintf(1, "VGABUILD: %s\n", BUILDINFO);
162 debug_enter(regs, DEBUG_VGA_POST);
163
164 if (CONFIG_VGA_PCI && !GET_GLOBAL(HaveRunInit)) {
165 u16 bdf = regs->ax;
166 if ((pci_config_readw(bdf, PCI_VENDOR_ID)
167 == GET_GLOBAL(rom_pci_data.vendor))
168 && (pci_config_readw(bdf, PCI_DEVICE_ID)
169 == GET_GLOBAL(rom_pci_data.device)))
170 SET_VGA(VgaBDF, bdf);
171 }
172
173 int ret = vgahw_setup();
174 if (ret) {
175 dprintf(1, "Failed to initialize VGA hardware. Exiting.\n");
176 return;
177 }
178
179 if (GET_GLOBAL(HaveRunInit))
180 return;
181
182 init_bios_area();
183
184 if (CONFIG_VGA_STDVGA_PORTS)
185 stdvga_build_video_param();
186
187 extern void entry_10(void);
188 SET_IVT(0x10, SEGOFF(get_global_seg(), (u32)entry_10));
189
190 allocate_extra_stack();
191
192 hook_timer_irq();
193
194 SET_VGA(HaveRunInit, 1);
195
196 // Fixup checksum
197 extern u8 _rom_header_size, _rom_header_checksum;
198 SET_VGA(_rom_header_checksum, 0);
199 u8 sum = -checksum_far(get_global_seg(), 0,
200 GET_GLOBAL(_rom_header_size) * 512);
201 SET_VGA(_rom_header_checksum, sum);
202 }
203