1 #ifndef _IPXE_ARM_IO_H
2 #define _IPXE_ARM_IO_H
3 
4 /** @file
5  *
6  * iPXE I/O API for ARM
7  *
8  */
9 
10 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
11 
12 #ifdef IOAPI_ARM
13 #define IOAPI_PREFIX_arm
14 #else
15 #define IOAPI_PREFIX_arm __arm_
16 #endif
17 
18 /*
19  * Memory space mappings
20  *
21  */
22 
23 /** Page shift */
24 #define PAGE_SHIFT 12
25 
26 /*
27  * Physical<->Bus address mappings
28  *
29  */
30 
31 static inline __always_inline unsigned long
IOAPI_INLINE(arm,phys_to_bus)32 IOAPI_INLINE ( arm, phys_to_bus ) ( unsigned long phys_addr ) {
33 	return phys_addr;
34 }
35 
36 static inline __always_inline unsigned long
IOAPI_INLINE(arm,bus_to_phys)37 IOAPI_INLINE ( arm, bus_to_phys ) ( unsigned long bus_addr ) {
38 	return bus_addr;
39 }
40 
41 /*
42  * MMIO reads and writes up to native word size
43  *
44  */
45 
46 #define ARM_READX( _api_func, _type, _insn_suffix, _reg_prefix )	      \
47 static inline __always_inline _type					      \
48 IOAPI_INLINE ( arm, _api_func ) ( volatile _type *io_addr ) {		      \
49 	_type data;							      \
50 	__asm__ __volatile__ ( "ldr" _insn_suffix " %" _reg_prefix "0, %1"    \
51 			       : "=r" ( data ) : "Qo" ( *io_addr ) );	      \
52 	return data;							      \
53 }
54 #ifdef __aarch64__
55 ARM_READX ( readb, uint8_t, "b", "w" );
56 ARM_READX ( readw, uint16_t, "h", "w" );
57 ARM_READX ( readl, uint32_t, "", "w" );
58 ARM_READX ( readq, uint64_t, "", "" );
59 #else
60 ARM_READX ( readb, uint8_t, "b", "" );
61 ARM_READX ( readw, uint16_t, "h", "" );
62 ARM_READX ( readl, uint32_t, "", "" );
63 #endif
64 
65 #define ARM_WRITEX( _api_func, _type, _insn_suffix, _reg_prefix )			\
66 static inline __always_inline void					      \
67 IOAPI_INLINE ( arm, _api_func ) ( _type data, volatile _type *io_addr ) {     \
68 	__asm__ __volatile__ ( "str" _insn_suffix " %" _reg_prefix "0, %1"    \
69 			       : : "r" ( data ), "Qo" ( *io_addr ) );	      \
70 }
71 #ifdef __aarch64__
72 ARM_WRITEX ( writeb, uint8_t, "b", "w" );
73 ARM_WRITEX ( writew, uint16_t, "h", "w" );
74 ARM_WRITEX ( writel, uint32_t, "", "w" );
75 ARM_WRITEX ( writeq, uint64_t, "", "" );
76 #else
77 ARM_WRITEX ( writeb, uint8_t, "b", "" );
78 ARM_WRITEX ( writew, uint16_t, "h", "" );
79 ARM_WRITEX ( writel, uint32_t, "", "" );
80 #endif
81 
82 /*
83  * Slow down I/O
84  *
85  */
86 static inline __always_inline void
IOAPI_INLINE(arm,iodelay)87 IOAPI_INLINE ( arm, iodelay ) ( void ) {
88 	/* Nothing to do */
89 }
90 
91 /*
92  * Memory barrier
93  *
94  */
95 static inline __always_inline void
IOAPI_INLINE(arm,mb)96 IOAPI_INLINE ( arm, mb ) ( void ) {
97 
98 #ifdef __aarch64__
99 	__asm__ __volatile__ ( "dmb sy" );
100 #else
101 	__asm__ __volatile__ ( "dmb" );
102 #endif
103 }
104 
105 #endif /* _IPXE_ARM_IO_H */
106