1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|*                                                                            *|
3|* Target Register Enum Values                                                *|
4|*                                                                            *|
5|* Automatically generated file, do not edit!                                 *|
6|*                                                                            *|
7\*===----------------------------------------------------------------------===*/
8
9/* Capstone Disassembly Engine */
10/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
11
12
13#ifdef GET_REGINFO_ENUM
14#undef GET_REGINFO_ENUM
15
16enum {
17  SystemZ_NoRegister,
18  SystemZ_CC = 1,
19  SystemZ_A0 = 2,
20  SystemZ_A1 = 3,
21  SystemZ_A2 = 4,
22  SystemZ_A3 = 5,
23  SystemZ_A4 = 6,
24  SystemZ_A5 = 7,
25  SystemZ_A6 = 8,
26  SystemZ_A7 = 9,
27  SystemZ_A8 = 10,
28  SystemZ_A9 = 11,
29  SystemZ_A10 = 12,
30  SystemZ_A11 = 13,
31  SystemZ_A12 = 14,
32  SystemZ_A13 = 15,
33  SystemZ_A14 = 16,
34  SystemZ_A15 = 17,
35  SystemZ_C0 = 18,
36  SystemZ_C1 = 19,
37  SystemZ_C2 = 20,
38  SystemZ_C3 = 21,
39  SystemZ_C4 = 22,
40  SystemZ_C5 = 23,
41  SystemZ_C6 = 24,
42  SystemZ_C7 = 25,
43  SystemZ_C8 = 26,
44  SystemZ_C9 = 27,
45  SystemZ_C10 = 28,
46  SystemZ_C11 = 29,
47  SystemZ_C12 = 30,
48  SystemZ_C13 = 31,
49  SystemZ_C14 = 32,
50  SystemZ_C15 = 33,
51  SystemZ_V0 = 34,
52  SystemZ_V1 = 35,
53  SystemZ_V2 = 36,
54  SystemZ_V3 = 37,
55  SystemZ_V4 = 38,
56  SystemZ_V5 = 39,
57  SystemZ_V6 = 40,
58  SystemZ_V7 = 41,
59  SystemZ_V8 = 42,
60  SystemZ_V9 = 43,
61  SystemZ_V10 = 44,
62  SystemZ_V11 = 45,
63  SystemZ_V12 = 46,
64  SystemZ_V13 = 47,
65  SystemZ_V14 = 48,
66  SystemZ_V15 = 49,
67  SystemZ_V16 = 50,
68  SystemZ_V17 = 51,
69  SystemZ_V18 = 52,
70  SystemZ_V19 = 53,
71  SystemZ_V20 = 54,
72  SystemZ_V21 = 55,
73  SystemZ_V22 = 56,
74  SystemZ_V23 = 57,
75  SystemZ_V24 = 58,
76  SystemZ_V25 = 59,
77  SystemZ_V26 = 60,
78  SystemZ_V27 = 61,
79  SystemZ_V28 = 62,
80  SystemZ_V29 = 63,
81  SystemZ_V30 = 64,
82  SystemZ_V31 = 65,
83  SystemZ_F0D = 66,
84  SystemZ_F1D = 67,
85  SystemZ_F2D = 68,
86  SystemZ_F3D = 69,
87  SystemZ_F4D = 70,
88  SystemZ_F5D = 71,
89  SystemZ_F6D = 72,
90  SystemZ_F7D = 73,
91  SystemZ_F8D = 74,
92  SystemZ_F9D = 75,
93  SystemZ_F10D = 76,
94  SystemZ_F11D = 77,
95  SystemZ_F12D = 78,
96  SystemZ_F13D = 79,
97  SystemZ_F14D = 80,
98  SystemZ_F15D = 81,
99  SystemZ_F16D = 82,
100  SystemZ_F17D = 83,
101  SystemZ_F18D = 84,
102  SystemZ_F19D = 85,
103  SystemZ_F20D = 86,
104  SystemZ_F21D = 87,
105  SystemZ_F22D = 88,
106  SystemZ_F23D = 89,
107  SystemZ_F24D = 90,
108  SystemZ_F25D = 91,
109  SystemZ_F26D = 92,
110  SystemZ_F27D = 93,
111  SystemZ_F28D = 94,
112  SystemZ_F29D = 95,
113  SystemZ_F30D = 96,
114  SystemZ_F31D = 97,
115  SystemZ_F0Q = 98,
116  SystemZ_F1Q = 99,
117  SystemZ_F4Q = 100,
118  SystemZ_F5Q = 101,
119  SystemZ_F8Q = 102,
120  SystemZ_F9Q = 103,
121  SystemZ_F12Q = 104,
122  SystemZ_F13Q = 105,
123  SystemZ_F0S = 106,
124  SystemZ_F1S = 107,
125  SystemZ_F2S = 108,
126  SystemZ_F3S = 109,
127  SystemZ_F4S = 110,
128  SystemZ_F5S = 111,
129  SystemZ_F6S = 112,
130  SystemZ_F7S = 113,
131  SystemZ_F8S = 114,
132  SystemZ_F9S = 115,
133  SystemZ_F10S = 116,
134  SystemZ_F11S = 117,
135  SystemZ_F12S = 118,
136  SystemZ_F13S = 119,
137  SystemZ_F14S = 120,
138  SystemZ_F15S = 121,
139  SystemZ_F16S = 122,
140  SystemZ_F17S = 123,
141  SystemZ_F18S = 124,
142  SystemZ_F19S = 125,
143  SystemZ_F20S = 126,
144  SystemZ_F21S = 127,
145  SystemZ_F22S = 128,
146  SystemZ_F23S = 129,
147  SystemZ_F24S = 130,
148  SystemZ_F25S = 131,
149  SystemZ_F26S = 132,
150  SystemZ_F27S = 133,
151  SystemZ_F28S = 134,
152  SystemZ_F29S = 135,
153  SystemZ_F30S = 136,
154  SystemZ_F31S = 137,
155  SystemZ_R0D = 138,
156  SystemZ_R1D = 139,
157  SystemZ_R2D = 140,
158  SystemZ_R3D = 141,
159  SystemZ_R4D = 142,
160  SystemZ_R5D = 143,
161  SystemZ_R6D = 144,
162  SystemZ_R7D = 145,
163  SystemZ_R8D = 146,
164  SystemZ_R9D = 147,
165  SystemZ_R10D = 148,
166  SystemZ_R11D = 149,
167  SystemZ_R12D = 150,
168  SystemZ_R13D = 151,
169  SystemZ_R14D = 152,
170  SystemZ_R15D = 153,
171  SystemZ_R0H = 154,
172  SystemZ_R1H = 155,
173  SystemZ_R2H = 156,
174  SystemZ_R3H = 157,
175  SystemZ_R4H = 158,
176  SystemZ_R5H = 159,
177  SystemZ_R6H = 160,
178  SystemZ_R7H = 161,
179  SystemZ_R8H = 162,
180  SystemZ_R9H = 163,
181  SystemZ_R10H = 164,
182  SystemZ_R11H = 165,
183  SystemZ_R12H = 166,
184  SystemZ_R13H = 167,
185  SystemZ_R14H = 168,
186  SystemZ_R15H = 169,
187  SystemZ_R0L = 170,
188  SystemZ_R1L = 171,
189  SystemZ_R2L = 172,
190  SystemZ_R3L = 173,
191  SystemZ_R4L = 174,
192  SystemZ_R5L = 175,
193  SystemZ_R6L = 176,
194  SystemZ_R7L = 177,
195  SystemZ_R8L = 178,
196  SystemZ_R9L = 179,
197  SystemZ_R10L = 180,
198  SystemZ_R11L = 181,
199  SystemZ_R12L = 182,
200  SystemZ_R13L = 183,
201  SystemZ_R14L = 184,
202  SystemZ_R15L = 185,
203  SystemZ_R0Q = 186,
204  SystemZ_R2Q = 187,
205  SystemZ_R4Q = 188,
206  SystemZ_R6Q = 189,
207  SystemZ_R8Q = 190,
208  SystemZ_R10Q = 191,
209  SystemZ_R12Q = 192,
210  SystemZ_R14Q = 193,
211  SystemZ_NUM_TARGET_REGS 	// 194
212};
213
214// Register classes
215enum {
216  SystemZ_GRX32BitRegClassID = 0,
217  SystemZ_VR32BitRegClassID = 1,
218  SystemZ_AR32BitRegClassID = 2,
219  SystemZ_FP32BitRegClassID = 3,
220  SystemZ_GR32BitRegClassID = 4,
221  SystemZ_GRH32BitRegClassID = 5,
222  SystemZ_ADDR32BitRegClassID = 6,
223  SystemZ_CCRRegClassID = 7,
224  SystemZ_AnyRegBitRegClassID = 8,
225  SystemZ_AnyRegBit_with_subreg_r32RegClassID = 9,
226  SystemZ_VR64BitRegClassID = 10,
227  SystemZ_AnyRegBit_with_subreg_r64RegClassID = 11,
228  SystemZ_CR64BitRegClassID = 12,
229  SystemZ_FP64BitRegClassID = 13,
230  SystemZ_GR64BitRegClassID = 14,
231  SystemZ_ADDR64BitRegClassID = 15,
232  SystemZ_VR128BitRegClassID = 16,
233  SystemZ_VF128BitRegClassID = 17,
234  SystemZ_FP128BitRegClassID = 18,
235  SystemZ_GR128BitRegClassID = 19,
236  SystemZ_ADDR128BitRegClassID = 20,
237};
238#endif // GET_REGINFO_ENUM
239
240/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
241|*                                                                            *|
242|* MC Register Information                                                    *|
243|*                                                                            *|
244|* Automatically generated file, do not edit!                                 *|
245|*                                                                            *|
246\*===----------------------------------------------------------------------===*/
247
248
249#ifdef GET_REGINFO_MC_DESC
250#undef GET_REGINFO_MC_DESC
251
252static const MCPhysReg SystemZRegDiffLists[] = {
253  /* 0 */ 64857, 1, 1, 1, 0,
254  /* 5 */ 65325, 1, 0,
255  /* 8 */ 65471, 2, 0,
256  /* 11 */ 65473, 2, 0,
257  /* 14 */ 65475, 2, 0,
258  /* 17 */ 65477, 2, 0,
259  /* 20 */ 32, 40, 0,
260  /* 23 */ 65506, 40, 65494, 40, 0,
261  /* 28 */ 65508, 40, 65494, 40, 0,
262  /* 33 */ 65510, 40, 65494, 40, 0,
263  /* 38 */ 65512, 40, 65494, 40, 0,
264  /* 43 */ 65504, 40, 0,
265  /* 46 */ 65520, 40, 0,
266  /* 49 */ 65504, 41, 0,
267  /* 52 */ 65520, 41, 0,
268  /* 55 */ 65504, 42, 0,
269  /* 58 */ 65520, 42, 0,
270  /* 61 */ 65504, 43, 0,
271  /* 64 */ 65520, 43, 0,
272  /* 67 */ 65504, 44, 0,
273  /* 70 */ 65520, 44, 0,
274  /* 73 */ 65504, 45, 0,
275  /* 76 */ 65520, 45, 0,
276  /* 79 */ 65504, 46, 0,
277  /* 82 */ 65520, 46, 0,
278  /* 85 */ 65504, 47, 0,
279  /* 88 */ 65520, 47, 0,
280  /* 91 */ 65504, 48, 0,
281  /* 94 */ 65520, 48, 0,
282  /* 97 */ 65496, 65504, 56, 0,
283  /* 101 */ 65496, 65504, 58, 0,
284  /* 105 */ 65496, 65504, 60, 0,
285  /* 109 */ 65496, 65504, 62, 0,
286  /* 113 */ 65496, 65504, 64, 0,
287  /* 117 */ 65261, 0,
288  /* 119 */ 65294, 0,
289  /* 121 */ 65463, 0,
290  /* 123 */ 65503, 0,
291  /* 125 */ 65496, 65504, 0,
292  /* 128 */ 65489, 32, 65520, 65519, 32, 65520, 0,
293  /* 135 */ 65490, 32, 65520, 65519, 32, 65520, 0,
294  /* 142 */ 65491, 32, 65520, 65519, 32, 65520, 0,
295  /* 149 */ 65492, 32, 65520, 65519, 32, 65520, 0,
296  /* 156 */ 65493, 32, 65520, 65519, 32, 65520, 0,
297  /* 163 */ 65494, 32, 65520, 65519, 32, 65520, 0,
298  /* 170 */ 65495, 32, 65520, 65519, 32, 65520, 0,
299  /* 177 */ 65496, 32, 65520, 65519, 32, 65520, 0,
300  /* 184 */ 65535, 0,
301};
302
303static const uint16_t SystemZSubRegIdxLists[] = {
304  /* 0 */ 6, 1, 0,
305  /* 3 */ 7, 6, 1, 2, 4, 3, 0,
306  /* 10 */ 7, 8, 2, 5, 0,
307  /* 15 */ 9, 8, 0,
308};
309
310static const MCRegisterDesc SystemZRegDesc[] = { // Descriptors
311  { 3, 0, 0, 0, 0, 0 },
312  { 226, 4, 4, 2, 2945, 0 },
313  { 20, 4, 4, 2, 2945, 0 },
314  { 49, 4, 4, 2, 2945, 0 },
315  { 74, 4, 4, 2, 2945, 0 },
316  { 99, 4, 4, 2, 2945, 0 },
317  { 124, 4, 4, 2, 2945, 0 },
318  { 149, 4, 4, 2, 2945, 0 },
319  { 166, 4, 4, 2, 2945, 0 },
320  { 183, 4, 4, 2, 2945, 0 },
321  { 200, 4, 4, 2, 2945, 0 },
322  { 217, 4, 4, 2, 2945, 0 },
323  { 0, 4, 4, 2, 2945, 0 },
324  { 29, 4, 4, 2, 2945, 0 },
325  { 58, 4, 4, 2, 2945, 0 },
326  { 83, 4, 4, 2, 2945, 0 },
327  { 108, 4, 4, 2, 2945, 0 },
328  { 133, 4, 4, 2, 2945, 0 },
329  { 23, 4, 4, 2, 2945, 0 },
330  { 52, 4, 4, 2, 2945, 0 },
331  { 77, 4, 4, 2, 2945, 0 },
332  { 102, 4, 4, 2, 2945, 0 },
333  { 127, 4, 4, 2, 2945, 0 },
334  { 152, 4, 4, 2, 2945, 0 },
335  { 169, 4, 4, 2, 2945, 0 },
336  { 186, 4, 4, 2, 2945, 0 },
337  { 203, 4, 4, 2, 2945, 0 },
338  { 220, 4, 4, 2, 2945, 0 },
339  { 4, 4, 4, 2, 2945, 0 },
340  { 33, 4, 4, 2, 2945, 0 },
341  { 62, 4, 4, 2, 2945, 0 },
342  { 87, 4, 4, 2, 2945, 0 },
343  { 112, 4, 4, 2, 2945, 0 },
344  { 137, 4, 4, 2, 2945, 0 },
345  { 26, 20, 4, 15, 2945, 8 },
346  { 55, 20, 4, 15, 2945, 8 },
347  { 80, 20, 4, 15, 2945, 8 },
348  { 105, 20, 4, 15, 2945, 8 },
349  { 130, 20, 4, 15, 2945, 8 },
350  { 155, 20, 4, 15, 2945, 8 },
351  { 172, 20, 4, 15, 2945, 8 },
352  { 189, 20, 4, 15, 2945, 8 },
353  { 206, 20, 4, 15, 2945, 8 },
354  { 223, 20, 4, 15, 2945, 8 },
355  { 8, 20, 4, 15, 2945, 8 },
356  { 37, 20, 4, 15, 2945, 8 },
357  { 66, 20, 4, 15, 2945, 8 },
358  { 91, 20, 4, 15, 2945, 8 },
359  { 116, 20, 4, 15, 2945, 8 },
360  { 141, 20, 4, 15, 2945, 8 },
361  { 158, 20, 4, 15, 2945, 8 },
362  { 175, 20, 4, 15, 2945, 8 },
363  { 192, 20, 4, 15, 2945, 8 },
364  { 209, 20, 4, 15, 2945, 8 },
365  { 12, 20, 4, 15, 2945, 8 },
366  { 41, 20, 4, 15, 2945, 8 },
367  { 70, 20, 4, 15, 2945, 8 },
368  { 95, 20, 4, 15, 2945, 8 },
369  { 120, 20, 4, 15, 2945, 8 },
370  { 145, 20, 4, 15, 2945, 8 },
371  { 162, 20, 4, 15, 2945, 8 },
372  { 179, 20, 4, 15, 2945, 8 },
373  { 196, 20, 4, 15, 2945, 8 },
374  { 213, 20, 4, 15, 2945, 8 },
375  { 16, 20, 4, 15, 2945, 8 },
376  { 45, 20, 4, 15, 2945, 8 },
377  { 249, 21, 114, 16, 1969, 8 },
378  { 277, 21, 114, 16, 1969, 8 },
379  { 300, 21, 110, 16, 1969, 8 },
380  { 323, 21, 110, 16, 1969, 8 },
381  { 346, 21, 110, 16, 1969, 8 },
382  { 369, 21, 110, 16, 1969, 8 },
383  { 387, 21, 106, 16, 1969, 8 },
384  { 405, 21, 106, 16, 1969, 8 },
385  { 423, 21, 106, 16, 1969, 8 },
386  { 441, 21, 106, 16, 1969, 8 },
387  { 229, 21, 102, 16, 1969, 8 },
388  { 257, 21, 102, 16, 1969, 8 },
389  { 285, 21, 102, 16, 1969, 8 },
390  { 308, 21, 102, 16, 1969, 8 },
391  { 331, 21, 98, 16, 1969, 8 },
392  { 354, 21, 98, 16, 1969, 8 },
393  { 377, 21, 126, 16, 1969, 8 },
394  { 395, 21, 126, 16, 1969, 8 },
395  { 413, 21, 126, 16, 1969, 8 },
396  { 431, 21, 126, 16, 1969, 8 },
397  { 239, 21, 126, 16, 1969, 8 },
398  { 267, 21, 126, 16, 1969, 8 },
399  { 295, 21, 126, 16, 1969, 8 },
400  { 318, 21, 126, 16, 1969, 8 },
401  { 341, 21, 126, 16, 1969, 8 },
402  { 364, 21, 126, 16, 1969, 8 },
403  { 382, 21, 126, 16, 1969, 8 },
404  { 400, 21, 126, 16, 1969, 8 },
405  { 418, 21, 126, 16, 1969, 8 },
406  { 436, 21, 126, 16, 1969, 8 },
407  { 244, 21, 126, 16, 1969, 8 },
408  { 272, 21, 126, 16, 1969, 8 },
409  { 594, 23, 4, 10, 129, 7 },
410  { 602, 23, 4, 10, 129, 7 },
411  { 630, 28, 4, 10, 177, 7 },
412  { 638, 28, 4, 10, 177, 7 },
413  { 646, 33, 4, 10, 225, 7 },
414  { 654, 33, 4, 10, 225, 7 },
415  { 606, 38, 4, 10, 273, 7 },
416  { 620, 38, 4, 10, 273, 7 },
417  { 673, 4, 113, 2, 1937, 0 },
418  { 692, 4, 113, 2, 1937, 0 },
419  { 706, 4, 109, 2, 1937, 0 },
420  { 720, 4, 109, 2, 1937, 0 },
421  { 734, 4, 109, 2, 1937, 0 },
422  { 748, 4, 109, 2, 1937, 0 },
423  { 762, 4, 105, 2, 1937, 0 },
424  { 776, 4, 105, 2, 1937, 0 },
425  { 790, 4, 105, 2, 1937, 0 },
426  { 804, 4, 105, 2, 1937, 0 },
427  { 658, 4, 101, 2, 1937, 0 },
428  { 677, 4, 101, 2, 1937, 0 },
429  { 696, 4, 101, 2, 1937, 0 },
430  { 710, 4, 101, 2, 1937, 0 },
431  { 724, 4, 97, 2, 1937, 0 },
432  { 738, 4, 97, 2, 1937, 0 },
433  { 752, 4, 125, 2, 1937, 0 },
434  { 766, 4, 125, 2, 1937, 0 },
435  { 780, 4, 125, 2, 1937, 0 },
436  { 794, 4, 125, 2, 1937, 0 },
437  { 663, 4, 125, 2, 1937, 0 },
438  { 682, 4, 125, 2, 1937, 0 },
439  { 701, 4, 125, 2, 1937, 0 },
440  { 715, 4, 125, 2, 1937, 0 },
441  { 729, 4, 125, 2, 1937, 0 },
442  { 743, 4, 125, 2, 1937, 0 },
443  { 757, 4, 125, 2, 1937, 0 },
444  { 771, 4, 125, 2, 1937, 0 },
445  { 785, 4, 125, 2, 1937, 0 },
446  { 799, 4, 125, 2, 1937, 0 },
447  { 668, 4, 125, 2, 1937, 0 },
448  { 687, 4, 125, 2, 1937, 0 },
449  { 253, 132, 92, 0, 82, 4 },
450  { 281, 132, 86, 0, 82, 4 },
451  { 304, 132, 86, 0, 82, 4 },
452  { 327, 132, 80, 0, 82, 4 },
453  { 350, 132, 80, 0, 82, 4 },
454  { 373, 132, 74, 0, 82, 4 },
455  { 391, 132, 74, 0, 82, 4 },
456  { 409, 132, 68, 0, 82, 4 },
457  { 427, 132, 68, 0, 82, 4 },
458  { 445, 132, 62, 0, 82, 4 },
459  { 234, 132, 62, 0, 82, 4 },
460  { 262, 132, 56, 0, 82, 4 },
461  { 290, 132, 56, 0, 82, 4 },
462  { 313, 132, 50, 0, 82, 4 },
463  { 336, 132, 50, 0, 82, 4 },
464  { 359, 132, 21, 0, 82, 4 },
465  { 454, 4, 94, 2, 1906, 0 },
466  { 463, 4, 88, 2, 1906, 0 },
467  { 472, 4, 88, 2, 1906, 0 },
468  { 481, 4, 82, 2, 1906, 0 },
469  { 490, 4, 82, 2, 1906, 0 },
470  { 499, 4, 76, 2, 1906, 0 },
471  { 503, 4, 76, 2, 1906, 0 },
472  { 507, 4, 70, 2, 1906, 0 },
473  { 511, 4, 70, 2, 1906, 0 },
474  { 515, 4, 64, 2, 1906, 0 },
475  { 449, 4, 64, 2, 1906, 0 },
476  { 458, 4, 58, 2, 1906, 0 },
477  { 467, 4, 58, 2, 1906, 0 },
478  { 476, 4, 52, 2, 1906, 0 },
479  { 485, 4, 52, 2, 1906, 0 },
480  { 494, 4, 46, 2, 1906, 0 },
481  { 524, 4, 91, 2, 1874, 0 },
482  { 533, 4, 85, 2, 1874, 0 },
483  { 542, 4, 85, 2, 1874, 0 },
484  { 551, 4, 79, 2, 1874, 0 },
485  { 560, 4, 79, 2, 1874, 0 },
486  { 569, 4, 73, 2, 1874, 0 },
487  { 573, 4, 73, 2, 1874, 0 },
488  { 577, 4, 67, 2, 1874, 0 },
489  { 581, 4, 67, 2, 1874, 0 },
490  { 585, 4, 61, 2, 1874, 0 },
491  { 519, 4, 61, 2, 1874, 0 },
492  { 528, 4, 55, 2, 1874, 0 },
493  { 537, 4, 55, 2, 1874, 0 },
494  { 546, 4, 49, 2, 1874, 0 },
495  { 555, 4, 49, 2, 1874, 0 },
496  { 564, 4, 43, 2, 1874, 0 },
497  { 598, 128, 4, 3, 4, 2 },
498  { 616, 135, 4, 3, 4, 2 },
499  { 634, 142, 4, 3, 4, 2 },
500  { 642, 149, 4, 3, 4, 2 },
501  { 650, 156, 4, 3, 4, 2 },
502  { 589, 163, 4, 3, 4, 2 },
503  { 611, 170, 4, 3, 4, 2 },
504  { 625, 177, 4, 3, 4, 2 },
505};
506
507  // GRX32Bit Register Class...
508  static const MCPhysReg GRX32Bit[] = {
509    SystemZ_R0L, SystemZ_R1L, SystemZ_R2L, SystemZ_R3L, SystemZ_R4L, SystemZ_R5L, SystemZ_R0H, SystemZ_R1H, SystemZ_R2H, SystemZ_R3H, SystemZ_R4H, SystemZ_R5H, SystemZ_R15L, SystemZ_R15H, SystemZ_R14L, SystemZ_R14H, SystemZ_R13L, SystemZ_R13H, SystemZ_R12L, SystemZ_R12H, SystemZ_R11L, SystemZ_R11H, SystemZ_R10L, SystemZ_R10H, SystemZ_R9L, SystemZ_R9H, SystemZ_R8L, SystemZ_R8H, SystemZ_R7L, SystemZ_R7H, SystemZ_R6L, SystemZ_R6H,
510  };
511
512  // GRX32Bit Bit set.
513  static const uint8_t GRX32BitBits[] = {
514    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x03,
515  };
516
517  // VR32Bit Register Class...
518  static const MCPhysReg VR32Bit[] = {
519    SystemZ_F0S, SystemZ_F1S, SystemZ_F2S, SystemZ_F3S, SystemZ_F4S, SystemZ_F5S, SystemZ_F6S, SystemZ_F7S, SystemZ_F16S, SystemZ_F17S, SystemZ_F18S, SystemZ_F19S, SystemZ_F20S, SystemZ_F21S, SystemZ_F22S, SystemZ_F23S, SystemZ_F24S, SystemZ_F25S, SystemZ_F26S, SystemZ_F27S, SystemZ_F28S, SystemZ_F29S, SystemZ_F30S, SystemZ_F31S, SystemZ_F8S, SystemZ_F9S, SystemZ_F10S, SystemZ_F11S, SystemZ_F12S, SystemZ_F13S, SystemZ_F14S, SystemZ_F15S,
520  };
521
522  // VR32Bit Bit set.
523  static const uint8_t VR32BitBits[] = {
524    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x03,
525  };
526
527  // AR32Bit Register Class...
528  static const MCPhysReg AR32Bit[] = {
529    SystemZ_A0, SystemZ_A1, SystemZ_A2, SystemZ_A3, SystemZ_A4, SystemZ_A5, SystemZ_A6, SystemZ_A7, SystemZ_A8, SystemZ_A9, SystemZ_A10, SystemZ_A11, SystemZ_A12, SystemZ_A13, SystemZ_A14, SystemZ_A15,
530  };
531
532  // AR32Bit Bit set.
533  static const uint8_t AR32BitBits[] = {
534    0xfc, 0xff, 0x03,
535  };
536
537  // FP32Bit Register Class...
538  static const MCPhysReg FP32Bit[] = {
539    SystemZ_F0S, SystemZ_F1S, SystemZ_F2S, SystemZ_F3S, SystemZ_F4S, SystemZ_F5S, SystemZ_F6S, SystemZ_F7S, SystemZ_F8S, SystemZ_F9S, SystemZ_F10S, SystemZ_F11S, SystemZ_F12S, SystemZ_F13S, SystemZ_F14S, SystemZ_F15S,
540  };
541
542  // FP32Bit Bit set.
543  static const uint8_t FP32BitBits[] = {
544    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03,
545  };
546
547  // GR32Bit Register Class...
548  static const MCPhysReg GR32Bit[] = {
549    SystemZ_R0L, SystemZ_R1L, SystemZ_R2L, SystemZ_R3L, SystemZ_R4L, SystemZ_R5L, SystemZ_R15L, SystemZ_R14L, SystemZ_R13L, SystemZ_R12L, SystemZ_R11L, SystemZ_R10L, SystemZ_R9L, SystemZ_R8L, SystemZ_R7L, SystemZ_R6L,
550  };
551
552  // GR32Bit Bit set.
553  static const uint8_t GR32BitBits[] = {
554    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03,
555  };
556
557  // GRH32Bit Register Class...
558  static const MCPhysReg GRH32Bit[] = {
559    SystemZ_R0H, SystemZ_R1H, SystemZ_R2H, SystemZ_R3H, SystemZ_R4H, SystemZ_R5H, SystemZ_R15H, SystemZ_R14H, SystemZ_R13H, SystemZ_R12H, SystemZ_R11H, SystemZ_R10H, SystemZ_R9H, SystemZ_R8H, SystemZ_R7H, SystemZ_R6H,
560  };
561
562  // GRH32Bit Bit set.
563  static const uint8_t GRH32BitBits[] = {
564    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03,
565  };
566
567  // ADDR32Bit Register Class...
568  static const MCPhysReg ADDR32Bit[] = {
569    SystemZ_R1L, SystemZ_R2L, SystemZ_R3L, SystemZ_R4L, SystemZ_R5L, SystemZ_R15L, SystemZ_R14L, SystemZ_R13L, SystemZ_R12L, SystemZ_R11L, SystemZ_R10L, SystemZ_R9L, SystemZ_R8L, SystemZ_R7L, SystemZ_R6L,
570  };
571
572  // ADDR32Bit Bit set.
573  static const uint8_t ADDR32BitBits[] = {
574    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x03,
575  };
576
577  // CCR Register Class...
578  static const MCPhysReg CCR[] = {
579    SystemZ_CC,
580  };
581
582  // CCR Bit set.
583  static const uint8_t CCRBits[] = {
584    0x02,
585  };
586
587  // AnyRegBit Register Class...
588  static const MCPhysReg AnyRegBit[] = {
589    SystemZ_R0D, SystemZ_R1D, SystemZ_R2D, SystemZ_R3D, SystemZ_R4D, SystemZ_R5D, SystemZ_R6D, SystemZ_R7D, SystemZ_R8D, SystemZ_R9D, SystemZ_R10D, SystemZ_R11D, SystemZ_R12D, SystemZ_R13D, SystemZ_R14D, SystemZ_R15D, SystemZ_F0D, SystemZ_F1D, SystemZ_F2D, SystemZ_F3D, SystemZ_F4D, SystemZ_F5D, SystemZ_F6D, SystemZ_F7D, SystemZ_F8D, SystemZ_F9D, SystemZ_F10D, SystemZ_F11D, SystemZ_F12D, SystemZ_F13D, SystemZ_F14D, SystemZ_F15D, SystemZ_V0, SystemZ_V1, SystemZ_V2, SystemZ_V3, SystemZ_V4, SystemZ_V5, SystemZ_V6, SystemZ_V7, SystemZ_V8, SystemZ_V9, SystemZ_V10, SystemZ_V11, SystemZ_V12, SystemZ_V13, SystemZ_V14, SystemZ_V15,
590  };
591
592  // AnyRegBit Bit set.
593  static const uint8_t AnyRegBitBits[] = {
594    0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, 0x00, 0xfc, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03,
595  };
596
597  // AnyRegBit_with_subreg_r32 Register Class...
598  static const MCPhysReg AnyRegBit_with_subreg_r32[] = {
599    SystemZ_F0D, SystemZ_F1D, SystemZ_F2D, SystemZ_F3D, SystemZ_F4D, SystemZ_F5D, SystemZ_F6D, SystemZ_F7D, SystemZ_F8D, SystemZ_F9D, SystemZ_F10D, SystemZ_F11D, SystemZ_F12D, SystemZ_F13D, SystemZ_F14D, SystemZ_F15D, SystemZ_V0, SystemZ_V1, SystemZ_V2, SystemZ_V3, SystemZ_V4, SystemZ_V5, SystemZ_V6, SystemZ_V7, SystemZ_V8, SystemZ_V9, SystemZ_V10, SystemZ_V11, SystemZ_V12, SystemZ_V13, SystemZ_V14, SystemZ_V15,
600  };
601
602  // AnyRegBit_with_subreg_r32 Bit set.
603  static const uint8_t AnyRegBit_with_subreg_r32Bits[] = {
604    0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, 0x00, 0xfc, 0xff, 0x03,
605  };
606
607  // VR64Bit Register Class...
608  static const MCPhysReg VR64Bit[] = {
609    SystemZ_F0D, SystemZ_F1D, SystemZ_F2D, SystemZ_F3D, SystemZ_F4D, SystemZ_F5D, SystemZ_F6D, SystemZ_F7D, SystemZ_F16D, SystemZ_F17D, SystemZ_F18D, SystemZ_F19D, SystemZ_F20D, SystemZ_F21D, SystemZ_F22D, SystemZ_F23D, SystemZ_F24D, SystemZ_F25D, SystemZ_F26D, SystemZ_F27D, SystemZ_F28D, SystemZ_F29D, SystemZ_F30D, SystemZ_F31D, SystemZ_F8D, SystemZ_F9D, SystemZ_F10D, SystemZ_F11D, SystemZ_F12D, SystemZ_F13D, SystemZ_F14D, SystemZ_F15D,
610  };
611
612  // VR64Bit Bit set.
613  static const uint8_t VR64BitBits[] = {
614    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x03,
615  };
616
617  // AnyRegBit_with_subreg_r64 Register Class...
618  static const MCPhysReg AnyRegBit_with_subreg_r64[] = {
619    SystemZ_V0, SystemZ_V1, SystemZ_V2, SystemZ_V3, SystemZ_V4, SystemZ_V5, SystemZ_V6, SystemZ_V7, SystemZ_V8, SystemZ_V9, SystemZ_V10, SystemZ_V11, SystemZ_V12, SystemZ_V13, SystemZ_V14, SystemZ_V15,
620  };
621
622  // AnyRegBit_with_subreg_r64 Bit set.
623  static const uint8_t AnyRegBit_with_subreg_r64Bits[] = {
624    0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03,
625  };
626
627  // CR64Bit Register Class...
628  static const MCPhysReg CR64Bit[] = {
629    SystemZ_C0, SystemZ_C1, SystemZ_C2, SystemZ_C3, SystemZ_C4, SystemZ_C5, SystemZ_C6, SystemZ_C7, SystemZ_C8, SystemZ_C9, SystemZ_C10, SystemZ_C11, SystemZ_C12, SystemZ_C13, SystemZ_C14, SystemZ_C15,
630  };
631
632  // CR64Bit Bit set.
633  static const uint8_t CR64BitBits[] = {
634    0x00, 0x00, 0xfc, 0xff, 0x03,
635  };
636
637  // FP64Bit Register Class...
638  static const MCPhysReg FP64Bit[] = {
639    SystemZ_F0D, SystemZ_F1D, SystemZ_F2D, SystemZ_F3D, SystemZ_F4D, SystemZ_F5D, SystemZ_F6D, SystemZ_F7D, SystemZ_F8D, SystemZ_F9D, SystemZ_F10D, SystemZ_F11D, SystemZ_F12D, SystemZ_F13D, SystemZ_F14D, SystemZ_F15D,
640  };
641
642  // FP64Bit Bit set.
643  static const uint8_t FP64BitBits[] = {
644    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03,
645  };
646
647  // GR64Bit Register Class...
648  static const MCPhysReg GR64Bit[] = {
649    SystemZ_R0D, SystemZ_R1D, SystemZ_R2D, SystemZ_R3D, SystemZ_R4D, SystemZ_R5D, SystemZ_R15D, SystemZ_R14D, SystemZ_R13D, SystemZ_R12D, SystemZ_R11D, SystemZ_R10D, SystemZ_R9D, SystemZ_R8D, SystemZ_R7D, SystemZ_R6D,
650  };
651
652  // GR64Bit Bit set.
653  static const uint8_t GR64BitBits[] = {
654    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03,
655  };
656
657  // ADDR64Bit Register Class...
658  static const MCPhysReg ADDR64Bit[] = {
659    SystemZ_R1D, SystemZ_R2D, SystemZ_R3D, SystemZ_R4D, SystemZ_R5D, SystemZ_R15D, SystemZ_R14D, SystemZ_R13D, SystemZ_R12D, SystemZ_R11D, SystemZ_R10D, SystemZ_R9D, SystemZ_R8D, SystemZ_R7D, SystemZ_R6D,
660  };
661
662  // ADDR64Bit Bit set.
663  static const uint8_t ADDR64BitBits[] = {
664    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x03,
665  };
666
667  // VR128Bit Register Class...
668  static const MCPhysReg VR128Bit[] = {
669    SystemZ_V0, SystemZ_V1, SystemZ_V2, SystemZ_V3, SystemZ_V4, SystemZ_V5, SystemZ_V6, SystemZ_V7, SystemZ_V16, SystemZ_V17, SystemZ_V18, SystemZ_V19, SystemZ_V20, SystemZ_V21, SystemZ_V22, SystemZ_V23, SystemZ_V24, SystemZ_V25, SystemZ_V26, SystemZ_V27, SystemZ_V28, SystemZ_V29, SystemZ_V30, SystemZ_V31, SystemZ_V8, SystemZ_V9, SystemZ_V10, SystemZ_V11, SystemZ_V12, SystemZ_V13, SystemZ_V14, SystemZ_V15,
670  };
671
672  // VR128Bit Bit set.
673  static const uint8_t VR128BitBits[] = {
674    0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x03,
675  };
676
677  // VF128Bit Register Class...
678  static const MCPhysReg VF128Bit[] = {
679    SystemZ_V0, SystemZ_V1, SystemZ_V2, SystemZ_V3, SystemZ_V4, SystemZ_V5, SystemZ_V6, SystemZ_V7, SystemZ_V8, SystemZ_V9, SystemZ_V10, SystemZ_V11, SystemZ_V12, SystemZ_V13, SystemZ_V14, SystemZ_V15,
680  };
681
682  // VF128Bit Bit set.
683  static const uint8_t VF128BitBits[] = {
684    0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03,
685  };
686
687  // FP128Bit Register Class...
688  static const MCPhysReg FP128Bit[] = {
689    SystemZ_F0Q, SystemZ_F1Q, SystemZ_F4Q, SystemZ_F5Q, SystemZ_F8Q, SystemZ_F9Q, SystemZ_F12Q, SystemZ_F13Q,
690  };
691
692  // FP128Bit Bit set.
693  static const uint8_t FP128BitBits[] = {
694    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03,
695  };
696
697  // GR128Bit Register Class...
698  static const MCPhysReg GR128Bit[] = {
699    SystemZ_R0Q, SystemZ_R2Q, SystemZ_R4Q, SystemZ_R12Q, SystemZ_R10Q, SystemZ_R8Q, SystemZ_R6Q, SystemZ_R14Q,
700  };
701
702  // GR128Bit Bit set.
703  static const uint8_t GR128BitBits[] = {
704    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03,
705  };
706
707  // ADDR128Bit Register Class...
708  static const MCPhysReg ADDR128Bit[] = {
709    SystemZ_R2Q, SystemZ_R4Q, SystemZ_R12Q, SystemZ_R10Q, SystemZ_R8Q, SystemZ_R6Q, SystemZ_R14Q,
710  };
711
712  // ADDR128Bit Bit set.
713  static const uint8_t ADDR128BitBits[] = {
714    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03,
715  };
716
717static const MCRegisterClass SystemZMCRegisterClasses[] = {
718  { GRX32Bit, GRX32BitBits, sizeof(GRX32BitBits) },
719  { VR32Bit, VR32BitBits, sizeof(VR32BitBits) },
720  { AR32Bit, AR32BitBits, sizeof(AR32BitBits) },
721  { FP32Bit, FP32BitBits, sizeof(FP32BitBits) },
722  { GR32Bit, GR32BitBits, sizeof(GR32BitBits) },
723  { GRH32Bit, GRH32BitBits, sizeof(GRH32BitBits) },
724  { ADDR32Bit, ADDR32BitBits, sizeof(ADDR32BitBits) },
725  { CCR, CCRBits, sizeof(CCRBits) },
726  { AnyRegBit, AnyRegBitBits, sizeof(AnyRegBitBits) },
727  { AnyRegBit_with_subreg_r32, AnyRegBit_with_subreg_r32Bits, sizeof(AnyRegBit_with_subreg_r32Bits) },
728  { VR64Bit, VR64BitBits, sizeof(VR64BitBits) },
729  { AnyRegBit_with_subreg_r64, AnyRegBit_with_subreg_r64Bits, sizeof(AnyRegBit_with_subreg_r64Bits) },
730  { CR64Bit, CR64BitBits, sizeof(CR64BitBits) },
731  { FP64Bit, FP64BitBits, sizeof(FP64BitBits) },
732  { GR64Bit, GR64BitBits, sizeof(GR64BitBits) },
733  { ADDR64Bit, ADDR64BitBits, sizeof(ADDR64BitBits) },
734  { VR128Bit, VR128BitBits, sizeof(VR128BitBits) },
735  { VF128Bit, VF128BitBits, sizeof(VF128BitBits) },
736  { FP128Bit, FP128BitBits, sizeof(FP128BitBits) },
737  { GR128Bit, GR128BitBits, sizeof(GR128BitBits) },
738  { ADDR128Bit, ADDR128BitBits, sizeof(ADDR128BitBits) },
739};
740
741#endif // GET_REGINFO_MC_DESC
742