1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2015 Freescale Semiconductor, Inc.
4  */
5 
6 #ifndef _ASM_ARCH_SYSTEM_COUNTER_H
7 #define _ASM_ARCH_SYSTEM_COUNTER_H
8 
9 /* System Counter */
10 struct sctr_regs {
11 	u32 cntcr;
12 	u32 cntsr;
13 	u32 cntcv1;
14 	u32 cntcv2;
15 	u32 resv1[4];
16 	u32 cntfid0;
17 	u32 cntfid1;
18 	u32 cntfid2;
19 	u32 resv2[1001];
20 	u32 counterid[1];
21 };
22 
23 #define SC_CNTCR_ENABLE		(1 << 0)
24 #define SC_CNTCR_HDBG		(1 << 1)
25 #define SC_CNTCR_FREQ0		(1 << 8)
26 #define SC_CNTCR_FREQ1		(1 << 9)
27 
28 #endif
29