1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * max98090.c -- MAX98090 ALSA SoC Audio driver
4 *
5 * Copyright 2011 Maxim Integrated Products
6 */
7
8 #include <common.h>
9 #include <audio_codec.h>
10 #include <div64.h>
11 #include <dm.h>
12 #include <i2c.h>
13 #include <i2s.h>
14 #include <sound.h>
15 #include <asm/gpio.h>
16 #include <asm/io.h>
17 #include <asm/arch/clk.h>
18 #include <asm/arch/cpu.h>
19 #include <asm/arch/power.h>
20 #include "maxim_codec.h"
21 #include "max98090.h"
22
23 /*
24 * Sets hw params for max98090
25 *
26 * @priv: max98090 information pointer
27 * @rate: Sampling rate
28 * @bits_per_sample: Bits per sample
29 *
30 * @return -EIO for error, 0 for success.
31 */
max98090_hw_params(struct maxim_priv * priv,unsigned int rate,unsigned int bits_per_sample)32 int max98090_hw_params(struct maxim_priv *priv, unsigned int rate,
33 unsigned int bits_per_sample)
34 {
35 int error;
36 unsigned char value;
37
38 switch (bits_per_sample) {
39 case 16:
40 maxim_i2c_read(priv, M98090_REG_INTERFACE_FORMAT, &value);
41 error = maxim_bic_or(priv, M98090_REG_INTERFACE_FORMAT,
42 M98090_WS_MASK, 0);
43 maxim_i2c_read(priv, M98090_REG_INTERFACE_FORMAT, &value);
44 break;
45 default:
46 debug("%s: Illegal bits per sample %d.\n",
47 __func__, bits_per_sample);
48 return -1;
49 }
50
51 /* Update filter mode */
52 if (rate < 240000)
53 error |= maxim_bic_or(priv, M98090_REG_FILTER_CONFIG,
54 M98090_MODE_MASK, 0);
55 else
56 error |= maxim_bic_or(priv, M98090_REG_FILTER_CONFIG,
57 M98090_MODE_MASK, M98090_MODE_MASK);
58
59 /* Update sample rate mode */
60 if (rate < 50000)
61 error |= maxim_bic_or(priv, M98090_REG_FILTER_CONFIG,
62 M98090_DHF_MASK, 0);
63 else
64 error |= maxim_bic_or(priv, M98090_REG_FILTER_CONFIG,
65 M98090_DHF_MASK, M98090_DHF_MASK);
66
67 if (error < 0) {
68 debug("%s: Error setting hardware params.\n", __func__);
69 return -EIO;
70 }
71 priv->rate = rate;
72
73 return 0;
74 }
75
76 /*
77 * Configures Audio interface system clock for the given frequency
78 *
79 * @priv: max98090 information
80 * @freq: Sampling frequency in Hz
81 *
82 * @return -EIO for error, 0 for success.
83 */
max98090_set_sysclk(struct maxim_priv * priv,unsigned int freq)84 int max98090_set_sysclk(struct maxim_priv *priv, unsigned int freq)
85 {
86 int error = 0;
87
88 /* Requested clock frequency is already setup */
89 if (freq == priv->sysclk)
90 return 0;
91
92 /* Setup clocks for slave mode, and using the PLL
93 * PSCLK = 0x01 (when master clk is 10MHz to 20MHz)
94 * 0x02 (when master clk is 20MHz to 40MHz)..
95 * 0x03 (when master clk is 40MHz to 60MHz)..
96 */
97 if (freq >= 10000000 && freq < 20000000) {
98 error = maxim_i2c_write(priv, M98090_REG_SYSTEM_CLOCK,
99 M98090_PSCLK_DIV1);
100 } else if (freq >= 20000000 && freq < 40000000) {
101 error = maxim_i2c_write(priv, M98090_REG_SYSTEM_CLOCK,
102 M98090_PSCLK_DIV2);
103 } else if (freq >= 40000000 && freq < 60000000) {
104 error = maxim_i2c_write(priv, M98090_REG_SYSTEM_CLOCK,
105 M98090_PSCLK_DIV4);
106 } else {
107 debug("%s: Invalid master clock frequency\n", __func__);
108 return -1;
109 }
110
111 debug("%s: Clock at %uHz\n", __func__, freq);
112
113 if (error < 0)
114 return -1;
115
116 priv->sysclk = freq;
117
118 return 0;
119 }
120
121 /*
122 * Sets Max98090 I2S format
123 *
124 * @priv: max98090 information
125 * @fmt: i2S format - supports a subset of the options defined in i2s.h.
126 *
127 * @return -EIO for error, 0 for success.
128 */
max98090_set_fmt(struct maxim_priv * priv,int fmt)129 int max98090_set_fmt(struct maxim_priv *priv, int fmt)
130 {
131 u8 regval = 0;
132 int error = 0;
133
134 if (fmt == priv->fmt)
135 return 0;
136
137 priv->fmt = fmt;
138
139 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
140 case SND_SOC_DAIFMT_CBS_CFS:
141 /* Set to slave mode PLL - MAS mode off */
142 error |= maxim_i2c_write(priv, M98090_REG_CLOCK_RATIO_NI_MSB,
143 0x00);
144 error |= maxim_i2c_write(priv, M98090_REG_CLOCK_RATIO_NI_LSB,
145 0x00);
146 error |= maxim_bic_or(priv, M98090_REG_CLOCK_MODE,
147 M98090_USE_M1_MASK, 0);
148 break;
149 case SND_SOC_DAIFMT_CBM_CFM:
150 /* Set to master mode */
151 debug("Master mode not supported\n");
152 break;
153 case SND_SOC_DAIFMT_CBS_CFM:
154 case SND_SOC_DAIFMT_CBM_CFS:
155 default:
156 debug("%s: Clock mode unsupported\n", __func__);
157 return -EINVAL;
158 }
159
160 error |= maxim_i2c_write(priv, M98090_REG_MASTER_MODE, regval);
161
162 regval = 0;
163 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
164 case SND_SOC_DAIFMT_I2S:
165 regval |= M98090_DLY_MASK;
166 break;
167 case SND_SOC_DAIFMT_LEFT_J:
168 break;
169 case SND_SOC_DAIFMT_RIGHT_J:
170 regval |= M98090_RJ_MASK;
171 break;
172 case SND_SOC_DAIFMT_DSP_A:
173 /* Not supported mode */
174 default:
175 debug("%s: Unrecognized format.\n", __func__);
176 return -EINVAL;
177 }
178
179 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
180 case SND_SOC_DAIFMT_NB_NF:
181 break;
182 case SND_SOC_DAIFMT_NB_IF:
183 regval |= M98090_WCI_MASK;
184 break;
185 case SND_SOC_DAIFMT_IB_NF:
186 regval |= M98090_BCI_MASK;
187 break;
188 case SND_SOC_DAIFMT_IB_IF:
189 regval |= M98090_BCI_MASK | M98090_WCI_MASK;
190 break;
191 default:
192 debug("%s: Unrecognized inversion settings.\n", __func__);
193 return -EINVAL;
194 }
195
196 error |= maxim_i2c_write(priv, M98090_REG_INTERFACE_FORMAT, regval);
197
198 if (error < 0) {
199 debug("%s: Error setting i2s format.\n", __func__);
200 return -EIO;
201 }
202
203 return 0;
204 }
205
206 /*
207 * resets the audio codec
208 *
209 * @priv: max98090 information
210 * @return -EIO for error, 0 for success.
211 */
max98090_reset(struct maxim_priv * priv)212 static int max98090_reset(struct maxim_priv *priv)
213 {
214 int ret;
215
216 /*
217 * Gracefully reset the DSP core and the codec hardware in a proper
218 * sequence.
219 */
220 ret = maxim_i2c_write(priv, M98090_REG_SOFTWARE_RESET,
221 M98090_SWRESET_MASK);
222 if (ret != 0) {
223 debug("%s: Failed to reset DSP: %d\n", __func__, ret);
224 return ret;
225 }
226 mdelay(20);
227
228 return 0;
229 }
230
231 /*
232 * Initialise max98090 codec device
233 *
234 * @priv: max98090 information
235 *
236 * @return -EIO for error, 0 for success.
237 */
max98090_device_init(struct maxim_priv * priv)238 int max98090_device_init(struct maxim_priv *priv)
239 {
240 unsigned char id;
241 int error = 0;
242
243 /* Enable codec clock */
244 set_xclkout();
245
246 /* reset the codec, the DSP core, and disable all interrupts */
247 error = max98090_reset(priv);
248 if (error != 0) {
249 debug("Reset\n");
250 return error;
251 }
252
253 /* initialize private data */
254 priv->sysclk = -1U;
255 priv->rate = -1U;
256 priv->fmt = -1U;
257
258 error = maxim_i2c_read(priv, M98090_REG_REVISION_ID, &id);
259 if (error < 0) {
260 debug("%s: Failure reading hardware revision: %d\n",
261 __func__, id);
262 return -EIO;
263 }
264 debug("%s: Hardware revision: %d\n", __func__, id);
265
266 return 0;
267 }
268
max98090_setup_interface(struct maxim_priv * priv)269 static int max98090_setup_interface(struct maxim_priv *priv)
270 {
271 unsigned char id;
272 int error;
273
274 /* Reading interrupt status to clear them */
275 error = maxim_i2c_read(priv, M98090_REG_DEVICE_STATUS, &id);
276
277 error |= maxim_i2c_write(priv, M98090_REG_DAC_CONTROL,
278 M98090_DACHP_MASK);
279 error |= maxim_i2c_write(priv, M98090_REG_BIAS_CONTROL,
280 M98090_VCM_MODE_MASK);
281
282 error |= maxim_i2c_write(priv, M98090_REG_LEFT_SPK_MIXER, 0x1);
283 error |= maxim_i2c_write(priv, M98090_REG_RIGHT_SPK_MIXER, 0x2);
284
285 error |= maxim_i2c_write(priv, M98090_REG_LEFT_SPK_VOLUME, 0x25);
286 error |= maxim_i2c_write(priv, M98090_REG_RIGHT_SPK_VOLUME, 0x25);
287
288 error |= maxim_i2c_write(priv, M98090_REG_CLOCK_RATIO_NI_MSB, 0x0);
289 error |= maxim_i2c_write(priv, M98090_REG_CLOCK_RATIO_NI_LSB, 0x0);
290 error |= maxim_i2c_write(priv, M98090_REG_MASTER_MODE, 0x0);
291 error |= maxim_i2c_write(priv, M98090_REG_INTERFACE_FORMAT, 0x0);
292 error |= maxim_i2c_write(priv, M98090_REG_IO_CONFIGURATION,
293 M98090_SDIEN_MASK);
294 error |= maxim_i2c_write(priv, M98090_REG_DEVICE_SHUTDOWN,
295 M98090_SHDNN_MASK);
296 error |= maxim_i2c_write(priv, M98090_REG_OUTPUT_ENABLE,
297 M98090_HPREN_MASK | M98090_HPLEN_MASK |
298 M98090_SPREN_MASK | M98090_SPLEN_MASK |
299 M98090_DAREN_MASK | M98090_DALEN_MASK);
300 error |= maxim_i2c_write(priv, M98090_REG_IO_CONFIGURATION,
301 M98090_SDOEN_MASK | M98090_SDIEN_MASK);
302
303 if (error < 0)
304 return -EIO;
305
306 return 0;
307 }
308
max98090_do_init(struct maxim_priv * priv,int sampling_rate,int mclk_freq,int bits_per_sample)309 static int max98090_do_init(struct maxim_priv *priv, int sampling_rate,
310 int mclk_freq, int bits_per_sample)
311 {
312 int ret = 0;
313
314 ret = max98090_setup_interface(priv);
315 if (ret < 0) {
316 debug("%s: max98090 setup interface failed\n", __func__);
317 return ret;
318 }
319
320 ret = max98090_set_sysclk(priv, mclk_freq);
321 if (ret < 0) {
322 debug("%s: max98090 codec set sys clock failed\n", __func__);
323 return ret;
324 }
325
326 ret = max98090_hw_params(priv, sampling_rate, bits_per_sample);
327
328 if (ret == 0) {
329 ret = max98090_set_fmt(priv, SND_SOC_DAIFMT_I2S |
330 SND_SOC_DAIFMT_NB_NF |
331 SND_SOC_DAIFMT_CBS_CFS);
332 }
333
334 return ret;
335 }
336
max98090_set_params(struct udevice * dev,int interface,int rate,int mclk_freq,int bits_per_sample,uint channels)337 static int max98090_set_params(struct udevice *dev, int interface, int rate,
338 int mclk_freq, int bits_per_sample,
339 uint channels)
340 {
341 struct maxim_priv *priv = dev_get_priv(dev);
342
343 return max98090_do_init(priv, rate, mclk_freq, bits_per_sample);
344 }
345
max98090_probe(struct udevice * dev)346 static int max98090_probe(struct udevice *dev)
347 {
348 struct maxim_priv *priv = dev_get_priv(dev);
349 int ret;
350
351 priv->dev = dev;
352 ret = max98090_device_init(priv);
353 if (ret < 0) {
354 debug("%s: max98090 codec chip init failed\n", __func__);
355 return ret;
356 }
357
358 return 0;
359 }
360
361 static const struct audio_codec_ops max98090_ops = {
362 .set_params = max98090_set_params,
363 };
364
365 static const struct udevice_id max98090_ids[] = {
366 { .compatible = "maxim,max98090" },
367 { }
368 };
369
370 U_BOOT_DRIVER(max98090) = {
371 .name = "max98090",
372 .id = UCLASS_AUDIO_CODEC,
373 .of_match = max98090_ids,
374 .probe = max98090_probe,
375 .ops = &max98090_ops,
376 .priv_auto_alloc_size = sizeof(struct maxim_priv),
377 };
378