1 /*
2  * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
3  *
4  * Copyright (c) 2004-2007 Fabrice Bellard
5  * Copyright (c) 2007 Jocelyn Mayer
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a copy
8  * of this software and associated documentation files (the "Software"), to deal
9  * in the Software without restriction, including without limitation the rights
10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11  * copies of the Software, and to permit persons to whom the Software is
12  * furnished to do so, subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included in
15  * all copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23  * THE SOFTWARE.
24  *
25  * PCI bus layout on a real G5 (U3 based):
26  *
27  * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b]
28  * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150]
29  * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a]
30  * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
31  * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
32  * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045]
33  * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046]
34  * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047]
35  * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048]
36  * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049]
37  * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20)
38  * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
39  * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
40  * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
41  * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
42  * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04)
43  * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043]
44  * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042]
45  * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c]
46  * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240]
47  */
48 
49 #include "qemu/osdep.h"
50 #include "qemu-common.h"
51 #include "qemu/datadir.h"
52 #include "qapi/error.h"
53 #include "hw/ppc/ppc.h"
54 #include "hw/qdev-properties.h"
55 #include "hw/ppc/mac.h"
56 #include "hw/input/adb.h"
57 #include "hw/ppc/mac_dbdma.h"
58 #include "hw/pci/pci.h"
59 #include "net/net.h"
60 #include "sysemu/sysemu.h"
61 #include "hw/boards.h"
62 #include "hw/nvram/fw_cfg.h"
63 #include "hw/char/escc.h"
64 #include "hw/misc/macio/macio.h"
65 #include "hw/ppc/openpic.h"
66 #include "hw/loader.h"
67 #include "hw/fw-path-provider.h"
68 #include "elf.h"
69 #include "qemu/error-report.h"
70 #include "sysemu/kvm.h"
71 #include "sysemu/reset.h"
72 #include "kvm_ppc.h"
73 #include "hw/usb.h"
74 #include "exec/address-spaces.h"
75 #include "hw/sysbus.h"
76 #include "trace.h"
77 
78 /* FreeBSD headers define this */
79 #ifdef round_page
80 #undef round_page
81 #endif
82 
83 #define MAX_IDE_BUS 2
84 #define CFG_ADDR 0xf0000510
85 #define TBFREQ (100UL * 1000UL * 1000UL)
86 #define CLOCKFREQ (900UL * 1000UL * 1000UL)
87 #define BUSFREQ (100UL * 1000UL * 1000UL)
88 
89 #define NDRV_VGA_FILENAME "qemu_vga.ndrv"
90 
91 #define PROM_BASE 0xfff00000
92 #define PROM_SIZE (1 * MiB)
93 
fw_cfg_boot_set(void * opaque,const char * boot_device,Error ** errp)94 static void fw_cfg_boot_set(void *opaque, const char *boot_device,
95                             Error **errp)
96 {
97     fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
98 }
99 
translate_kernel_address(void * opaque,uint64_t addr)100 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
101 {
102     return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
103 }
104 
ppc_core99_reset(void * opaque)105 static void ppc_core99_reset(void *opaque)
106 {
107     PowerPCCPU *cpu = opaque;
108 
109     cpu_reset(CPU(cpu));
110     /* 970 CPUs want to get their initial IP as part of their boot protocol */
111     cpu->env.nip = PROM_BASE + 0x100;
112 }
113 
114 /* PowerPC Mac99 hardware initialisation */
ppc_core99_init(MachineState * machine)115 static void ppc_core99_init(MachineState *machine)
116 {
117     ram_addr_t ram_size = machine->ram_size;
118     const char *bios_name = machine->firmware ?: PROM_FILENAME;
119     const char *kernel_filename = machine->kernel_filename;
120     const char *kernel_cmdline = machine->kernel_cmdline;
121     const char *initrd_filename = machine->initrd_filename;
122     const char *boot_device = machine->boot_order;
123     Core99MachineState *core99_machine = CORE99_MACHINE(machine);
124     PowerPCCPU *cpu = NULL;
125     CPUPPCState *env = NULL;
126     char *filename;
127     IrqLines *openpic_irqs;
128     int linux_boot, i, j, k;
129     MemoryRegion *bios = g_new(MemoryRegion, 1);
130     hwaddr kernel_base, initrd_base, cmdline_base = 0;
131     long kernel_size, initrd_size;
132     UNINHostState *uninorth_pci;
133     PCIBus *pci_bus;
134     PCIDevice *macio;
135     ESCCState *escc;
136     bool has_pmu, has_adb;
137     MACIOIDEState *macio_ide;
138     BusState *adb_bus;
139     MacIONVRAMState *nvr;
140     int bios_size;
141     int ppc_boot_device;
142     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
143     void *fw_cfg;
144     int machine_arch;
145     SysBusDevice *s;
146     DeviceState *dev, *pic_dev;
147     DeviceState *uninorth_internal_dev = NULL, *uninorth_agp_dev = NULL;
148     hwaddr nvram_addr = 0xFFF04000;
149     uint64_t tbfreq;
150     unsigned int smp_cpus = machine->smp.cpus;
151 
152     linux_boot = (kernel_filename != NULL);
153 
154     /* init CPUs */
155     for (i = 0; i < smp_cpus; i++) {
156         cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
157         env = &cpu->env;
158 
159         /* Set time-base frequency to 100 Mhz */
160         cpu_ppc_tb_init(env, TBFREQ);
161         qemu_register_reset(ppc_core99_reset, cpu);
162     }
163 
164     /* allocate RAM */
165     memory_region_add_subregion(get_system_memory(), 0, machine->ram);
166 
167     /* allocate and load firmware ROM */
168     memory_region_init_rom(bios, NULL, "ppc_core99.bios", PROM_SIZE,
169                            &error_fatal);
170     memory_region_add_subregion(get_system_memory(), PROM_BASE, bios);
171 
172     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
173     if (filename) {
174         /* Load OpenBIOS (ELF) */
175         bios_size = load_elf(filename, NULL, NULL, NULL, NULL,
176                              NULL, NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
177 
178         if (bios_size <= 0) {
179             /* or load binary ROM image */
180             bios_size = load_image_targphys(filename, PROM_BASE, PROM_SIZE);
181         }
182         g_free(filename);
183     } else {
184         bios_size = -1;
185     }
186     if (bios_size < 0 || bios_size > PROM_SIZE) {
187         error_report("could not load PowerPC bios '%s'", bios_name);
188         exit(1);
189     }
190 
191     if (linux_boot) {
192         int bswap_needed;
193 
194 #ifdef BSWAP_NEEDED
195         bswap_needed = 1;
196 #else
197         bswap_needed = 0;
198 #endif
199         kernel_base = KERNEL_LOAD_ADDR;
200 
201         kernel_size = load_elf(kernel_filename, NULL,
202                                translate_kernel_address, NULL, NULL, NULL,
203                                NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
204         if (kernel_size < 0)
205             kernel_size = load_aout(kernel_filename, kernel_base,
206                                     ram_size - kernel_base, bswap_needed,
207                                     TARGET_PAGE_SIZE);
208         if (kernel_size < 0)
209             kernel_size = load_image_targphys(kernel_filename,
210                                               kernel_base,
211                                               ram_size - kernel_base);
212         if (kernel_size < 0) {
213             error_report("could not load kernel '%s'", kernel_filename);
214             exit(1);
215         }
216         /* load initrd */
217         if (initrd_filename) {
218             initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
219             initrd_size = load_image_targphys(initrd_filename, initrd_base,
220                                               ram_size - initrd_base);
221             if (initrd_size < 0) {
222                 error_report("could not load initial ram disk '%s'",
223                              initrd_filename);
224                 exit(1);
225             }
226             cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size);
227         } else {
228             initrd_base = 0;
229             initrd_size = 0;
230             cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
231         }
232         ppc_boot_device = 'm';
233     } else {
234         kernel_base = 0;
235         kernel_size = 0;
236         initrd_base = 0;
237         initrd_size = 0;
238         ppc_boot_device = '\0';
239         /* We consider that NewWorld PowerMac never have any floppy drive
240          * For now, OHW cannot boot from the network.
241          */
242         for (i = 0; boot_device[i] != '\0'; i++) {
243             if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
244                 ppc_boot_device = boot_device[i];
245                 break;
246             }
247         }
248         if (ppc_boot_device == '\0') {
249             error_report("No valid boot device for Mac99 machine");
250             exit(1);
251         }
252     }
253 
254     /* UniN init */
255     dev = qdev_new(TYPE_UNI_NORTH);
256     s = SYS_BUS_DEVICE(dev);
257     sysbus_realize_and_unref(s, &error_fatal);
258     memory_region_add_subregion(get_system_memory(), 0xf8000000,
259                                 sysbus_mmio_get_region(s, 0));
260 
261     openpic_irqs = g_new0(IrqLines, smp_cpus);
262     for (i = 0; i < smp_cpus; i++) {
263         /* Mac99 IRQ connection between OpenPIC outputs pins
264          * and PowerPC input pins
265          */
266         switch (PPC_INPUT(env)) {
267         case PPC_FLAGS_INPUT_6xx:
268             openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] =
269                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
270             openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] =
271                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
272             openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] =
273                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
274             /* Not connected ? */
275             openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL;
276             /* Check this */
277             openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] =
278                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
279             break;
280 #if defined(TARGET_PPC64)
281         case PPC_FLAGS_INPUT_970:
282             openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] =
283                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
284             openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] =
285                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
286             openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] =
287                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
288             /* Not connected ? */
289             openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL;
290             /* Check this */
291             openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] =
292                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
293             break;
294 #endif /* defined(TARGET_PPC64) */
295         default:
296             error_report("Bus model not supported on mac99 machine");
297             exit(1);
298         }
299     }
300 
301     if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
302         /* 970 gets a U3 bus */
303         /* Uninorth AGP bus */
304         dev = qdev_new(TYPE_U3_AGP_HOST_BRIDGE);
305         sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
306         uninorth_pci = U3_AGP_HOST_BRIDGE(dev);
307         s = SYS_BUS_DEVICE(dev);
308         /* PCI hole */
309         memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
310                                     sysbus_mmio_get_region(s, 2));
311         /* Register 8 MB of ISA IO space */
312         memory_region_add_subregion(get_system_memory(), 0xf2000000,
313                                     sysbus_mmio_get_region(s, 3));
314         sysbus_mmio_map(s, 0, 0xf0800000);
315         sysbus_mmio_map(s, 1, 0xf0c00000);
316 
317         machine_arch = ARCH_MAC99_U3;
318     } else {
319         /* Use values found on a real PowerMac */
320         /* Uninorth AGP bus */
321         uninorth_agp_dev = qdev_new(TYPE_UNI_NORTH_AGP_HOST_BRIDGE);
322         s = SYS_BUS_DEVICE(uninorth_agp_dev);
323         sysbus_realize_and_unref(s, &error_fatal);
324         sysbus_mmio_map(s, 0, 0xf0800000);
325         sysbus_mmio_map(s, 1, 0xf0c00000);
326 
327         /* Uninorth internal bus */
328         uninorth_internal_dev = qdev_new(
329                                 TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE);
330         s = SYS_BUS_DEVICE(uninorth_internal_dev);
331         sysbus_realize_and_unref(s, &error_fatal);
332         sysbus_mmio_map(s, 0, 0xf4800000);
333         sysbus_mmio_map(s, 1, 0xf4c00000);
334 
335         /* Uninorth main bus */
336         dev = qdev_new(TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
337         qdev_prop_set_uint32(dev, "ofw-addr", 0xf2000000);
338         sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
339         uninorth_pci = UNI_NORTH_PCI_HOST_BRIDGE(dev);
340         s = SYS_BUS_DEVICE(dev);
341         /* PCI hole */
342         memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
343                                     sysbus_mmio_get_region(s, 2));
344         /* Register 8 MB of ISA IO space */
345         memory_region_add_subregion(get_system_memory(), 0xf2000000,
346                                     sysbus_mmio_get_region(s, 3));
347         sysbus_mmio_map(s, 0, 0xf2800000);
348         sysbus_mmio_map(s, 1, 0xf2c00000);
349 
350         machine_arch = ARCH_MAC99;
351     }
352 
353     machine->usb |= defaults_enabled() && !machine->usb_disabled;
354     has_pmu = (core99_machine->via_config != CORE99_VIA_CONFIG_CUDA);
355     has_adb = (core99_machine->via_config == CORE99_VIA_CONFIG_CUDA ||
356                core99_machine->via_config == CORE99_VIA_CONFIG_PMU_ADB);
357 
358     /* Timebase Frequency */
359     if (kvm_enabled()) {
360         tbfreq = kvmppc_get_tbfreq();
361     } else {
362         tbfreq = TBFREQ;
363     }
364 
365     /* init basic PC hardware */
366     pci_bus = PCI_HOST_BRIDGE(uninorth_pci)->bus;
367 
368     /* MacIO */
369     macio = pci_new(-1, TYPE_NEWWORLD_MACIO);
370     dev = DEVICE(macio);
371     qdev_prop_set_uint64(dev, "frequency", tbfreq);
372     qdev_prop_set_bit(dev, "has-pmu", has_pmu);
373     qdev_prop_set_bit(dev, "has-adb", has_adb);
374 
375     escc = ESCC(object_resolve_path_component(OBJECT(macio), "escc"));
376     qdev_prop_set_chr(DEVICE(escc), "chrA", serial_hd(0));
377     qdev_prop_set_chr(DEVICE(escc), "chrB", serial_hd(1));
378 
379     pci_realize_and_unref(macio, pci_bus, &error_fatal);
380 
381     pic_dev = DEVICE(object_resolve_path_component(OBJECT(macio), "pic"));
382     for (i = 0; i < 4; i++) {
383         qdev_connect_gpio_out(DEVICE(uninorth_pci), i,
384                               qdev_get_gpio_in(pic_dev, 0x1b + i));
385     }
386 
387     /* TODO: additional PCI buses only wired up for 32-bit machines */
388     if (PPC_INPUT(env) != PPC_FLAGS_INPUT_970) {
389         /* Uninorth AGP bus */
390         for (i = 0; i < 4; i++) {
391             qdev_connect_gpio_out(uninorth_agp_dev, i,
392                                   qdev_get_gpio_in(pic_dev, 0x1b + i));
393         }
394 
395         /* Uninorth internal bus */
396         for (i = 0; i < 4; i++) {
397             qdev_connect_gpio_out(uninorth_internal_dev, i,
398                                   qdev_get_gpio_in(pic_dev, 0x1b + i));
399         }
400     }
401 
402     /* OpenPIC */
403     s = SYS_BUS_DEVICE(pic_dev);
404     k = 0;
405     for (i = 0; i < smp_cpus; i++) {
406         for (j = 0; j < OPENPIC_OUTPUT_NB; j++) {
407             sysbus_connect_irq(s, k++, openpic_irqs[i].irq[j]);
408         }
409     }
410     g_free(openpic_irqs);
411 
412     /* We only emulate 2 out of 3 IDE controllers for now */
413     ide_drive_get(hd, ARRAY_SIZE(hd));
414 
415     macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
416                                                         "ide[0]"));
417     macio_ide_init_drives(macio_ide, hd);
418 
419     macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
420                                                         "ide[1]"));
421     macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
422 
423     if (has_adb) {
424         if (has_pmu) {
425             dev = DEVICE(object_resolve_path_component(OBJECT(macio), "pmu"));
426         } else {
427             dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
428         }
429 
430         adb_bus = qdev_get_child_bus(dev, "adb.0");
431         dev = qdev_new(TYPE_ADB_KEYBOARD);
432         qdev_realize_and_unref(dev, adb_bus, &error_fatal);
433 
434         dev = qdev_new(TYPE_ADB_MOUSE);
435         qdev_realize_and_unref(dev, adb_bus, &error_fatal);
436     }
437 
438     if (machine->usb) {
439         pci_create_simple(pci_bus, -1, "pci-ohci");
440 
441         /* U3 needs to use USB for input because Linux doesn't support via-cuda
442         on PPC64 */
443         if (!has_adb || machine_arch == ARCH_MAC99_U3) {
444             USBBus *usb_bus = usb_bus_find(-1);
445 
446             usb_create_simple(usb_bus, "usb-kbd");
447             usb_create_simple(usb_bus, "usb-mouse");
448         }
449     }
450 
451     pci_vga_init(pci_bus);
452 
453     if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) {
454         graphic_depth = 15;
455     }
456 
457     for (i = 0; i < nb_nics; i++) {
458         pci_nic_init_nofail(&nd_table[i], pci_bus, "sungem", NULL);
459     }
460 
461     /* The NewWorld NVRAM is not located in the MacIO device */
462     if (kvm_enabled() && qemu_real_host_page_size > 4096) {
463         /* We can't combine read-write and read-only in a single page, so
464            move the NVRAM out of ROM again for KVM */
465         nvram_addr = 0xFFE00000;
466     }
467     dev = qdev_new(TYPE_MACIO_NVRAM);
468     qdev_prop_set_uint32(dev, "size", 0x2000);
469     qdev_prop_set_uint32(dev, "it_shift", 1);
470     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
471     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, nvram_addr);
472     nvr = MACIO_NVRAM(dev);
473     pmac_format_nvram_partition(nvr, 0x2000);
474     /* No PCI init: the BIOS will do it */
475 
476     dev = qdev_new(TYPE_FW_CFG_MEM);
477     fw_cfg = FW_CFG(dev);
478     qdev_prop_set_uint32(dev, "data_width", 1);
479     qdev_prop_set_bit(dev, "dma_enabled", false);
480     object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG,
481                               OBJECT(fw_cfg));
482     s = SYS_BUS_DEVICE(dev);
483     sysbus_realize_and_unref(s, &error_fatal);
484     sysbus_mmio_map(s, 0, CFG_ADDR);
485     sysbus_mmio_map(s, 1, CFG_ADDR + 2);
486 
487     fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
488     fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
489     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
490     fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
491     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
492     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
493     if (kernel_cmdline) {
494         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
495         pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
496     } else {
497         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
498     }
499     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
500     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
501     fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
502 
503     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
504     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
505     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
506 
507     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_VIACONFIG, core99_machine->via_config);
508 
509     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
510     if (kvm_enabled()) {
511         uint8_t *hypercall;
512 
513         hypercall = g_malloc(16);
514         kvmppc_get_hypercall(env, hypercall, 16);
515         fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
516         fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
517     }
518     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq);
519     /* Mac OS X requires a "known good" clock-frequency value; pass it one. */
520     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ);
521     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
522     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_NVRAM_ADDR, nvram_addr);
523 
524     /* MacOS NDRV VGA driver */
525     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME);
526     if (filename) {
527         gchar *ndrv_file;
528         gsize ndrv_size;
529 
530         if (g_file_get_contents(filename, &ndrv_file, &ndrv_size, NULL)) {
531             fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size);
532         }
533         g_free(filename);
534     }
535 
536     qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
537 }
538 
539 /*
540  * Implementation of an interface to adjust firmware path
541  * for the bootindex property handling.
542  */
core99_fw_dev_path(FWPathProvider * p,BusState * bus,DeviceState * dev)543 static char *core99_fw_dev_path(FWPathProvider *p, BusState *bus,
544                                 DeviceState *dev)
545 {
546     PCIDevice *pci;
547     MACIOIDEState *macio_ide;
548 
549     if (!strcmp(object_get_typename(OBJECT(dev)), "macio-newworld")) {
550         pci = PCI_DEVICE(dev);
551         return g_strdup_printf("mac-io@%x", PCI_SLOT(pci->devfn));
552     }
553 
554     if (!strcmp(object_get_typename(OBJECT(dev)), "macio-ide")) {
555         macio_ide = MACIO_IDE(dev);
556         return g_strdup_printf("ata-3@%x", macio_ide->addr);
557     }
558 
559     if (!strcmp(object_get_typename(OBJECT(dev)), "ide-hd")) {
560         return g_strdup("disk");
561     }
562 
563     if (!strcmp(object_get_typename(OBJECT(dev)), "ide-cd")) {
564         return g_strdup("cdrom");
565     }
566 
567     if (!strcmp(object_get_typename(OBJECT(dev)), "virtio-blk-device")) {
568         return g_strdup("disk");
569     }
570 
571     return NULL;
572 }
core99_kvm_type(MachineState * machine,const char * arg)573 static int core99_kvm_type(MachineState *machine, const char *arg)
574 {
575     /* Always force PR KVM */
576     return 2;
577 }
578 
core99_machine_class_init(ObjectClass * oc,void * data)579 static void core99_machine_class_init(ObjectClass *oc, void *data)
580 {
581     MachineClass *mc = MACHINE_CLASS(oc);
582     FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
583 
584     mc->desc = "Mac99 based PowerMAC";
585     mc->init = ppc_core99_init;
586     mc->block_default_type = IF_IDE;
587     mc->max_cpus = MAX_CPUS;
588     mc->default_boot_order = "cd";
589     mc->default_display = "std";
590     mc->kvm_type = core99_kvm_type;
591 #ifdef TARGET_PPC64
592     mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("970fx_v3.1");
593 #else
594     mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("7400_v2.9");
595 #endif
596     mc->default_ram_id = "ppc_core99.ram";
597     mc->ignore_boot_device_suffixes = true;
598     fwc->get_dev_path = core99_fw_dev_path;
599 }
600 
core99_get_via_config(Object * obj,Error ** errp)601 static char *core99_get_via_config(Object *obj, Error **errp)
602 {
603     Core99MachineState *cms = CORE99_MACHINE(obj);
604 
605     switch (cms->via_config) {
606     default:
607     case CORE99_VIA_CONFIG_CUDA:
608         return g_strdup("cuda");
609 
610     case CORE99_VIA_CONFIG_PMU:
611         return g_strdup("pmu");
612 
613     case CORE99_VIA_CONFIG_PMU_ADB:
614         return g_strdup("pmu-adb");
615     }
616 }
617 
core99_set_via_config(Object * obj,const char * value,Error ** errp)618 static void core99_set_via_config(Object *obj, const char *value, Error **errp)
619 {
620     Core99MachineState *cms = CORE99_MACHINE(obj);
621 
622     if (!strcmp(value, "cuda")) {
623         cms->via_config = CORE99_VIA_CONFIG_CUDA;
624     } else if (!strcmp(value, "pmu")) {
625         cms->via_config = CORE99_VIA_CONFIG_PMU;
626     } else if (!strcmp(value, "pmu-adb")) {
627         cms->via_config = CORE99_VIA_CONFIG_PMU_ADB;
628     } else {
629         error_setg(errp, "Invalid via value");
630         error_append_hint(errp, "Valid values are cuda, pmu, pmu-adb.\n");
631     }
632 }
633 
core99_instance_init(Object * obj)634 static void core99_instance_init(Object *obj)
635 {
636     Core99MachineState *cms = CORE99_MACHINE(obj);
637 
638     /* Default via_config is CORE99_VIA_CONFIG_CUDA */
639     cms->via_config = CORE99_VIA_CONFIG_CUDA;
640     object_property_add_str(obj, "via", core99_get_via_config,
641                             core99_set_via_config);
642     object_property_set_description(obj, "via",
643                                     "Set VIA configuration. "
644                                     "Valid values are cuda, pmu and pmu-adb");
645 
646     return;
647 }
648 
649 static const TypeInfo core99_machine_info = {
650     .name          = MACHINE_TYPE_NAME("mac99"),
651     .parent        = TYPE_MACHINE,
652     .class_init    = core99_machine_class_init,
653     .instance_init = core99_instance_init,
654     .instance_size = sizeof(Core99MachineState),
655     .interfaces = (InterfaceInfo[]) {
656         { TYPE_FW_PATH_PROVIDER },
657         { }
658     },
659 };
660 
mac_machine_register_types(void)661 static void mac_machine_register_types(void)
662 {
663     type_register_static(&core99_machine_info);
664 }
665 
666 type_init(mac_machine_register_types)
667