1 /* 2 * SPDX-License-Identifier: MIT 3 */ 4 5 #ifndef __XEN_PUBLIC_HVM_PARAMS_H__ 6 #define __XEN_PUBLIC_HVM_PARAMS_H__ 7 8 #include "hvm_op.h" 9 10 /* 11 * Parameter space for HVMOP_{set,get}_param. 12 */ 13 14 /* 15 * How should CPU0 event-channel notifications be delivered? 16 * val[63:56] == 0: val[55:0] is a delivery GSI (Global System Interrupt). 17 * val[63:56] == 1: val[55:0] is a delivery PCI INTx line, as follows: 18 * Domain = val[47:32], Bus = val[31:16], 19 * DevFn = val[15: 8], IntX = val[ 1: 0] 20 * val[63:56] == 2: val[7:0] is a vector number, check for 21 * XENFEAT_hvm_callback_vector to know if this delivery 22 * method is available. 23 * If val == 0 then CPU0 event-channel notifications are not delivered. 24 */ 25 #define HVM_PARAM_CALLBACK_IRQ 0 26 27 /* 28 * These are not used by Xen. They are here for convenience of HVM-guest 29 * xenbus implementations. 30 */ 31 #define HVM_PARAM_STORE_PFN 1 32 #define HVM_PARAM_STORE_EVTCHN 2 33 34 #define HVM_PARAM_PAE_ENABLED 4 35 36 #define HVM_PARAM_IOREQ_PFN 5 37 38 #define HVM_PARAM_BUFIOREQ_PFN 6 39 #define HVM_PARAM_BUFIOREQ_EVTCHN 26 40 41 #if defined(MDE_CPU_IA32) || defined(MDE_CPU_X64) 42 43 /* Expose Viridian interfaces to this HVM guest? */ 44 #define HVM_PARAM_VIRIDIAN 9 45 46 #endif 47 48 /* 49 * Set mode for virtual timers (currently x86 only): 50 * delay_for_missed_ticks (default): 51 * Do not advance a vcpu's time beyond the correct delivery time for 52 * interrupts that have been missed due to preemption. Deliver missed 53 * interrupts when the vcpu is rescheduled and advance the vcpu's virtual 54 * time stepwise for each one. 55 * no_delay_for_missed_ticks: 56 * As above, missed interrupts are delivered, but guest time always tracks 57 * wallclock (i.e., real) time while doing so. 58 * no_missed_ticks_pending: 59 * No missed interrupts are held pending. Instead, to ensure ticks are 60 * delivered at some non-zero rate, if we detect missed ticks then the 61 * internal tick alarm is not disabled if the VCPU is preempted during the 62 * next tick period. 63 * one_missed_tick_pending: 64 * Missed interrupts are collapsed together and delivered as one 'late tick'. 65 * Guest time always tracks wallclock (i.e., real) time. 66 */ 67 #define HVM_PARAM_TIMER_MODE 10 68 #define HVMPTM_delay_for_missed_ticks 0 69 #define HVMPTM_no_delay_for_missed_ticks 1 70 #define HVMPTM_no_missed_ticks_pending 2 71 #define HVMPTM_one_missed_tick_pending 3 72 73 /* Boolean: Enable virtual HPET (high-precision event timer)? (x86-only) */ 74 #define HVM_PARAM_HPET_ENABLED 11 75 76 /* Identity-map page directory used by Intel EPT when CR0.PG=0. */ 77 #define HVM_PARAM_IDENT_PT 12 78 79 /* Device Model domain, defaults to 0. */ 80 #define HVM_PARAM_DM_DOMAIN 13 81 82 /* ACPI S state: currently support S0 and S3 on x86. */ 83 #define HVM_PARAM_ACPI_S_STATE 14 84 85 /* TSS used on Intel when CR0.PE=0. */ 86 #define HVM_PARAM_VM86_TSS 15 87 88 /* Boolean: Enable aligning all periodic vpts to reduce interrupts */ 89 #define HVM_PARAM_VPT_ALIGN 16 90 91 /* Console debug shared memory ring and event channel */ 92 #define HVM_PARAM_CONSOLE_PFN 17 93 #define HVM_PARAM_CONSOLE_EVTCHN 18 94 95 /* 96 * Select location of ACPI PM1a and TMR control blocks. Currently two locations 97 * are supported, specified by version 0 or 1 in this parameter: 98 * - 0: default, use the old addresses 99 * PM1A_EVT == 0x1f40; PM1A_CNT == 0x1f44; PM_TMR == 0x1f48 100 * - 1: use the new default qemu addresses 101 * PM1A_EVT == 0xb000; PM1A_CNT == 0xb004; PM_TMR == 0xb008 102 * You can find these address definitions in <hvm/ioreq.h> 103 */ 104 #define HVM_PARAM_ACPI_IOPORTS_LOCATION 19 105 106 /* Enable blocking memory events, async or sync (pause vcpu until response) 107 * onchangeonly indicates messages only on a change of value */ 108 #define HVM_PARAM_MEMORY_EVENT_CR0 20 109 #define HVM_PARAM_MEMORY_EVENT_CR3 21 110 #define HVM_PARAM_MEMORY_EVENT_CR4 22 111 #define HVM_PARAM_MEMORY_EVENT_INT3 23 112 #define HVM_PARAM_MEMORY_EVENT_SINGLE_STEP 25 113 #define HVM_PARAM_MEMORY_EVENT_MSR 30 114 115 #define HVMPME_MODE_MASK (3 << 0) 116 #define HVMPME_mode_disabled 0 117 #define HVMPME_mode_async 1 118 #define HVMPME_mode_sync 2 119 #define HVMPME_onchangeonly (1 << 2) 120 121 /* Boolean: Enable nestedhvm (hvm only) */ 122 #define HVM_PARAM_NESTEDHVM 24 123 124 /* Params for the mem event rings */ 125 #define HVM_PARAM_PAGING_RING_PFN 27 126 #define HVM_PARAM_ACCESS_RING_PFN 28 127 #define HVM_PARAM_SHARING_RING_PFN 29 128 129 /* SHUTDOWN_* action in case of a triple fault */ 130 #define HVM_PARAM_TRIPLE_FAULT_REASON 31 131 132 #define HVM_NR_PARAMS 32 133 134 #endif /* __XEN_PUBLIC_HVM_PARAMS_H__ */ 135