1 /*
2 **
3 ** File: fmopl.c - software implementation of FM sound generator
4 ** types OPL and OPL2
5 **
6 ** Copyright (C) 2002,2003 Jarek Burczynski (bujar at mame dot net)
7 ** Copyright (C) 1999,2000 Tatsuyuki Satoh , MultiArcadeMachineEmulator development
8 **
9 ** Version 0.720003 ;D
10 **
11
12 Revision History:
13
14 06-05-2004 Ripper:
15 - Added mute support
16
17 04-30-2004 Ripper:
18 - Raised the main volume (may cut some quality, but at least you can hear it ;)
19
20 02-20-2004 Ripper:
21 - Changed YM3812Write to do what we want
22
23 04-08-2003 Jarek Burczynski:
24 - removed BFRDY hack. BFRDY is busy flag, and it should be 0 only when the chip
25 handles memory read/write or during the adpcm synthesis when the chip
26 requests another byte of ADPCM data.
27
28 24-07-2003 Jarek Burczynski:
29 - added a small hack for Y8950 status BFRDY flag (bit 3 should be set after
30 some (unknown) delay). Right now it's always set.
31
32 14-06-2003 Jarek Burczynski:
33 - implemented all of the status register flags in Y8950 emulation
34 - renamed Y8950SetDeltaTMemory() parameters from _rom_ to _mem_ since
35 they can be either RAM or ROM
36
37 08-10-2002 Jarek Burczynski (thanks to Dox for the YM3526 chip)
38 - corrected YM3526Read() to always set bit 2 and bit 1
39 to HIGH state - identical to YM3812Read (verified on real YM3526)
40
41 04-28-2002 Jarek Burczynski:
42 - binary exact Envelope Generator (verified on real YM3812);
43 compared to YM2151: the EG clock is equal to internal_clock,
44 rates are 2 times slower and volume resolution is one bit less
45 - modified interface functions (they no longer return pointer -
46 that's internal to the emulator now):
47 - new wrapper functions for OPLCreate: YM3526Init(), YM3812Init() and Y8950Init()
48 - corrected 'off by one' error in feedback calculations (when feedback is off)
49 - enabled waveform usage (credit goes to Vlad Romascanu and zazzal22)
50 - speeded up noise generator calculations (Nicola Salmoria)
51
52 03-24-2002 Jarek Burczynski (thanks to Dox for the YM3812 chip)
53 Complete rewrite (all verified on real YM3812):
54 - corrected sin_tab and tl_tab data
55 - corrected operator output calculations
56 - corrected waveform_select_enable register;
57 simply: ignore all writes to waveform_select register when
58 waveform_select_enable == 0 and do not change the waveform previously selected.
59 - corrected KSR handling
60 - corrected Envelope Generator: attack shape, Sustain mode and
61 Percussive/Non-percussive modes handling
62 - Envelope Generator rates are two times slower now
63 - LFO amplitude (tremolo) and phase modulation (vibrato)
64 - rhythm sounds phase generation
65 - white noise generator (big thanks to Olivier Galibert for mentioning Berlekamp-Massey algorithm)
66 - corrected key on/off handling (the 'key' signal is ORed from three sources: FM, rhythm and CSM)
67 - funky details (like ignoring output of operator 1 in BD rhythm sound when connect == 1)
68
69 12-28-2001 Acho A. Tang
70 - reflected Delta-T EOS status on Y8950 status port.
71 - fixed subscription range of attack/decay tables
72
73
74 To do:
75 add delay before key off in CSM mode (see CSMKeyControll)
76 verify volume of the FM part on the Y8950
77 */
78
79 #include <stdio.h>
80 #include <stdlib.h>
81 #include <math.h>
82 #include <string.h>
83
84 #define MAX_VOLUME 20
85
MULTIPLY_VOLUME(const int v)86 double MULTIPLY_VOLUME(const int v)
87 {
88 return ((double)v + 0.3) / (MAX_VOLUME + 0.3);
89 }
90
91 #if _MSC_VER == 1200 // Visual C++ 6
logerror(...)92 inline void logerror(...) {}
93 #else
94 #define logerror(...)
95 #endif
96
97 #include "fmopl.h"
98
99 #ifndef PI
100 #define PI 3.14159265358979323846
101 #endif
102
103 /* output final shift */
104 #if (OPL_SAMPLE_BITS==16)
105 #define FINAL_SH (0)
106 #define MAXOUT (+32767)
107 #define MINOUT (-32768)
108 #else
109 #define FINAL_SH (8)
110 #define MAXOUT (+127)
111 #define MINOUT (-128)
112 #endif
113
114
115 #define FREQ_SH 16 /* 16.16 fixed point (frequency calculations) */
116 #define EG_SH 16 /* 16.16 fixed point (EG timing) */
117 #define LFO_SH 24 /* 8.24 fixed point (LFO calculations) */
118 #define TIMER_SH 16 /* 16.16 fixed point (timers calculations) */
119
120 #define FREQ_MASK ((1<<FREQ_SH)-1)
121
122 /* envelope output entries */
123 #define ENV_BITS 10
124 #define ENV_LEN (1<<ENV_BITS)
125 #define ENV_STEP (128.0/ENV_LEN)
126
127 #define MAX_ATT_INDEX ((1<<(ENV_BITS-1))-1) /*511*/
128 #define MIN_ATT_INDEX (0)
129
130 /* sinwave entries */
131 #define SIN_BITS 10
132 #define SIN_LEN (1<<SIN_BITS)
133 #define SIN_MASK (SIN_LEN-1)
134
135 #define TL_RES_LEN (256) /* 8 bits addressing (real chip) */
136
137
138
139 /* register number to channel number , slot offset */
140 #define SLOT1 0
141 #define SLOT2 1
142
143 /* Envelope Generator phases */
144
145 #define EG_ATT 4
146 #define EG_DEC 3
147 #define EG_SUS 2
148 #define EG_REL 1
149 #define EG_OFF 0
150
151
152 #define OPL_TYPE_WAVESEL 0x01 /* waveform select */
153 #define OPL_TYPE_ADPCM 0x02 /* DELTA-T ADPCM unit */
154 #define OPL_TYPE_KEYBOARD 0x04 /* keyboard interface */
155 #define OPL_TYPE_IO 0x08 /* I/O port */
156
157 /* ---------- Generic interface section ---------- */
158 #define OPL_TYPE_YM3526 (0)
159 #define OPL_TYPE_YM3812 (OPL_TYPE_WAVESEL)
160 #define OPL_TYPE_Y8950 (OPL_TYPE_ADPCM|OPL_TYPE_KEYBOARD|OPL_TYPE_IO)
161
162
163
164 typedef struct{
165 UINT32 ar; /* attack rate: AR<<2 */
166 UINT32 dr; /* decay rate: DR<<2 */
167 UINT32 rr; /* release rate:RR<<2 */
168 UINT8 KSR; /* key scale rate */
169 UINT8 ksl; /* keyscale level */
170 UINT8 ksr; /* key scale rate: kcode>>KSR */
171 UINT8 mul; /* multiple: mul_tab[ML] */
172
173 /* Phase Generator */
174 UINT32 Cnt; /* frequency counter */
175 UINT32 Incr; /* frequency counter step */
176 UINT8 FB; /* feedback shift value */
177 INT32 *connect1; /* slot1 output pointer */
178 INT32 op1_out[2]; /* slot1 output for feedback */
179 UINT8 CON; /* connection (algorithm) type */
180
181 /* Envelope Generator */
182 UINT8 eg_type; /* percussive/non-percussive mode */
183 UINT8 state; /* phase type */
184 UINT32 TL; /* total level: TL << 2 */
185 INT32 TLL; /* adjusted now TL */
186 INT32 volume; /* envelope counter */
187 UINT32 sl; /* sustain level: sl_tab[SL] */
188 UINT8 eg_sh_ar; /* (attack state) */
189 UINT8 eg_sel_ar; /* (attack state) */
190 UINT8 eg_sh_dr; /* (decay state) */
191 UINT8 eg_sel_dr; /* (decay state) */
192 UINT8 eg_sh_rr; /* (release state) */
193 UINT8 eg_sel_rr; /* (release state) */
194 UINT32 key; /* 0 = KEY OFF, >0 = KEY ON */
195
196 /* LFO */
197 UINT32 AMmask; /* LFO Amplitude Modulation enable mask */
198 UINT8 vib; /* LFO Phase Modulation enable flag (active high)*/
199
200 /* waveform select */
201 unsigned int wavetable;
202
203 // ECWOLF ------------------------------------------------------------------
204 const int *playVolume;
205 } OPL_SLOT;
206
207 typedef struct{
208 OPL_SLOT SLOT[2];
209 /* phase generator state */
210 UINT32 block_fnum; /* block+fnum */
211 UINT32 fc; /* Freq. Increment base */
212 UINT32 ksl_base; /* KeyScaleLevel Base step */
213 UINT8 kcode; /* key code (for key scaling) */
214 BOOL muted;
215 } OPL_CH;
216
217 /* OPL state */
218 typedef struct fm_opl_f {
219 /* FM channel slots */
220 OPL_CH P_CH[9]; /* OPL/OPL2 chips have 9 channels*/
221
222 UINT32 eg_cnt; /* global envelope generator counter */
223 UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/72 */
224 UINT32 eg_timer_add; /* step of eg_timer */
225 UINT32 eg_timer_overflow; /* envelope generator timer overlfows every 1 sample (on real chip) */
226
227 UINT8 rhythm; /* Rhythm mode */
228
229 UINT32 fn_tab[1024]; /* fnumber->increment counter */
230
231 /* LFO */
232 UINT8 lfo_am_depth;
233 UINT8 lfo_pm_depth_range;
234 UINT32 lfo_am_cnt;
235 UINT32 lfo_am_inc;
236 UINT32 lfo_pm_cnt;
237 UINT32 lfo_pm_inc;
238
239 UINT32 noise_rng; /* 23 bit noise shift register */
240 UINT32 noise_p; /* current noise 'phase' */
241 UINT32 noise_f; /* current noise period */
242
243 UINT8 wavesel; /* waveform select enable flag */
244
245 int T[2]; /* timer counters */
246 UINT8 st[2]; /* timer enable */
247
248 /* external event callback handlers */
249 OPL_TIMERHANDLER TimerHandler; /* TIMER handler */
250 int TimerParam; /* TIMER parameter */
251 OPL_IRQHANDLER IRQHandler; /* IRQ handler */
252 int IRQParam; /* IRQ parameter */
253 OPL_UPDATEHANDLER UpdateHandler;/* stream update handler */
254 int UpdateParam; /* stream update parameter */
255
256 UINT8 type; /* chip type */
257 UINT8 address; /* address register */
258 UINT8 status; /* status flag */
259 UINT8 statusmask; /* status mask */
260 UINT8 mode; /* Reg.08 : CSM,notesel,etc. */
261
262 int clock; /* master clock (Hz) */
263 int rate; /* sampling rate (Hz) */
264 double freqbase; /* frequency base */
265 double TimerBase; /* Timer base time (==sampling time)*/
266 } FM_OPL;
267
268
269
270 /* mapping of register number (offset) to slot number used by the emulator */
271 static const int slot_array[32]=
272 {
273 0, 2, 4, 1, 3, 5,-1,-1,
274 6, 8,10, 7, 9,11,-1,-1,
275 12,14,16,13,15,17,-1,-1,
276 -1,-1,-1,-1,-1,-1,-1,-1
277 };
278
279 /* key scale level */
280 /* table is 3dB/octave , DV converts this into 6dB/octave */
281 /* 0.1875 is bit 0 weight of the envelope counter (volume) expressed in the 'decibel' scale */
282 #define DV(db) (UINT32) (db / (0.1875/2.0))
283 static const UINT32 ksl_tab[8*16]=
284 {
285 /* OCT 0 */
286 DV( 0.000),DV( 0.000),DV( 0.000),DV( 0.000),
287 DV( 0.000),DV( 0.000),DV( 0.000),DV( 0.000),
288 DV( 0.000),DV( 0.000),DV( 0.000),DV( 0.000),
289 DV( 0.000),DV( 0.000),DV( 0.000),DV( 0.000),
290 /* OCT 1 */
291 DV( 0.000),DV( 0.000),DV( 0.000),DV( 0.000),
292 DV( 0.000),DV( 0.000),DV( 0.000),DV( 0.000),
293 DV( 0.000),DV( 0.750),DV( 1.125),DV( 1.500),
294 DV( 1.875),DV( 2.250),DV( 2.625),DV( 3.000),
295 /* OCT 2 */
296 DV( 0.000),DV( 0.000),DV( 0.000),DV( 0.000),
297 DV( 0.000),DV( 1.125),DV( 1.875),DV( 2.625),
298 DV( 3.000),DV( 3.750),DV( 4.125),DV( 4.500),
299 DV( 4.875),DV( 5.250),DV( 5.625),DV( 6.000),
300 /* OCT 3 */
301 DV( 0.000),DV( 0.000),DV( 0.000),DV( 1.875),
302 DV( 3.000),DV( 4.125),DV( 4.875),DV( 5.625),
303 DV( 6.000),DV( 6.750),DV( 7.125),DV( 7.500),
304 DV( 7.875),DV( 8.250),DV( 8.625),DV( 9.000),
305 /* OCT 4 */
306 DV( 0.000),DV( 0.000),DV( 3.000),DV( 4.875),
307 DV( 6.000),DV( 7.125),DV( 7.875),DV( 8.625),
308 DV( 9.000),DV( 9.750),DV(10.125),DV(10.500),
309 DV(10.875),DV(11.250),DV(11.625),DV(12.000),
310 /* OCT 5 */
311 DV( 0.000),DV( 3.000),DV( 6.000),DV( 7.875),
312 DV( 9.000),DV(10.125),DV(10.875),DV(11.625),
313 DV(12.000),DV(12.750),DV(13.125),DV(13.500),
314 DV(13.875),DV(14.250),DV(14.625),DV(15.000),
315 /* OCT 6 */
316 DV( 0.000),DV( 6.000),DV( 9.000),DV(10.875),
317 DV(12.000),DV(13.125),DV(13.875),DV(14.625),
318 DV(15.000),DV(15.750),DV(16.125),DV(16.500),
319 DV(16.875),DV(17.250),DV(17.625),DV(18.000),
320 /* OCT 7 */
321 DV( 0.000),DV( 9.000),DV(12.000),DV(13.875),
322 DV(15.000),DV(16.125),DV(16.875),DV(17.625),
323 DV(18.000),DV(18.750),DV(19.125),DV(19.500),
324 DV(19.875),DV(20.250),DV(20.625),DV(21.000)
325 };
326 #undef DV
327
328 /* sustain level table (3dB per step) */
329 /* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,93 (dB)*/
330 #define SC(db) (UINT32) ( db * (2.0/ENV_STEP) )
331 const UINT32 sl_tab[16]={
332 SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7),
333 SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(31)
334 };
335 #undef SC
336
337
338 #define RATE_STEPS (8)
339 const unsigned char eg_inc[15*RATE_STEPS]={
340
341 /*cycle:0 1 2 3 4 5 6 7*/
342
343 /* 0 */ 0,1, 0,1, 0,1, 0,1, /* rates 00..12 0 (increment by 0 or 1) */
344 /* 1 */ 0,1, 0,1, 1,1, 0,1, /* rates 00..12 1 */
345 /* 2 */ 0,1, 1,1, 0,1, 1,1, /* rates 00..12 2 */
346 /* 3 */ 0,1, 1,1, 1,1, 1,1, /* rates 00..12 3 */
347
348 /* 4 */ 1,1, 1,1, 1,1, 1,1, /* rate 13 0 (increment by 1) */
349 /* 5 */ 1,1, 1,2, 1,1, 1,2, /* rate 13 1 */
350 /* 6 */ 1,2, 1,2, 1,2, 1,2, /* rate 13 2 */
351 /* 7 */ 1,2, 2,2, 1,2, 2,2, /* rate 13 3 */
352
353 /* 8 */ 2,2, 2,2, 2,2, 2,2, /* rate 14 0 (increment by 2) */
354 /* 9 */ 2,2, 2,4, 2,2, 2,4, /* rate 14 1 */
355 /*10 */ 2,4, 2,4, 2,4, 2,4, /* rate 14 2 */
356 /*11 */ 2,4, 4,4, 2,4, 4,4, /* rate 14 3 */
357
358 /*12 */ 4,4, 4,4, 4,4, 4,4, /* rates 15 0, 15 1, 15 2, 15 3 (increment by 4) */
359 /*13 */ 8,8, 8,8, 8,8, 8,8, /* rates 15 2, 15 3 for attack */
360 /*14 */ 0,0, 0,0, 0,0, 0,0, /* infinity rates for attack and decay(s) */
361 };
362
363
364 #define O(a) (a*RATE_STEPS)
365
366 /*note that there is no O(13) in this table - it's directly in the code */
367 const unsigned char eg_rate_select[16+64+16]={ /* Envelope Generator rates (16 + 64 rates + 16 RKS) */
368 /* 16 infinite time rates */
369 O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14),
370 O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14),
371
372 /* rates 00-12 */
373 O( 0),O( 1),O( 2),O( 3),
374 O( 0),O( 1),O( 2),O( 3),
375 O( 0),O( 1),O( 2),O( 3),
376 O( 0),O( 1),O( 2),O( 3),
377 O( 0),O( 1),O( 2),O( 3),
378 O( 0),O( 1),O( 2),O( 3),
379 O( 0),O( 1),O( 2),O( 3),
380 O( 0),O( 1),O( 2),O( 3),
381 O( 0),O( 1),O( 2),O( 3),
382 O( 0),O( 1),O( 2),O( 3),
383 O( 0),O( 1),O( 2),O( 3),
384 O( 0),O( 1),O( 2),O( 3),
385 O( 0),O( 1),O( 2),O( 3),
386
387 /* rate 13 */
388 O( 4),O( 5),O( 6),O( 7),
389
390 /* rate 14 */
391 O( 8),O( 9),O(10),O(11),
392
393 /* rate 15 */
394 O(12),O(12),O(12),O(12),
395
396 /* 16 dummy rates (same as 15 3) */
397 O(12),O(12),O(12),O(12),O(12),O(12),O(12),O(12),
398 O(12),O(12),O(12),O(12),O(12),O(12),O(12),O(12),
399
400 };
401 #undef O
402
403 /*rate 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 */
404 /*shift 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0, 0, 0 */
405 /*mask 4095, 2047, 1023, 511, 255, 127, 63, 31, 15, 7, 3, 1, 0, 0, 0, 0 */
406
407 #define O(a) (a*1)
408 const unsigned char eg_rate_shift[16+64+16]={ /* Envelope Generator counter shifts (16 + 64 rates + 16 RKS) */
409 /* 16 infinite time rates */
410 O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
411 O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
412
413 /* rates 00-12 */
414 O(12),O(12),O(12),O(12),
415 O(11),O(11),O(11),O(11),
416 O(10),O(10),O(10),O(10),
417 O( 9),O( 9),O( 9),O( 9),
418 O( 8),O( 8),O( 8),O( 8),
419 O( 7),O( 7),O( 7),O( 7),
420 O( 6),O( 6),O( 6),O( 6),
421 O( 5),O( 5),O( 5),O( 5),
422 O( 4),O( 4),O( 4),O( 4),
423 O( 3),O( 3),O( 3),O( 3),
424 O( 2),O( 2),O( 2),O( 2),
425 O( 1),O( 1),O( 1),O( 1),
426 O( 0),O( 0),O( 0),O( 0),
427
428 /* rate 13 */
429 O( 0),O( 0),O( 0),O( 0),
430
431 /* rate 14 */
432 O( 0),O( 0),O( 0),O( 0),
433
434 /* rate 15 */
435 O( 0),O( 0),O( 0),O( 0),
436
437 /* 16 dummy rates (same as 15 3) */
438 O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
439 O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
440
441 };
442 #undef O
443
444
445 /* multiple table */
446 #define ML(a) (UINT8) (a * 2)
447 const UINT8 mul_tab[16]= {
448 /* 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,10,12,12,15,15 */
449 ML( 0.50),ML( 1.00),ML( 2.00),ML( 3.00),ML( 4.00),ML( 5.00),ML( 6.00),ML( 7.00),
450 ML( 8.00),ML( 9.00),ML(10.00),ML(10.00),ML(12.00),ML(12.00),ML(15.00),ML(15.00)
451 };
452 #undef ML
453
454 /* TL_TAB_LEN is calculated as:
455 * 12 - sinus amplitude bits (Y axis)
456 * 2 - sinus sign bit (Y axis)
457 * TL_RES_LEN - sinus resolution (X axis)
458 */
459 #define TL_TAB_LEN (12*2*TL_RES_LEN)
460 signed int tl_tab[TL_TAB_LEN];
461
462 #define ENV_QUIET (TL_TAB_LEN>>4)
463
464 /* sin waveform table in 'decibel' scale */
465 /* four waveforms on OPL2 type chips */
466 unsigned int sin_tab[SIN_LEN * 4];
467
468
469 /* LFO Amplitude Modulation table (verified on real YM3812)
470 27 output levels (triangle waveform); 1 level takes one of: 192, 256 or 448 samples
471
472 Length: 210 elements.
473
474 Each of the elements has to be repeated
475 exactly 64 times (on 64 consecutive samples).
476 The whole table takes: 64 * 210 = 13440 samples.
477
478 When AM = 1 data is used directly
479 When AM = 0 data is divided by 4 before being used (loosing precision is important)
480 */
481
482 #define LFO_AM_TAB_ELEMENTS 210
483
484 const UINT8 lfo_am_table[LFO_AM_TAB_ELEMENTS] = {
485 0,0,0,0,0,0,0,
486 1,1,1,1,
487 2,2,2,2,
488 3,3,3,3,
489 4,4,4,4,
490 5,5,5,5,
491 6,6,6,6,
492 7,7,7,7,
493 8,8,8,8,
494 9,9,9,9,
495 10,10,10,10,
496 11,11,11,11,
497 12,12,12,12,
498 13,13,13,13,
499 14,14,14,14,
500 15,15,15,15,
501 16,16,16,16,
502 17,17,17,17,
503 18,18,18,18,
504 19,19,19,19,
505 20,20,20,20,
506 21,21,21,21,
507 22,22,22,22,
508 23,23,23,23,
509 24,24,24,24,
510 25,25,25,25,
511 26,26,26,
512 25,25,25,25,
513 24,24,24,24,
514 23,23,23,23,
515 22,22,22,22,
516 21,21,21,21,
517 20,20,20,20,
518 19,19,19,19,
519 18,18,18,18,
520 17,17,17,17,
521 16,16,16,16,
522 15,15,15,15,
523 14,14,14,14,
524 13,13,13,13,
525 12,12,12,12,
526 11,11,11,11,
527 10,10,10,10,
528 9,9,9,9,
529 8,8,8,8,
530 7,7,7,7,
531 6,6,6,6,
532 5,5,5,5,
533 4,4,4,4,
534 3,3,3,3,
535 2,2,2,2,
536 1,1,1,1
537 };
538
539 /* LFO Phase Modulation table (verified on real YM3812) */
540 const INT8 lfo_pm_table[8*8*2] = {
541
542 /* FNUM2/FNUM = 00 0xxxxxxx (0x0000) */
543 0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 0*/
544 0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 1*/
545
546 /* FNUM2/FNUM = 00 1xxxxxxx (0x0080) */
547 0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 0*/
548 1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 1*/
549
550 /* FNUM2/FNUM = 01 0xxxxxxx (0x0100) */
551 1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 0*/
552 2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 1*/
553
554 /* FNUM2/FNUM = 01 1xxxxxxx (0x0180) */
555 1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 0*/
556 3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 1*/
557
558 /* FNUM2/FNUM = 10 0xxxxxxx (0x0200) */
559 2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 0*/
560 4, 2, 0,-2,-4,-2, 0, 2, /*LFO PM depth = 1*/
561
562 /* FNUM2/FNUM = 10 1xxxxxxx (0x0280) */
563 2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 0*/
564 5, 2, 0,-2,-5,-2, 0, 2, /*LFO PM depth = 1*/
565
566 /* FNUM2/FNUM = 11 0xxxxxxx (0x0300) */
567 3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 0*/
568 6, 3, 0,-3,-6,-3, 0, 3, /*LFO PM depth = 1*/
569
570 /* FNUM2/FNUM = 11 1xxxxxxx (0x0380) */
571 3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 0*/
572 7, 3, 0,-3,-7,-3, 0, 3 /*LFO PM depth = 1*/
573 };
574
575
576 /* lock level of common table */
577 static int num_lock = 0;
578
579
580 static void *cur_chip = NULL; /* current chip pointer */
581 OPL_SLOT *SLOT7_1, *SLOT7_2, *SLOT8_1, *SLOT8_2;
582
583 signed int phase_modulation; /* phase modulation input (SLOT 2) */
584 signed int output[1];
585
586 UINT32 LFO_AM;
587 INT32 LFO_PM;
588
limit(int val,int max,int min)589 int limit( int val, int max, int min ) {
590 if ( val > max )
591 val = max;
592 else if ( val < min )
593 val = min;
594
595 return val;
596 }
597
598
599 /* status set and IRQ handling */
OPL_STATUS_SET(FM_OPL * OPL,int flag)600 void OPL_STATUS_SET(FM_OPL *OPL,int flag)
601 {
602 /* set status flag */
603 OPL->status |= flag;
604 if(!(OPL->status & 0x80))
605 {
606 if(OPL->status & OPL->statusmask)
607 { /* IRQ on */
608 OPL->status |= 0x80;
609 /* callback user interrupt handler (IRQ is OFF to ON) */
610 if(OPL->IRQHandler) (OPL->IRQHandler)(OPL->IRQParam,1);
611 }
612 }
613 }
614
615 /* status reset and IRQ handling */
OPL_STATUS_RESET(FM_OPL * OPL,int flag)616 void OPL_STATUS_RESET(FM_OPL *OPL,int flag)
617 {
618 /* reset status flag */
619 OPL->status &=~flag;
620 if((OPL->status & 0x80))
621 {
622 if (!(OPL->status & OPL->statusmask) )
623 {
624 OPL->status &= 0x7f;
625 /* callback user interrupt handler (IRQ is ON to OFF) */
626 if(OPL->IRQHandler) (OPL->IRQHandler)(OPL->IRQParam,0);
627 }
628 }
629 }
630
631 /* IRQ mask set */
OPL_STATUSMASK_SET(FM_OPL * OPL,const UINT8 flag)632 void OPL_STATUSMASK_SET(FM_OPL *OPL,const UINT8 flag)
633 {
634 OPL->statusmask = flag;
635 /* IRQ handling check */
636 OPL_STATUS_SET(OPL,0);
637 OPL_STATUS_RESET(OPL,0);
638 }
639
640
641 /* advance LFO to next sample */
advance_lfo(FM_OPL * OPL)642 void advance_lfo(FM_OPL *OPL)
643 {
644 UINT8 tmp;
645
646 /* LFO */
647 OPL->lfo_am_cnt += OPL->lfo_am_inc;
648 if (OPL->lfo_am_cnt >= (unsigned)(LFO_AM_TAB_ELEMENTS<<LFO_SH) ) /* lfo_am_table is 210 elements long */
649 OPL->lfo_am_cnt -= (UINT32)(LFO_AM_TAB_ELEMENTS<<LFO_SH);
650
651 tmp = lfo_am_table[ OPL->lfo_am_cnt >> LFO_SH ];
652
653 if (OPL->lfo_am_depth)
654 LFO_AM = tmp;
655 else
656 LFO_AM = tmp>>2;
657
658 OPL->lfo_pm_cnt += OPL->lfo_pm_inc;
659 LFO_PM = ((OPL->lfo_pm_cnt>>LFO_SH) & 7) | OPL->lfo_pm_depth_range;
660 }
661
662 /* advance to next sample */
advance(FM_OPL * OPL)663 void advance(FM_OPL *OPL)
664 {
665 OPL_CH *CH;
666 OPL_SLOT *op;
667 int i;
668
669 OPL->eg_timer += OPL->eg_timer_add;
670
671 while (OPL->eg_timer >= OPL->eg_timer_overflow)
672 {
673 OPL->eg_timer -= OPL->eg_timer_overflow;
674
675 OPL->eg_cnt++;
676
677 for (i=0; i<9*2; i++)
678 {
679 CH = &OPL->P_CH[i/2];
680 op = &CH->SLOT[i&1];
681
682 /* Envelope Generator */
683 switch(op->state)
684 {
685 case EG_ATT: /* attack phase */
686 if ( !(OPL->eg_cnt & ((1<<op->eg_sh_ar)-1) ) )
687 {
688 op->volume += (~op->volume *
689 (eg_inc[op->eg_sel_ar + ((OPL->eg_cnt>>op->eg_sh_ar)&7)])
690 ) >>3;
691
692 if (op->volume <= MIN_ATT_INDEX)
693 {
694 op->volume = MIN_ATT_INDEX;
695 op->state = EG_DEC;
696 }
697
698 }
699 break;
700
701 case EG_DEC: /* decay phase */
702 if ( !(OPL->eg_cnt & ((1<<op->eg_sh_dr)-1) ) )
703 {
704 op->volume += eg_inc[op->eg_sel_dr + ((OPL->eg_cnt>>op->eg_sh_dr)&7)];
705
706 if ( (UINT32) op->volume >= op->sl )
707 op->state = EG_SUS;
708
709 }
710 break;
711
712 case EG_SUS: /* sustain phase */
713
714 /* this is important behaviour:
715 one can change percusive/non-percussive modes on the fly and
716 the chip will remain in sustain phase - verified on real YM3812 */
717
718 if(op->eg_type) /* non-percussive mode */
719 {
720 /* do nothing */
721 }
722 else /* percussive mode */
723 {
724 /* during sustain phase chip adds Release Rate (in percussive mode) */
725 if ( !(OPL->eg_cnt & ((1<<op->eg_sh_rr)-1) ) )
726 {
727 op->volume += eg_inc[op->eg_sel_rr + ((OPL->eg_cnt>>op->eg_sh_rr)&7)];
728
729 if ( op->volume >= MAX_ATT_INDEX )
730 op->volume = MAX_ATT_INDEX;
731 }
732 /* else do nothing in sustain phase */
733 }
734 break;
735
736 case EG_REL: /* release phase */
737 if ( !(OPL->eg_cnt & ((1<<op->eg_sh_rr)-1) ) )
738 {
739 op->volume += eg_inc[op->eg_sel_rr + ((OPL->eg_cnt>>op->eg_sh_rr)&7)];
740
741 if ( op->volume >= MAX_ATT_INDEX )
742 {
743 op->volume = MAX_ATT_INDEX;
744 op->state = EG_OFF;
745 }
746
747 }
748 break;
749
750 default:
751 break;
752 }
753 }
754 }
755
756 for (i=0; i<9*2; i++)
757 {
758 CH = &OPL->P_CH[i/2];
759 op = &CH->SLOT[i&1];
760
761 /* Phase Generator */
762 if(op->vib)
763 {
764 UINT8 block;
765 unsigned int block_fnum = CH->block_fnum;
766
767 unsigned int fnum_lfo = (block_fnum&0x0380) >> 7;
768
769 signed int lfo_fn_table_index_offset = lfo_pm_table[LFO_PM + 16*fnum_lfo ];
770
771 if (lfo_fn_table_index_offset) /* LFO phase modulation active */
772 {
773 block_fnum += lfo_fn_table_index_offset;
774 block = (block_fnum&0x1c00) >> 10;
775 op->Cnt += (OPL->fn_tab[block_fnum&0x03ff] >> (7-block)) * op->mul;
776 }
777 else /* LFO phase modulation = zero */
778 {
779 op->Cnt += op->Incr;
780 }
781 }
782 else /* LFO phase modulation disabled for this operator */
783 {
784 op->Cnt += op->Incr;
785 }
786 }
787
788 /* The Noise Generator of the YM3812 is 23-bit shift register.
789 * Period is equal to 2^23-2 samples.
790 * Register works at sampling frequency of the chip, so output
791 * can change on every sample.
792 *
793 * Output of the register and input to the bit 22 is:
794 * bit0 XOR bit14 XOR bit15 XOR bit22
795 *
796 * Simply use bit 22 as the noise output.
797 */
798
799 OPL->noise_p += OPL->noise_f;
800 i = OPL->noise_p >> FREQ_SH; /* number of events (shifts of the shift register) */
801 OPL->noise_p &= FREQ_MASK;
802 while (i)
803 {
804 /*
805 UINT32 j;
806 j = ( (OPL->noise_rng) ^ (OPL->noise_rng>>14) ^ (OPL->noise_rng>>15) ^ (OPL->noise_rng>>22) ) & 1;
807 OPL->noise_rng = (j<<22) | (OPL->noise_rng>>1);
808 */
809
810 /*
811 Instead of doing all the logic operations above, we
812 use a trick here (and use bit 0 as the noise output).
813 The difference is only that the noise bit changes one
814 step ahead. This doesn't matter since we don't know
815 what is real state of the noise_rng after the reset.
816 */
817
818 if (OPL->noise_rng & 1) OPL->noise_rng ^= 0x800302;
819 OPL->noise_rng >>= 1;
820
821 i--;
822 }
823 }
824
825
op_calc(UINT32 phase,unsigned int env,signed int pm,unsigned int wave_tab)826 signed int op_calc(UINT32 phase, unsigned int env, signed int pm, unsigned int wave_tab)
827 {
828 UINT32 p;
829
830 p = (env<<4) + sin_tab[wave_tab + ((((signed int)((phase & ~FREQ_MASK) + (pm<<16))) >> FREQ_SH ) & SIN_MASK) ];
831
832 if (p >= TL_TAB_LEN)
833 return 0;
834 return tl_tab[p];
835 }
836
op_calc1(UINT32 phase,unsigned int env,signed int pm,unsigned int wave_tab)837 signed int op_calc1(UINT32 phase, unsigned int env, signed int pm, unsigned int wave_tab)
838 {
839 UINT32 p;
840
841 p = (env<<4) + sin_tab[wave_tab + ((((signed int)((phase & ~FREQ_MASK) + pm )) >> FREQ_SH ) & SIN_MASK) ];
842
843 if (p >= TL_TAB_LEN)
844 return 0;
845 return tl_tab[p];
846 }
847
848
849 #define volume_calc(OP) ((OP)->TLL + ((UINT32)(OP)->volume) + (LFO_AM & (OP)->AMmask))
850
851 /* calculate output */
OPL_CALC_CH(OPL_CH * CH)852 void OPL_CALC_CH( OPL_CH *CH )
853 {
854 OPL_SLOT *SLOT;
855 unsigned int env;
856 signed int out;
857
858 phase_modulation = 0;
859
860 /* SLOT 1 */
861 SLOT = &CH->SLOT[SLOT1];
862 env = volume_calc(SLOT);
863 out = SLOT->op1_out[0] + SLOT->op1_out[1];
864 SLOT->op1_out[0] = SLOT->op1_out[1];
865 if(!CH->muted || SLOT->connect1!=output)
866 *SLOT->connect1 += SLOT->op1_out[0];
867 SLOT->op1_out[1] = 0;
868 if( env < ENV_QUIET )
869 {
870 if (!SLOT->FB)
871 out = 0;
872 SLOT->op1_out[1] = op_calc1(SLOT->Cnt, env, (out<<SLOT->FB), SLOT->wavetable );
873 }
874
875 if(CH->muted) return;
876
877 /* SLOT 2 */
878 SLOT++;
879 env = volume_calc(SLOT);
880 if( env < ENV_QUIET )
881 output[0] += (int)(op_calc(SLOT->Cnt, env, phase_modulation, SLOT->wavetable)*MULTIPLY_VOLUME(*SLOT->playVolume));
882 }
883
884 /*
885 operators used in the rhythm sounds generation process:
886
887 Envelope Generator:
888
889 channel operator register number Bass High Snare Tom Top
890 / slot number TL ARDR SLRR Wave Drum Hat Drum Tom Cymbal
891 6 / 0 12 50 70 90 f0 +
892 6 / 1 15 53 73 93 f3 +
893 7 / 0 13 51 71 91 f1 +
894 7 / 1 16 54 74 94 f4 +
895 8 / 0 14 52 72 92 f2 +
896 8 / 1 17 55 75 95 f5 +
897
898 Phase Generator:
899
900 channel operator register number Bass High Snare Tom Top
901 / slot number MULTIPLE Drum Hat Drum Tom Cymbal
902 6 / 0 12 30 +
903 6 / 1 15 33 +
904 7 / 0 13 31 + + +
905 7 / 1 16 34 ----- n o t u s e d -----
906 8 / 0 14 32 +
907 8 / 1 17 35 + +
908
909 channel operator register number Bass High Snare Tom Top
910 number number BLK/FNUM2 FNUM Drum Hat Drum Tom Cymbal
911 6 12,15 B6 A6 +
912
913 7 13,16 B7 A7 + + +
914
915 8 14,17 B8 A8 + + +
916
917 */
918
919 /* calculate rhythm */
920
OPL_CALC_RH(OPL_CH * CH,unsigned int noise)921 void OPL_CALC_RH( OPL_CH *CH, unsigned int noise )
922 {
923 OPL_SLOT *SLOT;
924 signed int out;
925 unsigned int env;
926
927
928 /* Bass Drum (verified on real YM3812):
929 - depends on the channel 6 'connect' register:
930 when connect = 0 it works the same as in normal (non-rhythm) mode (op1->op2->out)
931 when connect = 1 _only_ operator 2 is present on output (op2->out), operator 1 is ignored
932 - output sample always is multiplied by 2
933 */
934
935 phase_modulation = 0;
936 /* SLOT 1 */
937 SLOT = &CH[6].SLOT[SLOT1];
938 env = volume_calc(SLOT);
939
940 out = SLOT->op1_out[0] + SLOT->op1_out[1];
941 SLOT->op1_out[0] = SLOT->op1_out[1];
942
943 if (!SLOT->CON)
944 phase_modulation = SLOT->op1_out[0];
945 /* else ignore output of operator 1 */
946
947 SLOT->op1_out[1] = 0;
948 if( env < ENV_QUIET )
949 {
950 if (!SLOT->FB)
951 out = 0;
952 SLOT->op1_out[1] = op_calc1(SLOT->Cnt, env, (out<<SLOT->FB), SLOT->wavetable );
953 }
954
955 /* SLOT 2 */
956 SLOT++;
957 env = volume_calc(SLOT);
958 if( env < ENV_QUIET && !CH->muted)
959 output[0] += (int)(op_calc(SLOT->Cnt, env, phase_modulation, SLOT->wavetable) * 2 * MULTIPLY_VOLUME(*SLOT->playVolume));
960
961
962 /* Phase generation is based on: */
963 /* HH (13) channel 7->slot 1 combined with channel 8->slot 2 (same combination as TOP CYMBAL but different output phases) */
964 /* SD (16) channel 7->slot 1 */
965 /* TOM (14) channel 8->slot 1 */
966 /* TOP (17) channel 7->slot 1 combined with channel 8->slot 2 (same combination as HIGH HAT but different output phases) */
967
968 /* Envelope generation based on: */
969 /* HH channel 7->slot1 */
970 /* SD channel 7->slot2 */
971 /* TOM channel 8->slot1 */
972 /* TOP channel 8->slot2 */
973
974
975 /* The following formulas can be well optimized.
976 I leave them in direct form for now (in case I've missed something).
977 */
978
979 /* High Hat (verified on real YM3812) */
980 env = volume_calc(SLOT7_1);
981 if( env < ENV_QUIET && !CH->muted)
982 {
983
984 /* high hat phase generation:
985 phase = d0 or 234 (based on frequency only)
986 phase = 34 or 2d0 (based on noise)
987 */
988
989 /* base frequency derived from operator 1 in channel 7 */
990 unsigned char bit7 = ((SLOT7_1->Cnt>>FREQ_SH)>>7)&1;
991 unsigned char bit3 = ((SLOT7_1->Cnt>>FREQ_SH)>>3)&1;
992 unsigned char bit2 = ((SLOT7_1->Cnt>>FREQ_SH)>>2)&1;
993
994 unsigned char res1 = (bit2 ^ bit7) | bit3;
995
996 /* when res1 = 0 phase = 0x000 | 0xd0; */
997 /* when res1 = 1 phase = 0x200 | (0xd0>>2); */
998 UINT32 phase = res1 ? (0x200|(0xd0>>2)) : 0xd0;
999
1000 /* enable gate based on frequency of operator 2 in channel 8 */
1001 unsigned char bit5e= ((SLOT8_2->Cnt>>FREQ_SH)>>5)&1;
1002 unsigned char bit3e= ((SLOT8_2->Cnt>>FREQ_SH)>>3)&1;
1003
1004 unsigned char res2 = (bit3e ^ bit5e);
1005
1006 /* when res2 = 0 pass the phase from calculation above (res1); */
1007 /* when res2 = 1 phase = 0x200 | (0xd0>>2); */
1008 if (res2)
1009 phase = (0x200|(0xd0>>2));
1010
1011
1012 /* when phase & 0x200 is set and noise=1 then phase = 0x200|0xd0 */
1013 /* when phase & 0x200 is set and noise=0 then phase = 0x200|(0xd0>>2), ie no change */
1014 if (phase&0x200)
1015 {
1016 if (noise)
1017 phase = 0x200|0xd0;
1018 }
1019 else
1020 /* when phase & 0x200 is clear and noise=1 then phase = 0xd0>>2 */
1021 /* when phase & 0x200 is clear and noise=0 then phase = 0xd0, ie no change */
1022 {
1023 if (noise)
1024 phase = 0xd0>>2;
1025 }
1026
1027 output[0] += (int)(op_calc(phase<<FREQ_SH, env, 0, SLOT7_1->wavetable) * 2 * MULTIPLY_VOLUME(*SLOT7_1->playVolume));
1028 }
1029
1030 /* Snare Drum (verified on real YM3812) */
1031 env = volume_calc(SLOT7_2);
1032 if( env < ENV_QUIET && !CH->muted)
1033 {
1034 /* base frequency derived from operator 1 in channel 7 */
1035 unsigned char bit8 = ((SLOT7_1->Cnt>>FREQ_SH)>>8)&1;
1036
1037 /* when bit8 = 0 phase = 0x100; */
1038 /* when bit8 = 1 phase = 0x200; */
1039 UINT32 phase = bit8 ? 0x200 : 0x100;
1040
1041 /* Noise bit XOR'es phase by 0x100 */
1042 /* when noisebit = 0 pass the phase from calculation above */
1043 /* when noisebit = 1 phase ^= 0x100; */
1044 /* in other words: phase ^= (noisebit<<8); */
1045 if (noise)
1046 phase ^= 0x100;
1047
1048 output[0] += (int)(op_calc(phase<<FREQ_SH, env, 0, SLOT7_2->wavetable) * 2 * MULTIPLY_VOLUME(*SLOT7_2->playVolume));
1049 }
1050
1051 /* Tom Tom (verified on real YM3812) */
1052 env = volume_calc(SLOT8_1);
1053 if( env < ENV_QUIET && !CH->muted)
1054 output[0] += (int)(op_calc(SLOT8_1->Cnt, env, 0, SLOT8_1->wavetable) * 2 * MULTIPLY_VOLUME(*SLOT8_1->playVolume));
1055
1056 /* Top Cymbal (verified on real YM3812) */
1057 env = volume_calc(SLOT8_2);
1058 if( env < ENV_QUIET && !CH->muted)
1059 {
1060 /* base frequency derived from operator 1 in channel 7 */
1061 unsigned char bit7 = ((SLOT7_1->Cnt>>FREQ_SH)>>7)&1;
1062 unsigned char bit3 = ((SLOT7_1->Cnt>>FREQ_SH)>>3)&1;
1063 unsigned char bit2 = ((SLOT7_1->Cnt>>FREQ_SH)>>2)&1;
1064
1065 unsigned char res1 = (bit2 ^ bit7) | bit3;
1066
1067 /* when res1 = 0 phase = 0x000 | 0x100; */
1068 /* when res1 = 1 phase = 0x200 | 0x100; */
1069 UINT32 phase = res1 ? 0x300 : 0x100;
1070
1071 /* enable gate based on frequency of operator 2 in channel 8 */
1072 unsigned char bit5e= ((SLOT8_2->Cnt>>FREQ_SH)>>5)&1;
1073 unsigned char bit3e= ((SLOT8_2->Cnt>>FREQ_SH)>>3)&1;
1074
1075 unsigned char res2 = (bit3e ^ bit5e);
1076 /* when res2 = 0 pass the phase from calculation above (res1); */
1077 /* when res2 = 1 phase = 0x200 | 0x100; */
1078 if (res2)
1079 phase = 0x300;
1080
1081 output[0] += (int)(op_calc(phase<<FREQ_SH, env, 0, SLOT8_2->wavetable) * 2 * MULTIPLY_VOLUME(*SLOT8_2->playVolume));
1082 }
1083
1084 }
1085
1086
1087 /* generic table initialize */
init_tables(void)1088 static int init_tables(void)
1089 {
1090 signed int i,x;
1091 signed int n;
1092 double o,m;
1093
1094
1095 for (x=0; x<TL_RES_LEN; x++)
1096 {
1097 m = (1<<16) / pow(2, (x+1) * (ENV_STEP/4.0) / 8.0);
1098 m = floor(m);
1099
1100 /* we never reach (1<<16) here due to the (x+1) */
1101 /* result fits within 16 bits at maximum */
1102
1103 n = (int)m; /* 16 bits here */
1104 n >>= 4; /* 12 bits here */
1105 if (n&1) /* round to nearest */
1106 n = (n>>1)+1;
1107 else
1108 n = n>>1;
1109 /* 11 bits here (rounded) */
1110 n <<= 1; /* 12 bits here (as in real chip) */
1111 tl_tab[ x*2 + 0 ] = n;
1112 tl_tab[ x*2 + 1 ] = -tl_tab[ x*2 + 0 ];
1113
1114 for (i=1; i<12; i++)
1115 {
1116 tl_tab[ x*2+0 + i*2*TL_RES_LEN ] = tl_tab[ x*2+0 ]>>i;
1117 tl_tab[ x*2+1 + i*2*TL_RES_LEN ] = -tl_tab[ x*2+0 + i*2*TL_RES_LEN ];
1118 }
1119 #if 0
1120 logerror("tl %04i", x*2);
1121 for (i=0; i<12; i++)
1122 logerror(", [%02i] %5i", i*2, tl_tab[ x*2 /*+1*/ + i*2*TL_RES_LEN ] );
1123 logerror("\n");
1124 #endif
1125 }
1126 /*logerror("FMOPL.C: TL_TAB_LEN = %i elements (%i bytes)\n",TL_TAB_LEN, (int)sizeof(tl_tab));*/
1127
1128
1129 for (i=0; i<SIN_LEN; i++)
1130 {
1131 /* non-standard sinus */
1132 m = sin( ((i*2)+1) * PI / SIN_LEN ); /* checked against the real chip */
1133
1134 /* we never reach zero here due to ((i*2)+1) */
1135
1136 if (m>0.0)
1137 o = 8*log(1.0/m)/log(2.0); /* convert to 'decibels' */
1138 else
1139 o = 8*log(-1.0/m)/log(2.0); /* convert to 'decibels' */
1140
1141 o = o / (ENV_STEP/4);
1142
1143 n = (int)(2.0*o);
1144 if (n&1) /* round to nearest */
1145 n = (n>>1)+1;
1146 else
1147 n = n>>1;
1148
1149 sin_tab[ i ] = n*2 + (m>=0.0? 0: 1 );
1150
1151 /*logerror("FMOPL.C: sin [%4i (hex=%03x)]= %4i (tl_tab value=%5i)\n", i, i, sin_tab[i], tl_tab[sin_tab[i]] );*/
1152 }
1153
1154 for (i=0; i<SIN_LEN; i++)
1155 {
1156 /* waveform 1: __ __ */
1157 /* / \____/ \____*/
1158 /* output only first half of the sinus waveform (positive one) */
1159
1160 if (i & (1<<(SIN_BITS-1)) )
1161 sin_tab[1*SIN_LEN+i] = TL_TAB_LEN;
1162 else
1163 sin_tab[1*SIN_LEN+i] = sin_tab[i];
1164
1165 /* waveform 2: __ __ __ __ */
1166 /* / \/ \/ \/ \*/
1167 /* abs(sin) */
1168
1169 sin_tab[2*SIN_LEN+i] = sin_tab[i & (SIN_MASK>>1) ];
1170
1171 /* waveform 3: _ _ _ _ */
1172 /* / |_/ |_/ |_/ |_*/
1173 /* abs(output only first quarter of the sinus waveform) */
1174
1175 if (i & (1<<(SIN_BITS-2)) )
1176 sin_tab[3*SIN_LEN+i] = TL_TAB_LEN;
1177 else
1178 sin_tab[3*SIN_LEN+i] = sin_tab[i & (SIN_MASK>>2)];
1179
1180 /*logerror("FMOPL.C: sin1[%4i]= %4i (tl_tab value=%5i)\n", i, sin_tab[1*SIN_LEN+i], tl_tab[sin_tab[1*SIN_LEN+i]] );
1181 logerror("FMOPL.C: sin2[%4i]= %4i (tl_tab value=%5i)\n", i, sin_tab[2*SIN_LEN+i], tl_tab[sin_tab[2*SIN_LEN+i]] );
1182 logerror("FMOPL.C: sin3[%4i]= %4i (tl_tab value=%5i)\n", i, sin_tab[3*SIN_LEN+i], tl_tab[sin_tab[3*SIN_LEN+i]] );*/
1183 }
1184 /*logerror("FMOPL.C: ENV_QUIET= %08x (dec*8=%i)\n", ENV_QUIET, ENV_QUIET*8 );*/
1185
1186 return 1;
1187 }
1188
OPLCloseTable(void)1189 static void OPLCloseTable( void )
1190 {
1191 }
1192
1193
1194
OPL_initalize(FM_OPL * OPL)1195 static void OPL_initalize(FM_OPL *OPL)
1196 {
1197 int i;
1198
1199 /* frequency base */
1200 OPL->freqbase = (OPL->rate) ? ((double)OPL->clock / 72.0) / OPL->rate : 0;
1201 #if 0
1202 OPL->rate = (double)OPL->clock / 72.0;
1203 OPL->freqbase = 1.0;
1204 #endif
1205
1206 /*logerror("freqbase=%f\n", OPL->freqbase);*/
1207
1208 /* Timer base time */
1209 OPL->TimerBase = 1.0 / ((double)OPL->clock / 72.0 );
1210
1211 /* make fnumber -> increment counter table */
1212 for( i=0 ; i < 1024 ; i++ )
1213 {
1214 /* opn phase increment counter = 20bit */
1215 OPL->fn_tab[i] = (UINT32)( (double)i * 64 * OPL->freqbase * (1<<(FREQ_SH-10)) ); /* -10 because chip works with 10.10 fixed point, while we use 16.16 */
1216 #if 0
1217 logerror("FMOPL.C: fn_tab[%4i] = %08x (dec=%8i)\n",
1218 i, OPL->fn_tab[i]>>6, OPL->fn_tab[i]>>6 );
1219 #endif
1220 }
1221
1222 #if 0
1223 for( i=0 ; i < 16 ; i++ )
1224 {
1225 logerror("FMOPL.C: sl_tab[%i] = %08x\n",
1226 i, sl_tab[i] );
1227 }
1228 for( i=0 ; i < 8 ; i++ )
1229 {
1230 int j;
1231 logerror("FMOPL.C: ksl_tab[oct=%2i] =",i);
1232 for (j=0; j<16; j++)
1233 {
1234 logerror("%08x ", ksl_tab[i*16+j] );
1235 }
1236 logerror("\n");
1237 }
1238 #endif
1239
1240
1241 /* Amplitude modulation: 27 output levels (triangle waveform); 1 level takes one of: 192, 256 or 448 samples */
1242 /* One entry from LFO_AM_TABLE lasts for 64 samples */
1243 OPL->lfo_am_inc = (UINT32) ((1.0 / 64.0 ) * (1<<LFO_SH) * OPL->freqbase);
1244
1245 /* Vibrato: 8 output levels (triangle waveform); 1 level takes 1024 samples */
1246 OPL->lfo_pm_inc = (UINT32) ((1.0 / 1024.0) * (1<<LFO_SH) * OPL->freqbase);
1247
1248 /*logerror ("OPL->lfo_am_inc = %8x ; OPL->lfo_pm_inc = %8x\n", OPL->lfo_am_inc, OPL->lfo_pm_inc);*/
1249
1250 /* Noise generator: a step takes 1 sample */
1251 OPL->noise_f = (UINT32) ((1.0 / 1.0) * (1<<FREQ_SH) * OPL->freqbase);
1252
1253 OPL->eg_timer_add = (UINT32) ((1<<EG_SH) * OPL->freqbase);
1254 OPL->eg_timer_overflow = ( 1 ) * (1<<EG_SH);
1255 /*logerror("OPLinit eg_timer_add=%8x eg_timer_overflow=%8x\n", OPL->eg_timer_add, OPL->eg_timer_overflow);*/
1256
1257 }
1258
FM_KEYON(OPL_SLOT * SLOT,UINT32 key_set,const int * volume)1259 void FM_KEYON(OPL_SLOT *SLOT, UINT32 key_set, const int *volume)
1260 {
1261 SLOT->playVolume = volume;
1262 if( !SLOT->key )
1263 {
1264 /* restart Phase Generator */
1265 SLOT->Cnt = 0;
1266 /* phase -> Attack */
1267 SLOT->state = EG_ATT;
1268 }
1269 SLOT->key |= key_set;
1270 }
1271
FM_KEYOFF(OPL_SLOT * SLOT,UINT32 key_clr)1272 void FM_KEYOFF(OPL_SLOT *SLOT, UINT32 key_clr)
1273 {
1274 if( SLOT->key )
1275 {
1276 SLOT->key &= key_clr;
1277
1278 if( !SLOT->key )
1279 {
1280 /* phase -> Release */
1281 if (SLOT->state>EG_REL)
1282 SLOT->state = EG_REL;
1283 }
1284 }
1285 }
1286
1287 /* update phase increment counter of operator (also update the EG rates if necessary) */
CALC_FCSLOT(OPL_CH * CH,OPL_SLOT * SLOT)1288 void CALC_FCSLOT(OPL_CH *CH,OPL_SLOT *SLOT)
1289 {
1290 int ksr;
1291
1292 /* (frequency) phase increment counter */
1293 SLOT->Incr = CH->fc * SLOT->mul;
1294 ksr = CH->kcode >> SLOT->KSR;
1295
1296 if( SLOT->ksr != ksr )
1297 {
1298 SLOT->ksr = (UINT8)ksr;
1299
1300 /* calculate envelope generator rates */
1301 if ((SLOT->ar + SLOT->ksr) < 16+62)
1302 {
1303 SLOT->eg_sh_ar = eg_rate_shift [SLOT->ar + SLOT->ksr ];
1304 SLOT->eg_sel_ar = eg_rate_select[SLOT->ar + SLOT->ksr ];
1305 }
1306 else
1307 {
1308 SLOT->eg_sh_ar = 0;
1309 SLOT->eg_sel_ar = 13*RATE_STEPS;
1310 }
1311 SLOT->eg_sh_dr = eg_rate_shift [SLOT->dr + SLOT->ksr ];
1312 SLOT->eg_sel_dr = eg_rate_select[SLOT->dr + SLOT->ksr ];
1313 SLOT->eg_sh_rr = eg_rate_shift [SLOT->rr + SLOT->ksr ];
1314 SLOT->eg_sel_rr = eg_rate_select[SLOT->rr + SLOT->ksr ];
1315 }
1316 }
1317
1318 /* set multi,am,vib,EG-TYP,KSR,mul */
set_mul(FM_OPL * OPL,int slot,int v)1319 void set_mul(FM_OPL *OPL,int slot,int v)
1320 {
1321 OPL_CH *CH = &OPL->P_CH[slot/2];
1322 OPL_SLOT *SLOT = &CH->SLOT[slot&1];
1323
1324 SLOT->mul = mul_tab[v&0x0f];
1325 SLOT->KSR = (v&0x10) ? 0 : 2;
1326 SLOT->eg_type = (v&0x20);
1327 SLOT->vib = (v&0x40);
1328 SLOT->AMmask = (v&0x80) ? ~0 : 0;
1329 CALC_FCSLOT(CH,SLOT);
1330 }
1331
1332 /* set ksl & tl */
set_ksl_tl(FM_OPL * OPL,int slot,int v)1333 void set_ksl_tl(FM_OPL *OPL,int slot,int v)
1334 {
1335 OPL_CH *CH = &OPL->P_CH[slot/2];
1336 OPL_SLOT *SLOT = &CH->SLOT[slot&1];
1337 int ksl = v>>6; /* 0 / 1.5 / 3.0 / 6.0 dB/OCT */
1338
1339 SLOT->ksl = (UINT8)(ksl ? 3-ksl : 31);
1340 SLOT->TL = (v&0x3f)<<(ENV_BITS-1-7); /* 7 bits TL (bit 6 = always 0) */
1341
1342 SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
1343 }
1344
1345 /* set attack rate & decay rate */
set_ar_dr(FM_OPL * OPL,int slot,int v)1346 void set_ar_dr(FM_OPL *OPL,int slot,int v)
1347 {
1348 OPL_CH *CH = &OPL->P_CH[slot/2];
1349 OPL_SLOT *SLOT = &CH->SLOT[slot&1];
1350
1351 SLOT->ar = (v>>4) ? 16 + ((v>>4) <<2) : 0;
1352
1353 if ((SLOT->ar + SLOT->ksr) < 16+62)
1354 {
1355 SLOT->eg_sh_ar = eg_rate_shift [SLOT->ar + SLOT->ksr ];
1356 SLOT->eg_sel_ar = eg_rate_select[SLOT->ar + SLOT->ksr ];
1357 }
1358 else
1359 {
1360 SLOT->eg_sh_ar = 0;
1361 SLOT->eg_sel_ar = 13*RATE_STEPS;
1362 }
1363
1364 SLOT->dr = (v&0x0f)? 16 + ((v&0x0f)<<2) : 0;
1365 SLOT->eg_sh_dr = eg_rate_shift [SLOT->dr + SLOT->ksr ];
1366 SLOT->eg_sel_dr = eg_rate_select[SLOT->dr + SLOT->ksr ];
1367 }
1368
1369 /* set sustain level & release rate */
set_sl_rr(FM_OPL * OPL,int slot,int v)1370 void set_sl_rr(FM_OPL *OPL,int slot,int v)
1371 {
1372 OPL_CH *CH = &OPL->P_CH[slot/2];
1373 OPL_SLOT *SLOT = &CH->SLOT[slot&1];
1374
1375 SLOT->sl = sl_tab[ v>>4 ];
1376
1377 SLOT->rr = (v&0x0f)? 16 + ((v&0x0f)<<2) : 0;
1378 SLOT->eg_sh_rr = eg_rate_shift [SLOT->rr + SLOT->ksr ];
1379 SLOT->eg_sel_rr = eg_rate_select[SLOT->rr + SLOT->ksr ];
1380 }
1381
1382
1383 /* write a value v to register r on OPL chip */
OPLWriteReg(FM_OPL * OPL,int r,int v,const int * volume)1384 static void OPLWriteReg(FM_OPL *OPL, int r, int v, const int *volume)
1385 {
1386 OPL_CH *CH;
1387 int slot;
1388 int block_fnum;
1389
1390
1391 /* adjust bus to 8 bits */
1392 r &= 0xff;
1393 v &= 0xff;
1394
1395 switch(r&0xe0)
1396 {
1397 case 0x00: /* 00-1f:control */
1398 switch(r&0x1f)
1399 {
1400 case 0x01: /* waveform select enable */
1401 if(OPL->type&OPL_TYPE_WAVESEL)
1402 {
1403 OPL->wavesel = v&0x20;
1404 /* do not change the waveform previously selected */
1405 }
1406 break;
1407 case 0x02: /* Timer 1 */
1408 OPL->T[0] = (256-v)*4;
1409 break;
1410 case 0x03: /* Timer 2 */
1411 OPL->T[1] = (256-v)*16;
1412 break;
1413 case 0x04: /* IRQ clear / mask and Timer enable */
1414 if(v&0x80)
1415 { /* IRQ flag clear */
1416 OPL_STATUS_RESET(OPL,0x7f-0x08); /* don't reset BFRDY flag or we will have to call deltat module to set the flag */
1417 }
1418 else
1419 { /* set IRQ mask ,timer enable*/
1420 UINT8 st1 = v&1;
1421 UINT8 st2 = (v>>1)&1;
1422
1423 /* IRQRST,T1MSK,t2MSK,EOSMSK,BRMSK,x,ST2,ST1 */
1424 OPL_STATUS_RESET(OPL, v & (0x78-0x08) );
1425 OPL_STATUSMASK_SET(OPL, (~v) & 0x78 );
1426
1427 /* timer 2 */
1428 if(OPL->st[1] != st2)
1429 {
1430 double interval = st2 ? (double)OPL->T[1]*OPL->TimerBase : 0.0;
1431 OPL->st[1] = st2;
1432 if (OPL->TimerHandler) (OPL->TimerHandler)(OPL->TimerParam+1,interval);
1433 }
1434 /* timer 1 */
1435 if(OPL->st[0] != st1)
1436 {
1437 double interval = st1 ? (double)OPL->T[0]*OPL->TimerBase : 0.0;
1438 OPL->st[0] = st1;
1439 if (OPL->TimerHandler) (OPL->TimerHandler)(OPL->TimerParam+0,interval);
1440 }
1441 }
1442 break;
1443 case 0x08: /* MODE,DELTA-T control 2 : CSM,NOTESEL,x,x,smpl,da/ad,64k,rom */
1444 OPL->mode = (UINT8)v;
1445 break;
1446 default:
1447 logerror("FMOPL.C: write to unknown register: %02x\n",r);
1448 break;
1449 }
1450 break;
1451 case 0x20: /* am ON, vib ON, ksr, eg_type, mul */
1452 slot = slot_array[r&0x1f];
1453 if(slot < 0) return;
1454 set_mul(OPL,slot,v);
1455 break;
1456 case 0x40:
1457 slot = slot_array[r&0x1f];
1458 if(slot < 0) return;
1459 set_ksl_tl(OPL,slot,v);
1460 break;
1461 case 0x60:
1462 slot = slot_array[r&0x1f];
1463 if(slot < 0) return;
1464 set_ar_dr(OPL,slot,v);
1465 break;
1466 case 0x80:
1467 slot = slot_array[r&0x1f];
1468 if(slot < 0) return;
1469 set_sl_rr(OPL,slot,v);
1470 break;
1471 case 0xa0:
1472 if (r == 0xbd) /* am depth, vibrato depth, r,bd,sd,tom,tc,hh */
1473 {
1474 OPL->lfo_am_depth = v & 0x80;
1475 OPL->lfo_pm_depth_range = (v&0x40) ? 8 : 0;
1476
1477 OPL->rhythm = v&0x3f;
1478
1479 if(OPL->rhythm&0x20)
1480 {
1481 /* BD key on/off */
1482 if(v&0x10)
1483 {
1484 FM_KEYON (&OPL->P_CH[6].SLOT[SLOT1], 2, volume);
1485 FM_KEYON (&OPL->P_CH[6].SLOT[SLOT2], 2, volume);
1486 }
1487 else
1488 {
1489 FM_KEYOFF(&OPL->P_CH[6].SLOT[SLOT1], (UINT32)~2);
1490 FM_KEYOFF(&OPL->P_CH[6].SLOT[SLOT2], (UINT32)~2);
1491 }
1492 /* HH key on/off */
1493 if(v&0x01) FM_KEYON (&OPL->P_CH[7].SLOT[SLOT1], 2, volume);
1494 else
1495 FM_KEYOFF(&OPL->P_CH[7].SLOT[SLOT1], (UINT32)~2);
1496 /* SD key on/off */
1497 if(v&0x08) FM_KEYON (&OPL->P_CH[7].SLOT[SLOT2], 2, volume);
1498 else
1499 FM_KEYOFF(&OPL->P_CH[7].SLOT[SLOT2], (UINT32)~2);
1500 /* TOM key on/off */
1501 if(v&0x04) FM_KEYON (&OPL->P_CH[8].SLOT[SLOT1], 2, volume);
1502 else
1503 FM_KEYOFF(&OPL->P_CH[8].SLOT[SLOT1], (UINT32)~2);
1504 /* TOP-CY key on/off */
1505 if(v&0x02) FM_KEYON (&OPL->P_CH[8].SLOT[SLOT2], 2, volume);
1506 else
1507 FM_KEYOFF(&OPL->P_CH[8].SLOT[SLOT2], (UINT32)~2);
1508 }
1509 else
1510 {
1511 /* BD key off */
1512 FM_KEYOFF(&OPL->P_CH[6].SLOT[SLOT1], (UINT32)~2);
1513 FM_KEYOFF(&OPL->P_CH[6].SLOT[SLOT2], (UINT32)~2);
1514 /* HH key off */
1515 FM_KEYOFF(&OPL->P_CH[7].SLOT[SLOT1], (UINT32)~2);
1516 /* SD key off */
1517 FM_KEYOFF(&OPL->P_CH[7].SLOT[SLOT2], (UINT32)~2);
1518 /* TOM key off */
1519 FM_KEYOFF(&OPL->P_CH[8].SLOT[SLOT1], (UINT32)~2);
1520 /* TOP-CY off */
1521 FM_KEYOFF(&OPL->P_CH[8].SLOT[SLOT2], (UINT32)~2);
1522 }
1523 return;
1524 }
1525 /* keyon,block,fnum */
1526 if( (r&0x0f) > 8) return;
1527 CH = &OPL->P_CH[r&0x0f];
1528 if(!(r&0x10))
1529 { /* a0-a8 */
1530 block_fnum = (CH->block_fnum&0x1f00) | v;
1531 }
1532 else
1533 { /* b0-b8 */
1534 block_fnum = ((v&0x1f)<<8) | (CH->block_fnum&0xff);
1535
1536 if(v&0x20)
1537 {
1538 FM_KEYON (&CH->SLOT[SLOT1], 1, volume);
1539 FM_KEYON (&CH->SLOT[SLOT2], 1, volume);
1540 }
1541 else
1542 {
1543 FM_KEYOFF(&CH->SLOT[SLOT1], (UINT32)~1);
1544 FM_KEYOFF(&CH->SLOT[SLOT2], (UINT32)~1);
1545 }
1546 }
1547 /* update */
1548 if(CH->block_fnum != (UINT32) block_fnum)
1549 {
1550 UINT8 block = (UINT8)(block_fnum >> 10);
1551
1552 CH->block_fnum = block_fnum;
1553
1554 CH->ksl_base = ksl_tab[block_fnum>>6];
1555 CH->fc = OPL->fn_tab[block_fnum&0x03ff] >> (7-block);
1556
1557 /* BLK 2,1,0 bits -> bits 3,2,1 of kcode */
1558 CH->kcode = (CH->block_fnum&0x1c00)>>9;
1559
1560 /* the info below is actually opposite to what is stated in the Manuals (verifed on real YM3812) */
1561 /* if notesel == 0 -> lsb of kcode is bit 10 (MSB) of fnum */
1562 /* if notesel == 1 -> lsb of kcode is bit 9 (MSB-1) of fnum */
1563 if (OPL->mode&0x40)
1564 CH->kcode |= (CH->block_fnum&0x100)>>8; /* notesel == 1 */
1565 else
1566 CH->kcode |= (CH->block_fnum&0x200)>>9; /* notesel == 0 */
1567
1568 /* refresh Total Level in both SLOTs of this channel */
1569 CH->SLOT[SLOT1].TLL = CH->SLOT[SLOT1].TL + (CH->ksl_base>>CH->SLOT[SLOT1].ksl);
1570 CH->SLOT[SLOT2].TLL = CH->SLOT[SLOT2].TL + (CH->ksl_base>>CH->SLOT[SLOT2].ksl);
1571
1572 /* refresh frequency counter in both SLOTs of this channel */
1573 CALC_FCSLOT(CH,&CH->SLOT[SLOT1]);
1574 CALC_FCSLOT(CH,&CH->SLOT[SLOT2]);
1575 }
1576 break;
1577 case 0xc0:
1578 /* FB,C */
1579 if( (r&0x0f) > 8) return;
1580 CH = &OPL->P_CH[r&0x0f];
1581 CH->SLOT[SLOT1].FB = (v>>1)&7 ? ((v>>1)&7) + 7 : 0;
1582 CH->SLOT[SLOT1].CON = v&1;
1583 CH->SLOT[SLOT1].connect1 = CH->SLOT[SLOT1].CON ? &output[0] : &phase_modulation;
1584 break;
1585 case 0xe0: /* waveform select */
1586 /* simply ignore write to the waveform select register if selecting not enabled in test register */
1587 if(OPL->wavesel)
1588 {
1589 slot = slot_array[r&0x1f];
1590 if(slot < 0) return;
1591 CH = &OPL->P_CH[slot/2];
1592
1593 CH->SLOT[slot&1].wavetable = (v&0x03)*SIN_LEN;
1594 }
1595 break;
1596 }
1597 }
1598
OPLMute(FM_OPL * OPL,int channel,BOOL mute)1599 static void OPLMute(FM_OPL *OPL,int channel,BOOL mute)
1600 {
1601 if(channel<0 || channel>8) return;
1602
1603 OPL_CH *CH = &OPL->P_CH[channel];
1604
1605 CH->muted=mute;
1606
1607 /* if(!mute)
1608 {
1609 if(ChannelMuted[channel]&1)
1610 {
1611 FM_KEYON (&CH->SLOT[SLOT1], 1);
1612 FM_KEYON (&CH->SLOT[SLOT2], 1);
1613 }
1614 ChannelMuted[channel]=0;
1615 }
1616 else
1617 {
1618 if(CH->SLOT[SLOT1].volume<MIN_ATT_INDEX)
1619 {
1620 FM_KEYOFF(&CH->SLOT[SLOT1],~1);
1621 FM_KEYOFF(&CH->SLOT[SLOT2],~1);
1622 CH->SLOT[SLOT1].volume = MAX_ATT_INDEX;
1623 CH->SLOT[SLOT1].state = EG_OFF;
1624 CH->SLOT[SLOT2].volume = MAX_ATT_INDEX;
1625 CH->SLOT[SLOT2].state = EG_OFF;
1626
1627 ChannelMuted[channel]=3; // muted + keyon flag
1628 }
1629 else
1630 {
1631 MessageBox(NULL,"HmMEMmSDUHSoi","arghl",MB_OK);
1632 ChannelMuted[channel]=2; // muted
1633 }
1634 }*/
1635 }
1636
1637 /* lock/unlock for common table */
OPL_LockTable(void)1638 static int OPL_LockTable(void)
1639 {
1640 num_lock++;
1641 if(num_lock>1) return 0;
1642
1643 /* first time */
1644
1645 cur_chip = NULL;
1646 /* allocate total level table (128kb space) */
1647 if( !init_tables() )
1648 {
1649 num_lock--;
1650 return -1;
1651 }
1652
1653 return 0;
1654 }
1655
OPL_UnLockTable(void)1656 static void OPL_UnLockTable(void)
1657 {
1658 if(num_lock) num_lock--;
1659 if(num_lock) return;
1660
1661 /* last time */
1662
1663 cur_chip = NULL;
1664 OPLCloseTable();
1665 }
1666
OPLResetChip(FM_OPL * OPL)1667 static void OPLResetChip(FM_OPL *OPL)
1668 {
1669 int c,s;
1670 int i;
1671
1672 OPL->eg_timer = 0;
1673 OPL->eg_cnt = 0;
1674
1675 OPL->noise_rng = 1; /* noise shift register */
1676 OPL->mode = 0; /* normal mode */
1677 OPL_STATUS_RESET(OPL,0x7f);
1678
1679 /* reset with register write */
1680 int volume = MAX_VOLUME;
1681 OPLWriteReg(OPL, 0x01, 0, &volume); /* wavesel disable */
1682 OPLWriteReg(OPL, 0x02, 0, &volume); /* Timer1 */
1683 OPLWriteReg(OPL, 0x03, 0, &volume); /* Timer2 */
1684 OPLWriteReg(OPL, 0x04, 0, &volume); /* IRQ mask clear */
1685 for (i = 0xff; i >= 0x20; i--)
1686 OPLWriteReg(OPL, i, 0, &volume);
1687
1688 /* reset operator parameters */
1689 for( c = 0 ; c < 9 ; c++ )
1690 {
1691 OPL_CH *CH = &OPL->P_CH[c];
1692 for(s = 0 ; s < 2 ; s++ )
1693 {
1694 /* wave table */
1695 CH->SLOT[s].wavetable = 0;
1696 CH->SLOT[s].state = EG_OFF;
1697 CH->SLOT[s].volume = MAX_ATT_INDEX;
1698 }
1699 }
1700 }
1701
1702 /* Create one of virtual YM3812/YM3526/Y8950 */
1703 /* 'clock' is chip clock in Hz */
1704 /* 'rate' is sampling rate */
OPLCreate(const UINT8 type,int clock,int rate)1705 static FM_OPL *OPLCreate(const UINT8 type, int clock, int rate)
1706 {
1707 char *ptr;
1708 FM_OPL *OPL;
1709 int state_size;
1710
1711 if (OPL_LockTable() ==-1) return NULL;
1712
1713 /* calculate OPL state size */
1714 state_size = sizeof(FM_OPL);
1715
1716 /* allocate memory block */
1717 ptr = (char *) malloc(state_size);
1718
1719 if (ptr==NULL)
1720 return NULL;
1721
1722 /* clear */
1723 memset(ptr,0,state_size);
1724
1725 OPL = (FM_OPL *)(void *)ptr; // ptr comes from malloc, so it is correctly aligned
1726
1727 ptr += sizeof(FM_OPL);
1728
1729 OPL->type = type;
1730 OPL->clock = clock;
1731 OPL->rate = rate;
1732
1733 /* init global tables */
1734 OPL_initalize(OPL);
1735
1736 return OPL;
1737 }
1738
1739 /* Destroy one of virtual YM3812 */
OPLDestroy(FM_OPL * OPL)1740 static void OPLDestroy(FM_OPL *OPL)
1741 {
1742 OPL_UnLockTable();
1743 free(OPL);
1744 }
1745
1746 /* Optional handlers */
1747
OPLSetTimerHandler(FM_OPL * OPL,OPL_TIMERHANDLER TimerHandler,int channelOffset)1748 static void OPLSetTimerHandler(FM_OPL *OPL,OPL_TIMERHANDLER TimerHandler,int channelOffset)
1749 {
1750 OPL->TimerHandler = TimerHandler;
1751 OPL->TimerParam = channelOffset;
1752 }
OPLSetIRQHandler(FM_OPL * OPL,OPL_IRQHANDLER IRQHandler,int param)1753 static void OPLSetIRQHandler(FM_OPL *OPL,OPL_IRQHANDLER IRQHandler,int param)
1754 {
1755 OPL->IRQHandler = IRQHandler;
1756 OPL->IRQParam = param;
1757 }
OPLSetUpdateHandler(FM_OPL * OPL,OPL_UPDATEHANDLER UpdateHandler,int param)1758 static void OPLSetUpdateHandler(FM_OPL *OPL,OPL_UPDATEHANDLER UpdateHandler,int param)
1759 {
1760 OPL->UpdateHandler = UpdateHandler;
1761 OPL->UpdateParam = param;
1762 }
1763
OPLRead(FM_OPL * OPL,int a)1764 static unsigned char OPLRead(FM_OPL *OPL,int a)
1765 {
1766 if( !(a&1) )
1767 {
1768 /* status port */
1769
1770 /* OPL and OPL2 */
1771 return OPL->status & (OPL->statusmask|0x80);
1772 }
1773 return 0xff;
1774 }
1775
1776 /* CSM Key Controll */
CSMKeyControll(OPL_CH * CH)1777 void CSMKeyControll(OPL_CH *CH)
1778 {
1779 int volume = MAX_VOLUME;
1780 FM_KEYON (&CH->SLOT[SLOT1], 4, &volume);
1781 FM_KEYON(&CH->SLOT[SLOT2], 4, &volume);
1782
1783 /* The key off should happen exactly one sample later - not implemented correctly yet */
1784
1785 FM_KEYOFF(&CH->SLOT[SLOT1], (UINT32)~4);
1786 FM_KEYOFF(&CH->SLOT[SLOT2], (UINT32)~4);
1787 }
1788
1789
OPLTimerOver(FM_OPL * OPL,int c)1790 static int OPLTimerOver(FM_OPL *OPL,int c)
1791 {
1792 if( c )
1793 { /* Timer B */
1794 OPL_STATUS_SET(OPL,0x20);
1795 }
1796 else
1797 { /* Timer A */
1798 OPL_STATUS_SET(OPL,0x40);
1799 /* CSM mode key,TL controll */
1800 if( OPL->mode & 0x80 )
1801 { /* CSM mode total level latch and auto key on */
1802 int ch;
1803 if(OPL->UpdateHandler) OPL->UpdateHandler(OPL->UpdateParam,0);
1804 for(ch=0; ch<9; ch++)
1805 CSMKeyControll( &OPL->P_CH[ch] );
1806 }
1807 }
1808 /* reload timer */
1809 if (OPL->TimerHandler) (OPL->TimerHandler)(OPL->TimerParam+c,(double)OPL->T[c]*OPL->TimerBase);
1810 return OPL->status>>7;
1811 }
1812
1813
1814 #define MAX_OPL_CHIPS 2
1815
1816 static FM_OPL *OPL_YM3812[MAX_OPL_CHIPS]; /* array of pointers to the YM3812's */
1817 static int YM3812NumChips = 0; /* number of chips */
1818
YM3812Init(int num,int clock,int rate)1819 int YM3812Init(int num, int clock, int rate)
1820 {
1821 int i;
1822
1823 if (YM3812NumChips)
1824 return -1; /* duplicate init. */
1825
1826 YM3812NumChips = num;
1827
1828 for (i = 0;i < YM3812NumChips; i++)
1829 {
1830 /* emulator create */
1831 OPL_YM3812[i] = OPLCreate(OPL_TYPE_YM3812,clock,rate);
1832 if(OPL_YM3812[i] == NULL)
1833 {
1834 /* it's really bad - we run out of memeory */
1835 YM3812NumChips = 0;
1836 return -1;
1837 }
1838 /* reset */
1839 YM3812ResetChip(i);
1840 }
1841
1842 return 0;
1843 }
1844
YM3812Shutdown(void)1845 void YM3812Shutdown(void)
1846 {
1847 int i;
1848
1849 for (i = 0;i < YM3812NumChips; i++)
1850 {
1851 /* emulator shutdown */
1852 OPLDestroy(OPL_YM3812[i]);
1853 OPL_YM3812[i] = NULL;
1854 }
1855 YM3812NumChips = 0;
1856 }
YM3812ResetChip(int which)1857 void YM3812ResetChip(int which)
1858 {
1859 OPLResetChip(OPL_YM3812[which]);
1860 }
1861
YM3812Write(int which,int a,int v,const int * volume)1862 int YM3812Write(int which, int a, int v, const int *volume)
1863 {
1864 OPLWriteReg(OPL_YM3812[which], a, v, volume);
1865 return (OPL_YM3812[which]->status>>7);
1866 }
1867
YM3812Read(int which,int a)1868 unsigned char YM3812Read(int which, int a)
1869 {
1870 /* YM3812 always returns bit2 and bit1 in HIGH state */
1871 return OPLRead(OPL_YM3812[which], a) | 0x06 ;
1872 }
1873
YM3812Mute(int which,int channel,BOOL mute)1874 void YM3812Mute(int which, int channel, BOOL mute)
1875 {
1876 OPLMute(OPL_YM3812[which], channel, mute);
1877 }
1878
YM3812TimerOver(int which,int c)1879 int YM3812TimerOver(int which, int c)
1880 {
1881 return OPLTimerOver(OPL_YM3812[which], c);
1882 }
1883
YM3812SetTimerHandler(int which,OPL_TIMERHANDLER TimerHandler,int channelOffset)1884 void YM3812SetTimerHandler(int which, OPL_TIMERHANDLER TimerHandler, int channelOffset)
1885 {
1886 OPLSetTimerHandler(OPL_YM3812[which], TimerHandler, channelOffset);
1887 }
YM3812SetIRQHandler(int which,OPL_IRQHANDLER IRQHandler,int param)1888 void YM3812SetIRQHandler(int which,OPL_IRQHANDLER IRQHandler,int param)
1889 {
1890 OPLSetIRQHandler(OPL_YM3812[which], IRQHandler, param);
1891 }
YM3812SetUpdateHandler(int which,OPL_UPDATEHANDLER UpdateHandler,int param)1892 void YM3812SetUpdateHandler(int which,OPL_UPDATEHANDLER UpdateHandler,int param)
1893 {
1894 OPLSetUpdateHandler(OPL_YM3812[which], UpdateHandler, param);
1895 }
1896
1897
1898 /*
1899 ** Generate samples for one of the YM3812's
1900 **
1901 ** 'which' is the virtual YM3812 number
1902 ** '*buffer' is the output buffer pointer
1903 ** 'length' is the number of samples that should be generated
1904 */
1905
YM3812UpdateOne(int which,INT16 * buffer,int length)1906 void YM3812UpdateOne(int which, INT16 *buffer, int length)
1907 {
1908 FM_OPL *OPL = OPL_YM3812[which];
1909 UINT8 rhythm = OPL->rhythm&0x20;
1910 OPLSAMPLE *buf = buffer;
1911 int i;
1912
1913 if( (void *)OPL != cur_chip ){
1914 cur_chip = (void *)OPL;
1915 /* rhythm slots */
1916 SLOT7_1 = &OPL->P_CH[7].SLOT[SLOT1];
1917 SLOT7_2 = &OPL->P_CH[7].SLOT[SLOT2];
1918 SLOT8_1 = &OPL->P_CH[8].SLOT[SLOT1];
1919 SLOT8_2 = &OPL->P_CH[8].SLOT[SLOT2];
1920 }
1921 for( i=0; i < length ; i++ )
1922 {
1923 int lt;
1924
1925 output[0] = 0;
1926
1927 advance_lfo(OPL);
1928
1929 /* FM part */
1930 OPL_CALC_CH(&OPL->P_CH[0]);
1931 OPL_CALC_CH(&OPL->P_CH[1]);
1932 OPL_CALC_CH(&OPL->P_CH[2]);
1933 OPL_CALC_CH(&OPL->P_CH[3]);
1934 OPL_CALC_CH(&OPL->P_CH[4]);
1935 OPL_CALC_CH(&OPL->P_CH[5]);
1936
1937 if(!rhythm)
1938 {
1939 OPL_CALC_CH(&OPL->P_CH[6]);
1940 OPL_CALC_CH(&OPL->P_CH[7]);
1941 OPL_CALC_CH(&OPL->P_CH[8]);
1942 }
1943 else /* Rhythm part */
1944 {
1945 OPL_CALC_RH(&OPL->P_CH[0], (OPL->noise_rng>>0)&1 );
1946 }
1947
1948 lt = output[0];
1949 lt<<=2;
1950
1951 /* limit check */
1952 lt = limit( lt , MAXOUT, MINOUT );
1953
1954 /* store to sound buffer */
1955 buf[i*2] = buf[i*2+1] = (OPLSAMPLE)lt;
1956
1957 advance(OPL);
1958 }
1959
1960 }
1961