1 /* Mednafen - Multi-system Emulator 2 * 3 * This program is free software; you can redistribute it and/or modify 4 * it under the terms of the GNU General Public License as published by 5 * the Free Software Foundation; either version 2 of the License, or 6 * (at your option) any later version. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 * 13 * You should have received a copy of the GNU General Public License 14 * along with this program; if not, write to the Free Software 15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 16 */ 17 18 #ifndef __MDFN_PCE_MCGENJIN_H 19 #define __MDFN_PCE_MCGENJIN_H 20 21 class MCGenjin_CS_Device 22 { 23 public: 24 25 MCGenjin_CS_Device(); 26 virtual ~MCGenjin_CS_Device(); 27 28 virtual void Power(void); 29 virtual void Update(int32 timestamp); 30 virtual void ResetTS(int32 ts_base); 31 32 virtual int StateAction(StateMem *sm, int load, int data_only, const char *sname); 33 34 virtual uint8 Read(int32 timestamp, uint32 A); 35 virtual void Write(int32 timestamp, uint32 A, uint8 V) ; 36 37 virtual uint32 GetNVSize(void) const; 38 virtual const uint8* ReadNV(void) const; 39 virtual void WriteNV(const uint8 *buffer, uint32 offset, uint32 count); 40 }; 41 42 class MCGenjin 43 { 44 public: 45 46 MCGenjin(MDFNFILE* fp); 47 ~MCGenjin(); 48 49 void Power(void); 50 void Update(int32 timestamp); 51 void ResetTS(int32 ts_base); 52 int StateAction(StateMem *sm, int load, int data_only); 53 GetNVPDC(void)54 unsigned INLINE GetNVPDC(void) { return 2; } 55 uint32 GetNVSize(const unsigned di) const; 56 const uint8* ReadNV(const unsigned di) const; 57 void WriteNV(const unsigned di, const uint8 *buffer, uint32 offset, uint32 count); 58 combobble(uint8 v)59 uint8 INLINE combobble(uint8 v) 60 { 61 if(dlr) 62 return ((((v * 0x80200802ULL) & 0x0884422110ULL) * 0x0101010101ULL) >> 32); 63 else 64 return v; 65 } 66 67 template<unsigned ar> ReadTP(int32 timestamp,uint32 A)68 uint8 INLINE ReadTP(int32 timestamp, uint32 A) 69 { 70 uint8 ret = 0xFF; 71 72 switch(ar) 73 { 74 case 0: ret = combobble(rom[A & 0x3FFFF & (rom.size() - 1)]); break; 75 76 case 1: 77 { 78 const uint32 rom_addr_or = bank_select << 18; 79 const uint32 rom_addr_xor = ((stmode_control & 0x7E) << 6) | (stmode_control & STMODEC_MASK_ENABLE); 80 uint32 rom_addr_and = (rom.size() - 1); 81 82 if((stmode_control & 0x80) && !(A & 0x1)) 83 rom_addr_and &= ~0x1FFC; 84 85 ret = combobble(rom[(((A & 0x3FFFF) | rom_addr_or) ^ rom_addr_xor) & rom_addr_and]); 86 } 87 break; 88 89 case 2: ret = cs[0]->Read(timestamp, A & 0x3FFFF); break; 90 case 3: ret = cs[1]->Read(timestamp, A & 0x3FFFF); break; 91 } 92 93 return ret; 94 } 95 96 template<unsigned ar> WriteTP(int32 timestamp,uint32 A,uint8 V)97 void INLINE WriteTP(int32 timestamp, uint32 A, uint8 V) 98 { 99 switch(ar) 100 { 101 case 0: 102 case 1: 103 switch((A & addr_write_mask) | (~addr_write_mask & 0xF)) 104 { 105 case 0x0: avl_mask[0] = V; break; 106 case 0x1: avl_mask[1] = V; break; 107 case 0x2: avl_mask[2] = V; break; 108 case 0x3: avl_mask[3] = V; break; 109 110 case 0x4: avl[0] &= 0xFF00; avl[0] |= V; break; 111 case 0x5: avl[1] &= 0xFF00; avl[1] |= V; break; 112 case 0x6: avl[2] &= 0xFF00; avl[2] |= V; break; 113 case 0x7: avl[3] &= 0xFF00; avl[3] |= V; break; 114 115 case 0x8: avl[0] &= 0x00FF; avl[0] |= V << 8; break; 116 case 0x9: avl[1] &= 0x00FF; avl[1] |= V << 8; break; 117 case 0xA: avl[2] &= 0x00FF; avl[2] |= V << 8; break; 118 case 0xB: avl[3] &= 0x00FF; avl[3] |= V << 8; break; 119 120 case 0xC: 121 for(unsigned i = 0; i < 4; i++) 122 { 123 if(V & (1U << i)) 124 shadow_avl[i] += avl[i]; 125 else 126 shadow_avl[i] = avl[i]; 127 } 128 break; 129 130 case 0xD: stmode_control = V; break; 131 case 0xE: dlr = V & 0x1; break; 132 case 0xF: bank_select = V; break; 133 } 134 break; 135 136 case 2: return cs[0]->Write(timestamp, A & 0x3FFFF, V); 137 case 3: return cs[1]->Write(timestamp, A & 0x3FFFF, V); 138 } 139 } 140 141 Read(int32 timestamp,uint32 A)142 uint8 INLINE Read(int32 timestamp, uint32 A) 143 { 144 switch((A >> 18) & 0x3) 145 { 146 default: return 0xFF; 147 case 0: return ReadTP<0>(timestamp, A); 148 case 1: return ReadTP<1>(timestamp, A); 149 case 2: return ReadTP<2>(timestamp, A); 150 case 3: return ReadTP<3>(timestamp, A); 151 } 152 } 153 Write(int32 timestamp,uint32 A,uint8 V)154 void INLINE Write(int32 timestamp, uint32 A, uint8 V) 155 { 156 switch((A >> 18) & 0x3) 157 { 158 case 0: WriteTP<0>(timestamp, A, V); 159 case 1: WriteTP<1>(timestamp, A, V); 160 case 2: WriteTP<2>(timestamp, A, V); 161 case 3: WriteTP<3>(timestamp, A, V); 162 } 163 } 164 165 private: 166 167 std::vector<uint8> rom; 168 169 MCGenjin_CS_Device* cs[2]; 170 171 uint8 bank_select; 172 uint8 dlr; 173 174 enum { STMODEC_MASK_ENABLE = 0x80 }; 175 176 // 177 // 178 // 179 uint8 addr_write_mask; 180 181 uint8 stmode_control; 182 183 uint16 avl[4]; 184 uint8 avl_mask[4]; 185 uint16 shadow_avl[4]; 186 }; 187 188 #endif 189