1 // FB Alpha Fast Lane driver module
2 // Based on MAME driver by Manuel Abadia
3
4 #include "tiles_generic.h"
5 #include "hd6309_intf.h"
6 #include "konamiic.h" // K051733
7 #include "k007232.h"
8 #include "k007121.h"
9 #include "watchdog.h"
10
11 static UINT8 *AllMem;
12 static UINT8 *AllRam;
13 static UINT8 *RamEnd;
14 static UINT8 *MemEnd;
15 static UINT8 *DrvHD6309ROM;
16 static UINT8 *DrvGfxROM;
17 static UINT8 *DrvColPROM;
18 static UINT8 *DrvSndROM0;
19 static UINT8 *DrvSndROM1;
20 static UINT8 *DrvK007121RAM;
21 static UINT8 *DrvPalRAM;
22 static UINT8 *DrvVidRAM0;
23 static UINT8 *DrvVidRAM1;
24 static UINT8 *DrvSprRAM;
25
26 static UINT32 *DrvPalette;
27 static UINT8 DrvRecalc;
28
29 static UINT8 *color_table;
30
31 static UINT8 main_bank;
32
33 static UINT8 DrvJoy1[8];
34 static UINT8 DrvJoy2[8];
35 static UINT8 DrvJoy3[8];
36 static UINT8 DrvDips[3];
37 static UINT8 DrvInputs[3];
38 static UINT8 DrvReset;
39
40 static struct BurnInputInfo FastlaneInputList[] = {
41 {"P1 Coin", BIT_DIGITAL, DrvJoy1 + 0, "p1 coin" },
42 {"P1 Start", BIT_DIGITAL, DrvJoy1 + 3, "p1 start" },
43 {"P1 Up", BIT_DIGITAL, DrvJoy2 + 2, "p1 up" },
44 {"P1 Down", BIT_DIGITAL, DrvJoy2 + 3, "p1 down" },
45 {"P1 Left", BIT_DIGITAL, DrvJoy2 + 0, "p1 left" },
46 {"P1 Right", BIT_DIGITAL, DrvJoy2 + 1, "p1 right" },
47 {"P1 Button 1", BIT_DIGITAL, DrvJoy2 + 4, "p1 fire 1" },
48 {"P1 Button 2", BIT_DIGITAL, DrvJoy2 + 5, "p1 fire 2" },
49
50 {"P2 Coin", BIT_DIGITAL, DrvJoy1 + 1, "p2 coin" },
51 {"P2 Start", BIT_DIGITAL, DrvJoy1 + 4, "p2 start" },
52 {"P2 Up", BIT_DIGITAL, DrvJoy3 + 2, "p2 up" },
53 {"P2 Down", BIT_DIGITAL, DrvJoy3 + 3, "p2 down" },
54 {"P2 Left", BIT_DIGITAL, DrvJoy3 + 0, "p2 left" },
55 {"P2 Right", BIT_DIGITAL, DrvJoy3 + 1, "p2 right" },
56 {"P2 Button 1", BIT_DIGITAL, DrvJoy3 + 4, "p2 fire 1" },
57 {"P2 Button 2", BIT_DIGITAL, DrvJoy3 + 5, "p2 fire 2" },
58
59 {"Reset", BIT_DIGITAL, &DrvReset, "reset" },
60 {"Service", BIT_DIGITAL, DrvJoy1 + 2, "service" },
61 {"Dip A", BIT_DIPSWITCH, DrvDips + 0, "dip" },
62 {"Dip B", BIT_DIPSWITCH, DrvDips + 1, "dip" },
63 {"Dip C", BIT_DIPSWITCH, DrvDips + 2, "dip" },
64 };
65
66 STDINPUTINFO(Fastlane)
67
68 static struct BurnDIPInfo FastlaneDIPList[]=
69 {
70 {0x12, 0xff, 0xff, 0xff, NULL },
71 {0x13, 0xff, 0xff, 0x5a, NULL },
72 {0x14, 0xff, 0xff, 0xff, NULL },
73
74 {0 , 0xfe, 0 , 16, "Coin A" },
75 {0x12, 0x01, 0x0f, 0x02, "4 Coins 1 Credits" },
76 {0x12, 0x01, 0x0f, 0x05, "3 Coins 1 Credits" },
77 {0x12, 0x01, 0x0f, 0x08, "2 Coins 1 Credits" },
78 {0x12, 0x01, 0x0f, 0x04, "3 Coins 2 Credits" },
79 {0x12, 0x01, 0x0f, 0x01, "4 Coins 3 Credits" },
80 {0x12, 0x01, 0x0f, 0x0f, "1 Coin 1 Credits" },
81 {0x12, 0x01, 0x0f, 0x03, "3 Coins 4 Credits" },
82 {0x12, 0x01, 0x0f, 0x07, "2 Coins 3 Credits" },
83 {0x12, 0x01, 0x0f, 0x0e, "1 Coin 2 Credits" },
84 {0x12, 0x01, 0x0f, 0x06, "2 Coins 5 Credits" },
85 {0x12, 0x01, 0x0f, 0x0d, "1 Coin 3 Credits" },
86 {0x12, 0x01, 0x0f, 0x0c, "1 Coin 4 Credits" },
87 {0x12, 0x01, 0x0f, 0x0b, "1 Coin 5 Credits" },
88 {0x12, 0x01, 0x0f, 0x0a, "1 Coin 6 Credits" },
89 {0x12, 0x01, 0x0f, 0x09, "1 Coin 7 Credits" },
90 {0x12, 0x01, 0x0f, 0x00, "Free Play" },
91
92 {0 , 0xfe, 0 , 16, "Coin B" },
93 {0x12, 0x01, 0xf0, 0x20, "4 Coins 1 Credits" },
94 {0x12, 0x01, 0xf0, 0x50, "3 Coins 1 Credits" },
95 {0x12, 0x01, 0xf0, 0x80, "2 Coins 1 Credits" },
96 {0x12, 0x01, 0xf0, 0x40, "3 Coins 2 Credits" },
97 {0x12, 0x01, 0xf0, 0x10, "4 Coins 3 Credits" },
98 {0x12, 0x01, 0xf0, 0xf0, "1 Coin 1 Credits" },
99 {0x12, 0x01, 0xf0, 0x30, "3 Coins 4 Credits" },
100 {0x12, 0x01, 0xf0, 0x70, "2 Coins 3 Credits" },
101 {0x12, 0x01, 0xf0, 0xe0, "1 Coin 2 Credits" },
102 {0x12, 0x01, 0xf0, 0x60, "2 Coins 5 Credits" },
103 {0x12, 0x01, 0xf0, 0xd0, "1 Coin 3 Credits" },
104 {0x12, 0x01, 0xf0, 0xc0, "1 Coin 4 Credits" },
105 {0x12, 0x01, 0xf0, 0xb0, "1 Coin 5 Credits" },
106 {0x12, 0x01, 0xf0, 0xa0, "1 Coin 6 Credits" },
107 {0x12, 0x01, 0xf0, 0x90, "1 Coin 7 Credits" },
108 {0x12, 0x01, 0xf0, 0x00, "No Coin B" },
109
110 {0 , 0xfe, 0 , 4, "Lives" },
111 {0x13, 0x01, 0x03, 0x03, "2" },
112 {0x13, 0x01, 0x03, 0x02, "3" },
113 {0x13, 0x01, 0x03, 0x01, "4" },
114 {0x13, 0x01, 0x03, 0x00, "7" },
115
116 {0 , 0xfe, 0 , 2, "Cabinet" },
117 {0x13, 0x01, 0x04, 0x00, "Upright" },
118 {0x13, 0x01, 0x04, 0x04, "Cocktail" },
119
120 {0 , 0xfe, 0 , 4, "Bonus Life" },
121 {0x13, 0x01, 0x18, 0x18, "20k 100k 200k 400k 800k" },
122 {0x13, 0x01, 0x18, 0x10, "30k 150k 300k 600k" },
123 {0x13, 0x01, 0x18, 0x08, "20k only" },
124 {0x13, 0x01, 0x18, 0x00, "30k only" },
125
126 {0 , 0xfe, 0 , 4, "Difficulty" },
127 {0x13, 0x01, 0x60, 0x60, "Easy" },
128 {0x13, 0x01, 0x60, 0x40, "Medium" },
129 {0x13, 0x01, 0x60, 0x20, "Hard" },
130 {0x13, 0x01, 0x60, 0x00, "Hardest" },
131
132 {0 , 0xfe, 0 , 2, "Demo Sounds" },
133 {0x13, 0x01, 0x80, 0x80, "Off" },
134 {0x13, 0x01, 0x80, 0x00, "On" },
135
136 {0 , 0xfe, 0 , 2, "Flip Screen" },
137 {0x14, 0x01, 0x01, 0x01, "Off" },
138 {0x14, 0x01, 0x01, 0x00, "On" },
139
140 {0 , 0xfe, 0 , 2, "Upright Controls" },
141 {0x14, 0x01, 0x02, 0x02, "Single" },
142 {0x14, 0x01, 0x02, 0x00, "Dual" },
143
144 {0 , 0xfe, 0 , 2, "Service Mode" },
145 {0x14, 0x01, 0x04, 0x04, "Off" },
146 {0x14, 0x01, 0x04, 0x00, "On" },
147
148 {0 , 0xfe, 0 , 2, "Allow Continue" },
149 {0x14, 0x01, 0x08, 0x08, "3 Times" },
150 {0x14, 0x01, 0x08, 0x00, "Infinite" },
151 };
152
STDDIPINFO(Fastlane)153 STDDIPINFO(Fastlane)
154
155 static void bankswitch(INT32 data)
156 {
157 // coin counters = data & 3
158
159 main_bank = data;
160
161 HD6309MapMemory(DrvHD6309ROM + 0x10000 + (((data >> 2) & 3) * 0x4000), 0x4000, 0x7fff, MAP_ROM);
162
163 k007232_set_bank(1, (data >> 4) & 1, 2 + ((data >> 4) & 1));
164 }
165
fastlane_write(UINT16 address,UINT8 data)166 static void fastlane_write(UINT16 address, UINT8 data)
167 {
168 if ((address & 0xfff8) == 0x0000) {
169 k007121_ctrl_write(0, address & 7, data);
170 }
171
172 if (address < 0x60) {
173 DrvK007121RAM[address & 0x7f] = data;
174 return;
175 }
176
177 if ((address & 0xfff0) == 0x0d00) {
178 K007232WriteReg(0, (address & 0xf) ^ 1, data);
179 return;
180 }
181
182 if ((address & 0xfff0) == 0x0e00) {
183 K007232WriteReg(1, (address & 0xf) ^ 1, data);
184 return;
185 }
186
187 if ((address & 0xffe0) == 0x0f00) {
188 K051733Write(address, data);
189 return;
190 }
191
192 switch (address)
193 {
194 case 0x0b00:
195 BurnWatchdogWrite();
196 return;
197
198 case 0x0c00:
199 bankswitch(data);
200 return;
201 }
202 }
203
fastlane_read(UINT16 address)204 static UINT8 fastlane_read(UINT16 address)
205 {
206 if ((address & 0xfff0) == 0x0d00) {
207 return K007232ReadReg(0, (address & 0xf) ^ 1);
208 }
209
210 if ((address & 0xfff0) == 0x0e00) {
211 return K007232ReadReg(1, (address & 0xf) ^ 1);
212 }
213
214 if ((address & 0xffe0) == 0x0f00) {
215 return K051733Read(address);
216 }
217
218 switch (address)
219 {
220 case 0x0800:
221 return DrvDips[2];
222
223 case 0x0801:
224 return DrvInputs[2];
225
226 case 0x0802:
227 return DrvInputs[1];
228
229 case 0x0803:
230 return DrvInputs[0];
231
232 case 0x0900:
233 return DrvDips[0];
234
235 case 0x0901:
236 return DrvDips[1];
237 }
238
239 return 0;
240 }
241
tilemap_callback(bg)242 static tilemap_callback( bg )
243 {
244 offs &= 0x7ff;
245 INT32 attr = DrvVidRAM0[offs];
246 UINT8 ctrl_3 = k007121_ctrl_read(0, 3);
247 UINT8 ctrl_4 = k007121_ctrl_read(0, 4);
248 UINT8 ctrl_5 = k007121_ctrl_read(0, 5);
249 INT32 bit0 = (ctrl_5 >> 0) & 0x03;
250 INT32 bit1 = (ctrl_5 >> 2) & 0x03;
251 INT32 bit2 = (ctrl_5 >> 4) & 0x03;
252 INT32 bit3 = (ctrl_5 >> 6) & 0x03;
253 INT32 bank = ((attr & 0x80) >> 7) |
254 ((attr >> (bit0+2)) & 0x02) |
255 ((attr >> (bit1+1)) & 0x04) |
256 ((attr >> (bit2 )) & 0x08) |
257 ((attr >> (bit3-1)) & 0x10) |
258 ((ctrl_3 & 0x01) << 5);
259
260 INT32 mask = (ctrl_4 & 0xf0) >> 4;
261
262 bank = (bank & ~(mask << 1)) | ((ctrl_4 & mask) << 1);
263
264 TILE_SET_INFO(0, DrvVidRAM0[offs + 0x400] + (bank * 256), 0x40 * (attr & 0xf) + 1, 0);
265 }
266
tilemap_callback(fg)267 static tilemap_callback( fg )
268 {
269 offs &= 0x7ff;
270 INT32 attr = DrvVidRAM1[offs];
271 UINT8 ctrl_3 = k007121_ctrl_read(0, 3);
272 UINT8 ctrl_4 = k007121_ctrl_read(0, 4);
273 UINT8 ctrl_5 = k007121_ctrl_read(0, 5);
274 INT32 bit0 = (ctrl_5 >> 0) & 0x03;
275 INT32 bit1 = (ctrl_5 >> 2) & 0x03;
276 INT32 bit2 = (ctrl_5 >> 4) & 0x03;
277 INT32 bit3 = (ctrl_5 >> 6) & 0x03;
278 INT32 bank = ((attr & 0x80) >> 7) |
279 ((attr >> (bit0+2)) & 0x02) |
280 ((attr >> (bit1+1)) & 0x04) |
281 ((attr >> (bit2 )) & 0x08) |
282 ((attr >> (bit3-1)) & 0x10) |
283 ((ctrl_3 & 0x01) << 5);
284 INT32 mask = (ctrl_4 & 0xf0) >> 4;
285
286 bank = (bank & ~(mask << 1)) | ((ctrl_4 & mask) << 1);
287
288 TILE_SET_INFO(0, DrvVidRAM1[offs + 0x400] + (bank * 256), 0x40 * (attr & 0xf) + 0, 0);
289 }
290
DrvK007232VolCallback0(INT32 v)291 static void DrvK007232VolCallback0(INT32 v)
292 {
293 K007232SetVolume(0, 0, (v >> 0x4) * 0x11, 0);
294 K007232SetVolume(0, 1, 0, (v & 0x0f) * 0x11);
295 }
296
DrvK007232VolCallback1(INT32 v)297 static void DrvK007232VolCallback1(INT32 v)
298 {
299 K007232SetVolume(1, 0, (v >> 0x4) * 0x11, 0);
300 K007232SetVolume(1, 1, 0, (v & 0x0f) * 0x11);
301 }
302
DrvDoReset(INT32 clear_mem)303 static INT32 DrvDoReset(INT32 clear_mem)
304 {
305 if (clear_mem) {
306 memset (AllRam, 0, RamEnd - AllRam);
307 }
308
309 HD6309Open(0);
310 bankswitch(0);
311 HD6309Reset();
312 HD6309Close();
313
314 K007232Reset(0);
315 K007232Reset(1);
316
317 KonamiICReset();
318
319 BurnWatchdogReset();
320
321 return 0;
322 }
323
MemIndex()324 static INT32 MemIndex()
325 {
326 UINT8 *Next; Next = AllMem;
327
328 DrvHD6309ROM = Next; Next += 0x0200000;
329
330 DrvGfxROM = Next; Next += 0x1000000;
331
332 DrvColPROM = Next; Next += 0x0004000;
333
334 DrvSndROM0 = Next; Next += 0x0200000;
335 DrvSndROM1 = Next; Next += 0x0800000;
336
337 color_table = Next; Next += 0x0040000;
338
339 DrvPalette = (UINT32*)Next; Next += 0x40000 * sizeof(UINT32);
340
341 AllRam = Next;
342
343 DrvK007121RAM = Next; Next += 0x0001000;
344 DrvPalRAM = Next; Next += 0x0010000;
345 DrvVidRAM0 = Next; Next += 0x0008000;
346 DrvVidRAM1 = Next; Next += 0x0008000;
347 DrvSprRAM = Next; Next += 0x0010000;
348
349 RamEnd = Next;
350
351 MemEnd = Next;
352
353 return 0;
354 }
355
DrvColorTableInit()356 static void DrvColorTableInit()
357 {
358 for (INT32 i = 0; i < 0x4000; i++)
359 {
360 color_table[i] = (i & 0x3f0) | DrvColPROM[((i >> 10) << 4) | (i & 0x0f)];
361 }
362 }
363
DrvGfxExpand(UINT8 * src,INT32 len)364 static void DrvGfxExpand(UINT8 *src, INT32 len)
365 {
366 for (INT32 i = (len - 1) * 2; i >= 0; i-=2) {
367 src[i+0] = src[(i/2)^1] >> 4;
368 src[i+1] = src[(i/2)^1] & 0xf;
369 }
370 }
371
DrvInit()372 static INT32 DrvInit()
373 {
374 AllMem = NULL;
375 MemIndex();
376 INT32 nLen = MemEnd - (UINT8 *)0;
377 if ((AllMem = (UINT8 *)BurnMalloc(nLen)) == NULL) return 1;
378 memset(AllMem, 0, nLen);
379 MemIndex();
380
381 {
382 if (BurnLoadRom(DrvHD6309ROM + 0x08000, 0, 1)) return 1;
383 if (BurnLoadRom(DrvHD6309ROM + 0x10000, 1, 1)) return 1;
384
385 if (BurnLoadRom(DrvGfxROM + 0x00000, 2, 1)) return 1;
386
387 if (BurnLoadRom(DrvColPROM + 0x00000, 3, 1)) return 1;
388
389 if (BurnLoadRom(DrvSndROM0 + 0x00000, 4, 1)) return 1;
390
391 if (BurnLoadRom(DrvSndROM1 + 0x00000, 5, 1)) return 1;
392
393 DrvGfxExpand(DrvGfxROM, 0x80000);
394 DrvColorTableInit();
395 }
396
397 HD6309Init(1);
398 HD6309Open(0);
399 HD6309MapMemory(DrvK007121RAM, 0x0000, 0x00ff, MAP_ROM);
400 HD6309MapMemory(DrvPalRAM, 0x1000, 0x1fff, MAP_RAM);
401 HD6309MapMemory(DrvVidRAM0, 0x2000, 0x27ff, MAP_RAM);
402 HD6309MapMemory(DrvVidRAM1, 0x2800, 0x2fff, MAP_RAM);
403 HD6309MapMemory(DrvSprRAM, 0x3000, 0x3fff, MAP_RAM);
404 HD6309MapMemory(DrvHD6309ROM + 0x8000, 0x8000, 0xffff, MAP_ROM);
405 HD6309SetWriteHandler(fastlane_write);
406 HD6309SetReadHandler(fastlane_read);
407 HD6309Close();
408
409 BurnWatchdogInit(DrvDoReset, 180);
410
411 k007121_init(0, (0x100000 / (8 * 8)) - 1);
412
413 K007232Init(0, 3579545, DrvSndROM0, 0x20000);
414 K007232SetPortWriteHandler(0, DrvK007232VolCallback0);
415 K007232SetRoute(0, BURN_SND_K007232_ROUTE_1, 0.50, BURN_SND_ROUTE_BOTH);
416 K007232SetRoute(0, BURN_SND_K007232_ROUTE_2, 0.50, BURN_SND_ROUTE_BOTH);
417
418 K007232Init(1, 3579545, DrvSndROM1, 0x80000);
419 K007232SetPortWriteHandler(1, DrvK007232VolCallback1);
420 K007232SetRoute(1, BURN_SND_K007232_ROUTE_1, 0.50, BURN_SND_ROUTE_BOTH);
421 K007232SetRoute(1, BURN_SND_K007232_ROUTE_2, 0.50, BURN_SND_ROUTE_BOTH);
422
423 GenericTilesInit();
424 GenericTilemapInit(0, TILEMAP_SCAN_ROWS, bg_map_callback, 8, 8, 32, 32);
425 GenericTilemapInit(1, TILEMAP_SCAN_ROWS, fg_map_callback, 8, 8, 32, 32);
426 GenericTilemapSetGfx(0, DrvGfxROM, 4, 8, 8, 0x100000, 0, 0x3ff);
427 GenericTilemapSetOffsets(0, 40, -16);
428 GenericTilemapSetOffsets(1, 0, -16);
429 GenericTilemapSetScrollRows(0, 32);
430
431 DrvDoReset(1);
432
433 return 0;
434 }
435
DrvExit()436 static INT32 DrvExit()
437 {
438 GenericTilesExit();
439
440 HD6309Exit();
441
442 KonamiICExit();
443
444 K007232Exit();
445
446 BurnFree (AllMem);
447
448 return 0;
449 }
450
DrvPaletteUpdate()451 static void DrvPaletteUpdate()
452 {
453 UINT32 tmp[0x400];
454
455 for (INT32 i = 0; i < 0x800; i+=2) {
456 UINT16 d = DrvPalRAM[i + 1] | (DrvPalRAM[i] << 8);
457 UINT8 r = (d >> 0) & 0x1f;
458 UINT8 g = (d >> 5) & 0x1f;
459 UINT8 b = (d >> 10) & 0x1f;
460
461 r = (r << 3) | (r >> 2);
462 g = (g << 3) | (g >> 2);
463 b = (b << 3) | (b >> 2);
464
465 tmp[i/2] = BurnHighCol(r, g, b, 0);
466 }
467
468 for (INT32 i = 0; i < 0x4000; i++) {
469 DrvPalette[i] = tmp[color_table[i]];
470 }
471 }
472
DrvDraw()473 static INT32 DrvDraw()
474 {
475 if (DrvRecalc) {
476 DrvPaletteUpdate();
477 DrvRecalc = 1;
478 }
479
480 if ((nBurnLayer & 1) == 0) BurnTransferClear();
481
482 INT32 xoffs = k007121_ctrl_read(0, 0);
483
484 for (INT32 i = 0; i < 32; i++) {
485 GenericTilemapSetScrollRow(0, i, DrvK007121RAM[0x20 + i] + xoffs);
486 }
487
488 GenericTilemapSetScrollY(0, k007121_ctrl_read(0, 2));
489
490 if (nBurnLayer & 1) GenericTilemapDraw(0, pTransDraw, 0);
491
492 if (nSpriteEnable & 1) k007121_draw(0, pTransDraw, DrvGfxROM, color_table, DrvSprRAM, 0, 40, 16, 0, -1, 0x0000);
493
494 GenericTilesSetClip(-1, 40, -1, -1);
495 if (nBurnLayer & 2) GenericTilemapDraw(1, pTransDraw, 0);
496 GenericTilesClearClip();
497
498 BurnTransferCopy(DrvPalette);
499
500 return 0;
501 }
502
DrvFrame()503 static INT32 DrvFrame()
504 {
505 BurnWatchdogUpdate();
506
507 if (DrvReset) {
508 DrvDoReset(1);
509 }
510
511 {
512 memset (DrvInputs, 0xff, 3);
513
514 for (INT32 i = 0; i < 8; i++) {
515 DrvInputs[0] ^= (DrvJoy1[i] & 1) << i;
516 DrvInputs[1] ^= (DrvJoy2[i] & 1) << i;
517 DrvInputs[2] ^= (DrvJoy3[i] & 1) << i;
518 }
519 }
520
521 HD6309NewFrame();
522
523 INT32 nInterleave = 256;
524 INT32 nCyclesTotal = 12000000 / 60;
525
526 HD6309Open(0);
527
528 for (INT32 i = 0; i < nInterleave; i++)
529 {
530 HD6309Run(nCyclesTotal / nInterleave);
531
532 if (i == 240 && (k007121_ctrl_read(0, 7) & 0x02))
533 HD6309SetIRQLine(0, CPU_IRQSTATUS_AUTO);
534
535 if ((i & 0x1f) == 0 && (k007121_ctrl_read(0, 7) & 0x01))
536 HD6309SetIRQLine(0x20, CPU_IRQSTATUS_AUTO);
537 }
538
539 if (pBurnSoundOut) {
540 BurnSoundClear();
541 K007232Update(0, pBurnSoundOut, nBurnSoundLen);
542 K007232Update(1, pBurnSoundOut, nBurnSoundLen);
543 }
544
545 HD6309Close();
546
547 if (pBurnDraw) {
548 DrvDraw();
549 }
550
551 return 0;
552 }
553
DrvScan(INT32 nAction,INT32 * pnMin)554 static INT32 DrvScan(INT32 nAction, INT32 *pnMin)
555 {
556 struct BurnArea ba;
557
558 if (pnMin) {
559 *pnMin = 0x029702;
560 }
561
562 if (nAction & ACB_VOLATILE) {
563 memset(&ba, 0, sizeof(ba));
564
565 ba.Data = AllRam;
566 ba.nLen = RamEnd - AllRam;
567 ba.szName = "All Ram";
568 BurnAcb(&ba);
569
570 HD6309Scan(nAction);
571
572 BurnWatchdogScan(nAction);
573 k007121_scan(nAction);
574 KonamiICScan(nAction);
575
576 K007232Scan(nAction, pnMin);
577
578 SCAN_VAR(main_bank);
579 }
580
581 if (nAction & ACB_WRITE) {
582 HD6309Open(0);
583 bankswitch(main_bank);
584 HD6309Close();
585 }
586
587 return 0;
588 }
589
590
591 // Fast Lane
592
593 static struct BurnRomInfo fastlaneRomDesc[] = {
594 { "752_m02.9h", 0x08000, 0xe1004489, 1 | BRF_PRG | BRF_ESS }, // 0 HD6309 Code
595 { "752_e01.10h", 0x10000, 0xff4d6029, 1 | BRF_PRG | BRF_ESS }, // 1
596
597 { "752e04.2i", 0x80000, 0xa126e82d, 2 | BRF_GRA }, // 2 Graphics
598
599 { "752e03.6h", 0x00100, 0x44300aeb, 3 | BRF_GRA }, // 3 Color LUT
600
601 { "752e06.4c", 0x20000, 0x85d691ed, 4 | BRF_GRA }, // 4 K007232 #0 Samples
602
603 { "752e05.12b", 0x80000, 0x119e9cbf, 5 | BRF_GRA }, // 5 K007232 #1 Samples (banked)
604 };
605
606 STD_ROM_PICK(fastlane)
607 STD_ROM_FN(fastlane)
608
609 struct BurnDriver BurnDrvFastlane = {
610 "fastlane", NULL, NULL, NULL, "1987",
611 "Fast Lane\0", NULL, "Konami", "GX752",
612 NULL, NULL, NULL, NULL,
613 BDF_GAME_WORKING | BDF_ORIENTATION_VERTICAL | BDF_ORIENTATION_FLIPPED, 2, HARDWARE_PREFIX_KONAMI, GBF_RACING, 0,
614 NULL, fastlaneRomInfo, fastlaneRomName, NULL, NULL, NULL, NULL, FastlaneInputInfo, FastlaneDIPInfo,
615 DrvInit, DrvExit, DrvFrame, DrvDraw, DrvScan, &DrvRecalc, 0x4000,
616 224, 280, 3, 4
617 };
618