1 #include "../vidhrdw/shangha3.c"
2
3 /***************************************************************************
4
5 Shanghai 3 (c)1993 Sunsoft (68000 AY8910 OKI6295)
6 Hebereke no Popoon (c)1994 Sunsoft (68000 Z80 YM3438 OKI6295)
7 Blocken (c)1994 KID / Visco (68000 Z80 YM3438 OKI6295)
8
9 These games use the custom blitter GA9201 KA01-0249 (120pin IC)
10
11 driver by Nicola Salmoria
12
13 TODO:
14 shangha3:
15 - The zoom used for the "100" floating score when you remove tiles is very
16 rough.
17 heberpop:
18 - Unknown writes to sound ports 40/41
19 blocken:
20 - incomplete zoom support, and missing rotation support.
21
22 ***************************************************************************/
23
24 #include "driver.h"
25 #include "cpu/z80/z80.h"
26
27
28 extern unsigned char *shangha3_ram;
29 extern size_t shangha3_ram_size;
30 extern int shangha3_do_shadows;
31
32 WRITE_HANDLER( shangha3_flipscreen_w );
33 WRITE_HANDLER( shangha3_gfxlist_addr_w );
34 WRITE_HANDLER( shangha3_blitter_go_w );
35 int shangha3_vh_start(void);
36 void shangha3_vh_stop(void);
37 void shangha3_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
38
39
40
41 /* this looks like a simple protection check */
42 /*
43 write read
44 78 78 -> 0
45 9b 10 -> 1
46 9b 20 -> 3
47 9b 40 -> 7
48 9b 80 -> f
49 08 -> e
50 10 -> c
51 20 -> 8
52 40 -> 0
53 */
READ_HANDLER(shangha3_prot_r)54 static READ_HANDLER( shangha3_prot_r )
55 {
56 static int count;
57 static int result[] = { 0x0,0x1,0x3,0x7,0xf,0xe,0xc,0x8,0x0};
58
59 //logerror("PC %04x: read 20004e\n",cpu_get_pc());
60
61 return result[count++ % 9];
62 }
WRITE_HANDLER(shangha3_prot_w)63 static WRITE_HANDLER( shangha3_prot_w )
64 {
65 //logerror("PC %04x: write %02x to 20004e\n",cpu_get_pc(),data);
66 }
67
68
READ_HANDLER(heberpop_gfxrom_r)69 static READ_HANDLER( heberpop_gfxrom_r )
70 {
71 UINT8 *ROM = memory_region(REGION_GFX1);
72
73 return ROM[offset] | (ROM[offset+1] << 8);
74 }
75
76
77
WRITE_HANDLER(shangha3_coinctrl_w)78 static WRITE_HANDLER( shangha3_coinctrl_w )
79 {
80 if ((data & 0xff000000) == 0)
81 {
82 coin_lockout_w(0,~data & 0x0400);
83 coin_lockout_w(1,~data & 0x0400);
84 coin_counter_w(0,data & 0x0100);
85 coin_counter_w(1,data & 0x0200);
86 }
87 }
88
WRITE_HANDLER(heberpop_coinctrl_w)89 static WRITE_HANDLER( heberpop_coinctrl_w )
90 {
91 if ((data & 0x00ff0000) == 0)
92 {
93 /* the sound ROM bank is selected by the main CPU! */
94 OKIM6295_set_bank_base(0,ALL_VOICES,(data & 0x08) ? 0x40000 : 0x00000);
95
96 coin_lockout_w(0,~data & 0x04);
97 coin_lockout_w(1,~data & 0x04);
98 coin_counter_w(0,data & 0x01);
99 coin_counter_w(1,data & 0x02);
100 }
101 }
102
103
WRITE_HANDLER(heberpop_sound_command_w)104 static WRITE_HANDLER( heberpop_sound_command_w )
105 {
106 soundlatch_w(0,data);
107 cpu_cause_interrupt(1,0xff); /* RST 38h */
108 }
109
110
111
112 static struct MemoryReadAddress shangha3_readmem[] =
113 {
114 { 0x000000, 0x07ffff, MRA_ROM },
115 { 0x100000, 0x100fff, paletteram_word_r },
116 { 0x200000, 0x200001, input_port_0_r },
117 { 0x200002, 0x200003, input_port_1_r },
118 { 0x20001e, 0x20001f, AY8910_read_port_0_r },
119 { 0x20004e, 0x20004f, shangha3_prot_r },
120 { 0x20006e, 0x20006f, OKIM6295_status_0_r },
121 { 0x300000, 0x30ffff, MRA_BANK1 },
122 { -1 } /* end of table */
123 };
124
125 static struct MemoryWriteAddress shangha3_writemem[] =
126 {
127 { 0x000000, 0x07ffff, MWA_ROM },
128 { 0x100000, 0x100fff, paletteram_RRRRRGGGGGBBBBBx_word_w, &paletteram },
129 { 0x200008, 0x200009, shangha3_blitter_go_w },
130 { 0x20000a, 0x20000b, MWA_NOP }, /* irq ack? */
131 { 0x20000c, 0x20000d, shangha3_coinctrl_w },
132 { 0x20002e, 0x20002f, AY8910_write_port_0_w },
133 { 0x20003e, 0x20003f, AY8910_control_port_0_w },
134 { 0x20004e, 0x20004f, shangha3_prot_w },
135 { 0x20006e, 0x20006f, OKIM6295_data_0_w },
136 { 0x300000, 0x30ffff, MWA_BANK1, &shangha3_ram, &shangha3_ram_size }, /* gfx & work ram */
137 { 0x340000, 0x340001, shangha3_flipscreen_w },
138 { 0x360000, 0x360001, shangha3_gfxlist_addr_w },
139 { -1 } /* end of table */
140 };
141
142
143 static struct MemoryReadAddress heberpop_readmem[] =
144 {
145 { 0x000000, 0x0fffff, MRA_ROM },
146 { 0x100000, 0x100fff, paletteram_word_r },
147 { 0x200000, 0x200001, input_port_0_r },
148 { 0x200002, 0x200003, input_port_1_r },
149 { 0x200004, 0x200005, input_port_2_r },
150 { 0x300000, 0x30ffff, MRA_BANK1 },
151 { 0x800000, 0xb7ffff, heberpop_gfxrom_r },
152 { -1 } /* end of table */
153 };
154
155 static struct MemoryWriteAddress heberpop_writemem[] =
156 {
157 { 0x000000, 0x0fffff, MWA_ROM },
158 { 0x100000, 0x100fff, paletteram_RRRRRGGGGGBBBBBx_word_w, &paletteram },
159 { 0x200008, 0x200009, shangha3_blitter_go_w },
160 { 0x20000a, 0x20000b, MWA_NOP }, /* irq ack? */
161 { 0x20000c, 0x20000d, heberpop_coinctrl_w },
162 { 0x20000e, 0x20000f, heberpop_sound_command_w },
163 { 0x300000, 0x30ffff, MWA_BANK1, &shangha3_ram, &shangha3_ram_size }, /* gfx & work ram */
164 { 0x340000, 0x340001, shangha3_flipscreen_w },
165 { 0x360000, 0x360001, shangha3_gfxlist_addr_w },
166 { -1 } /* end of table */
167 };
168
169 static struct MemoryReadAddress blocken_readmem[] =
170 {
171 { 0x000000, 0x0fffff, MRA_ROM },
172 { 0x100000, 0x100001, input_port_0_r },
173 { 0x100002, 0x100003, input_port_1_r },
174 { 0x100004, 0x100005, input_port_2_r },
175 { 0x200000, 0x200fff, paletteram_word_r },
176 { 0x300000, 0x30ffff, MRA_BANK1 },
177 { 0x800000, 0xb7ffff, heberpop_gfxrom_r },
178 { -1 } /* end of table */
179 };
180
181 static struct MemoryWriteAddress blocken_writemem[] =
182 {
183 { 0x000000, 0x0fffff, MWA_ROM },
184 { 0x100008, 0x100009, shangha3_blitter_go_w },
185 { 0x10000a, 0x10000b, MWA_NOP }, /* irq ack? */
186 { 0x10000c, 0x10000d, heberpop_coinctrl_w },
187 { 0x10000e, 0x10000f, heberpop_sound_command_w },
188 { 0x200000, 0x200fff, paletteram_RRRRRGGGGGBBBBBx_word_w, &paletteram },
189 { 0x300000, 0x30ffff, MWA_BANK1, &shangha3_ram, &shangha3_ram_size }, /* gfx & work ram */
190 { 0x340000, 0x340001, shangha3_flipscreen_w },
191 { 0x360000, 0x360001, shangha3_gfxlist_addr_w },
192 { -1 } /* end of table */
193 };
194
195 static struct MemoryReadAddress heberpop_sound_readmem[] =
196 {
197 { 0x0000, 0xf7ff, MRA_ROM },
198 { 0xf800, 0xffff, MRA_RAM },
199 { -1 } /* end of table */
200 };
201
202 static struct MemoryWriteAddress heberpop_sound_writemem[] =
203 {
204 { 0x0000, 0xf7ff, MWA_ROM },
205 { 0xf800, 0xffff, MWA_RAM },
206 { -1 } /* end of table */
207 };
208
209 static struct IOReadPort heberpop_sound_readport[] =
210 {
211 { 0x00, 0x00, YM2612_status_port_0_A_r },
212 { 0x80, 0x80, OKIM6295_status_0_r },
213 { 0xc0, 0xc0, soundlatch_r },
214 { -1 } /* end of table */
215 };
216
217 static struct IOWritePort heberpop_sound_writeport[] =
218 {
219 { 0x00, 0x00, YM2612_control_port_0_A_w },
220 { 0x01, 0x01, YM2612_data_port_0_A_w },
221 { 0x02, 0x02, YM2612_control_port_0_B_w },
222 { 0x03, 0x03, YM2612_data_port_0_B_w },
223 { 0x80, 0x80, OKIM6295_data_0_w },
224 { -1 } /* end of table */
225 };
226
227
228
229 INPUT_PORTS_START( shangha3 )
230 PORT_START
231 PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER1 )
232 PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER1 )
233 PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER1 )
234 PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER1 )
235 PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
236 PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
237 PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
238 PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
239 PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
240 PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2 )
241 PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2 )
242 PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2 )
243 PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
244 PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
245 PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )
246 PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
247
248 PORT_START
249 PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
250 PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 )
251 PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 )
252 PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_START1 )
253 PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_START2 )
254 PORT_BITX(0x0020, IP_ACTIVE_LOW, IPT_SERVICE, DEF_STR( Service_Mode ), KEYCODE_F2, IP_JOY_NONE )
255 PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
256 PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_VBLANK )
257
258 PORT_START
259 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
260 PORT_DIPSETTING( 0x01, "Easy" )
261 PORT_DIPSETTING( 0x03, "Normal" )
262 PORT_DIPSETTING( 0x02, "Hard" )
263 PORT_DIPSETTING( 0x00, "Hardest" )
264 PORT_DIPNAME( 0x0c, 0x0c, "Base Time" )
265 PORT_DIPSETTING( 0x04, "70 sec" )
266 PORT_DIPSETTING( 0x0c, "80 sec" )
267 PORT_DIPSETTING( 0x08, "90 sec" )
268 PORT_DIPSETTING( 0x00, "100 sec" )
269 PORT_DIPNAME( 0x30, 0x30, "Additional Time" )
270 PORT_DIPSETTING( 0x10, "4 sec" )
271 PORT_DIPSETTING( 0x30, "5 sec" )
272 PORT_DIPSETTING( 0x20, "6 sec" )
273 PORT_DIPSETTING( 0x00, "7 sec" )
274 PORT_DIPNAME( 0x40, 0x00, DEF_STR( Demo_Sounds ) )
275 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
276 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
277 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Flip_Screen ) )
278 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
279 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
280
281 PORT_START
282 PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) )
283 PORT_DIPSETTING( 0x00, DEF_STR( 5C_1C ) )
284 PORT_DIPSETTING( 0x04, DEF_STR( 4C_1C ) )
285 PORT_DIPSETTING( 0x02, DEF_STR( 3C_1C ) )
286 PORT_DIPSETTING( 0x06, DEF_STR( 2C_1C ) )
287 PORT_DIPSETTING( 0x07, DEF_STR( 1C_1C ) )
288 PORT_DIPSETTING( 0x03, DEF_STR( 1C_2C ) )
289 PORT_DIPSETTING( 0x05, DEF_STR( 1C_3C ) )
290 PORT_DIPSETTING( 0x01, DEF_STR( 1C_4C ) )
291 PORT_DIPNAME( 0x38, 0x38, DEF_STR( Coin_B ) )
292 PORT_DIPSETTING( 0x00, DEF_STR( 5C_1C ) )
293 PORT_DIPSETTING( 0x20, DEF_STR( 4C_1C ) )
294 PORT_DIPSETTING( 0x10, DEF_STR( 3C_1C ) )
295 PORT_DIPSETTING( 0x30, DEF_STR( 2C_1C ) )
296 PORT_DIPSETTING( 0x38, DEF_STR( 1C_1C ) )
297 PORT_DIPSETTING( 0x18, DEF_STR( 1C_2C ) )
298 PORT_DIPSETTING( 0x28, DEF_STR( 1C_3C ) )
299 PORT_DIPSETTING( 0x08, DEF_STR( 1C_4C ) )
300 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
301 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
302 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
303 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
304 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
305 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
306 INPUT_PORTS_END
307
308 INPUT_PORTS_START( heberpop )
309 PORT_START
310 PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER1 )
311 PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER1 )
312 PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER1 )
313 PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER1 )
314 PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
315 PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
316 PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
317 PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_VBLANK ) /* vblank?? has to toggle */
318 PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
319 PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2 )
320 PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2 )
321 PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2 )
322 PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
323 PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
324 PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )
325 PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_VBLANK ) /* vblank?? has to toggle */
326
327 PORT_START
328 PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
329 PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 )
330 PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 )
331 PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_START1 )
332 PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_START2 )
333 PORT_BITX(0x0020, IP_ACTIVE_LOW, IPT_SERVICE, DEF_STR( Service_Mode ), KEYCODE_F2, IP_JOY_NONE )
334 PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
335 PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
336
337 PORT_START
338 PORT_DIPNAME( 0x0003, 0x0003, DEF_STR( Difficulty ) )
339 PORT_DIPSETTING( 0x0002, "Very Easy" )
340 PORT_DIPSETTING( 0x0001, "Easy" )
341 PORT_DIPSETTING( 0x0003, "Normal" )
342 PORT_DIPSETTING( 0x0000, "Hard" )
343 PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) )
344 PORT_DIPSETTING( 0x0004, DEF_STR( Off ) )
345 PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
346 PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) )
347 PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
348 PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
349 PORT_DIPNAME( 0x0010, 0x0010, "Allow Diagonal Moves" )
350 PORT_DIPSETTING( 0x0000, DEF_STR( No ) )
351 PORT_DIPSETTING( 0x0010, DEF_STR( Yes ) )
352 PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Demo_Sounds ) )
353 PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
354 PORT_DIPSETTING( 0x0020, DEF_STR( On ) )
355 PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) )
356 PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
357 PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
358 PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) )
359 PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
360 PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
361 PORT_DIPNAME( 0x0700, 0x0700, DEF_STR( Coin_A ) )
362 PORT_DIPSETTING( 0x0000, DEF_STR( 5C_1C ) )
363 PORT_DIPSETTING( 0x0400, DEF_STR( 4C_1C ) )
364 PORT_DIPSETTING( 0x0200, DEF_STR( 3C_1C ) )
365 PORT_DIPSETTING( 0x0600, DEF_STR( 2C_1C ) )
366 PORT_DIPSETTING( 0x0700, DEF_STR( 1C_1C ) )
367 PORT_DIPSETTING( 0x0300, DEF_STR( 1C_2C ) )
368 PORT_DIPSETTING( 0x0500, DEF_STR( 1C_3C ) )
369 PORT_DIPSETTING( 0x0100, DEF_STR( 1C_4C ) )
370 PORT_DIPNAME( 0x3800, 0x3800, DEF_STR( Coin_B ) )
371 PORT_DIPSETTING( 0x0000, DEF_STR( 5C_1C ) )
372 PORT_DIPSETTING( 0x2000, DEF_STR( 4C_1C ) )
373 PORT_DIPSETTING( 0x1000, DEF_STR( 3C_1C ) )
374 PORT_DIPSETTING( 0x3000, DEF_STR( 2C_1C ) )
375 PORT_DIPSETTING( 0x3800, DEF_STR( 1C_1C ) )
376 PORT_DIPSETTING( 0x1800, DEF_STR( 1C_2C ) )
377 PORT_DIPSETTING( 0x2800, DEF_STR( 1C_3C ) )
378 PORT_DIPSETTING( 0x0800, DEF_STR( 1C_4C ) )
379 PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
380 PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
381 PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
382 PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
383 PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
384 PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
385 INPUT_PORTS_END
386
387 INPUT_PORTS_START( blocken )
388 PORT_START
389 PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER1 )
390 PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER1 )
391 PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER1 )
392 PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER1 )
393 PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
394 PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
395 PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 | IPF_PLAYER1 )
396 PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_VBLANK ) /* vblank?? has to toggle */
397 PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
398 PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2 )
399 PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2 )
400 PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2 )
401 PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
402 PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
403 PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON3 | IPF_PLAYER2 )
404 PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_VBLANK ) /* vblank?? has to toggle */
405
406 PORT_START
407 PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
408 PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 )
409 PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 )
410 PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_START1 )
411 PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_START2 )
412 PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_SERVICE ) /* keeping this pressed on boot generates "BAD DIPSW" */
413 PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
414 PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
415
416 PORT_START
417 PORT_SERVICE( 0x0001, IP_ACTIVE_LOW )
418 PORT_DIPNAME( 0x0006, 0x0006, DEF_STR( Difficulty ) )
419 PORT_DIPSETTING( 0x0004, "Easy" )
420 PORT_DIPSETTING( 0x0006, "Normal" )
421 PORT_DIPSETTING( 0x0002, "Hard" )
422 PORT_DIPSETTING( 0x0000, "Very Hard" )
423 PORT_DIPNAME( 0x0008, 0x0008, "Game Type" )
424 PORT_DIPSETTING( 0x0008, "A" )
425 PORT_DIPSETTING( 0x0000, "B" )
426 PORT_DIPNAME( 0x0030, 0x0030, "Players" )
427 PORT_DIPSETTING( 0x0030, "1" )
428 PORT_DIPSETTING( 0x0020, "2" )
429 PORT_DIPSETTING( 0x0010, "3" )
430 PORT_DIPSETTING( 0x0000, "4" )
431 PORT_DIPNAME( 0x0040, 0x0000, DEF_STR( Demo_Sounds ) )
432 PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
433 PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
434 PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Flip_Screen ) )
435 PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
436 PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
437 PORT_DIPNAME( 0x0f00, 0x0f00, DEF_STR( Coin_A ) )
438 PORT_DIPSETTING( 0x0200, DEF_STR( 4C_1C ) )
439 PORT_DIPSETTING( 0x0500, DEF_STR( 3C_1C ) )
440 PORT_DIPSETTING( 0x0800, DEF_STR( 2C_1C ) )
441 PORT_DIPSETTING( 0x0400, DEF_STR( 3C_2C ) )
442 PORT_DIPSETTING( 0x0100, DEF_STR( 4C_3C ) )
443 PORT_DIPSETTING( 0x0f00, DEF_STR( 1C_1C ) )
444 PORT_DIPSETTING( 0x0300, DEF_STR( 3C_4C ) )
445 PORT_DIPSETTING( 0x0700, DEF_STR( 2C_3C ) )
446 PORT_DIPSETTING( 0x0e00, DEF_STR( 1C_2C ) )
447 PORT_DIPSETTING( 0x0600, DEF_STR( 2C_5C ) )
448 PORT_DIPSETTING( 0x0d00, DEF_STR( 1C_3C ) )
449 PORT_DIPSETTING( 0x0c00, DEF_STR( 1C_4C ) )
450 PORT_DIPSETTING( 0x0b00, DEF_STR( 1C_5C ) )
451 PORT_DIPSETTING( 0x0a00, DEF_STR( 1C_6C ) )
452 PORT_DIPSETTING( 0x0900, DEF_STR( 1C_7C ) )
453 PORT_DIPSETTING( 0x0000, DEF_STR( Free_Play ) )
454 PORT_DIPNAME( 0xf000, 0xf000, DEF_STR( Coin_B ) )
455 PORT_DIPSETTING( 0x2000, DEF_STR( 4C_1C ) )
456 PORT_DIPSETTING( 0x5000, DEF_STR( 3C_1C ) )
457 PORT_DIPSETTING( 0x8000, DEF_STR( 2C_1C ) )
458 PORT_DIPSETTING( 0x0000, DEF_STR( 5C_3C ) )
459 PORT_DIPSETTING( 0x4000, DEF_STR( 3C_2C ) )
460 PORT_DIPSETTING( 0x1000, DEF_STR( 4C_3C ) )
461 PORT_DIPSETTING( 0xf000, DEF_STR( 1C_1C ) )
462 PORT_DIPSETTING( 0x3000, DEF_STR( 3C_4C ) )
463 PORT_DIPSETTING( 0x7000, DEF_STR( 2C_3C ) )
464 PORT_DIPSETTING( 0xe000, DEF_STR( 1C_2C ) )
465 PORT_DIPSETTING( 0x6000, DEF_STR( 2C_5C ) )
466 PORT_DIPSETTING( 0xd000, DEF_STR( 1C_3C ) )
467 PORT_DIPSETTING( 0xc000, DEF_STR( 1C_4C ) )
468 PORT_DIPSETTING( 0xb000, DEF_STR( 1C_5C ) )
469 PORT_DIPSETTING( 0xa000, DEF_STR( 1C_6C ) )
470 PORT_DIPSETTING( 0x9000, DEF_STR( 1C_7C ) )
471 INPUT_PORTS_END
472
473
474
475 static struct GfxLayout charlayout =
476 {
477 16,16,
478 RGN_FRAC(1,1),
479 4,
480 { 0, 1, 2, 3 },
481 { 1*4, 0*4, 3*4, 2*4, 5*4, 4*4, 7*4, 6*4,
482 9*4, 8*4, 11*4, 10*4, 13*4, 12*4, 15*4, 14*4 },
483 { 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64,
484 8*64, 9*64, 10*64, 11*64, 12*64, 13*64, 14*64, 15*64 },
485 128*8
486 };
487
488 static struct GfxDecodeInfo gfxdecodeinfo[] =
489 {
490 { REGION_GFX1, 0, &charlayout, 0, 128 },
491 { -1 } /* end of array */
492 };
493
494
495
496 static struct AY8910interface ay8910_interface =
497 {
498 1, /* 1 chip */
499 2000000, /* 2 MHz ??? */
500 { 40 },
501 { input_port_3_r },
502 { input_port_2_r },
503 { 0 },
504 { 0 }
505 };
506
irqhandler(int linestate)507 static void irqhandler(int linestate)
508 {
509 cpu_set_nmi_line(1,linestate);
510 }
511
512 static struct YM2612interface ym3438_interface =
513 {
514 1, /* 1 chip */
515 8000000, /* 8 MHz ?? */
516 { 40 },
517 { 0 },
518 { 0 },
519 { 0 },
520 { 0 },
521 { irqhandler }
522 };
523
524 static struct OKIM6295interface okim6295_interface =
525 {
526 1, /* 1 chip */
527 { 8000 }, /* 8000Hz frequency ??? */
528 { REGION_SOUND1 }, /* memory region */
529 { 40 }
530 };
531
532
533
534 static struct MachineDriver machine_driver_shangha3 =
535 {
536 /* basic machine hardware */
537 {
538 {
539 CPU_M68000,
540 16000000, /* 16 MHz ??? */
541 shangha3_readmem,shangha3_writemem,0,0,
542 m68_level4_irq,1
543 }
544 },
545 60, DEFAULT_REAL_60HZ_VBLANK_DURATION, /* frames per second, vblank duration */
546 1, /* single CPU, no need for interleaving */
547 0,
548
549 /* video hardware */
550 24*16, 16*16, { 0*16, 24*16-1, 1*16, 15*16-1 },
551 gfxdecodeinfo,
552 2048, 2048,
553 0,
554
555 VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE,
556 0,
557 shangha3_vh_start,
558 shangha3_vh_stop,
559 shangha3_vh_screenrefresh,
560
561 /* sound hardware */
562 0,0,0,0,
563 {
564 {
565 SOUND_AY8910,
566 &ay8910_interface
567 },
568 {
569 SOUND_OKIM6295,
570 &okim6295_interface
571 }
572 }
573 };
574
575 static struct MachineDriver machine_driver_heberpop =
576 {
577 /* basic machine hardware */
578 {
579 {
580 CPU_M68000,
581 16000000, /* 16 MHz ??? */
582 heberpop_readmem,heberpop_writemem,0,0,
583 m68_level4_irq,1
584 },
585 {
586 CPU_Z80,
587 6000000, /* 6 MHz ??? */
588 heberpop_sound_readmem,heberpop_sound_writemem,heberpop_sound_readport,heberpop_sound_writeport,
589 ignore_interrupt,0 /* IRQ triggered by main CPU */
590 /* NMI triggered by YM3438 */
591 }
592 },
593 60, DEFAULT_REAL_60HZ_VBLANK_DURATION, /* frames per second, vblank duration */
594 1, /* single CPU, no need for interleaving */
595 0,
596
597 /* video hardware */
598 24*16, 16*16, { 0*16, 24*16-1, 1*16, 15*16-1 },
599 gfxdecodeinfo,
600 2048, 2048,
601 0,
602
603 VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE,
604 0,
605 shangha3_vh_start,
606 shangha3_vh_stop,
607 shangha3_vh_screenrefresh,
608
609 /* sound hardware */
610 0,0,0,0,
611 {
612 {
613 SOUND_YM3438,
614 &ym3438_interface
615 },
616 {
617 SOUND_OKIM6295,
618 &okim6295_interface
619 }
620 }
621 };
622
623 static struct MachineDriver machine_driver_blocken =
624 {
625 /* basic machine hardware */
626 {
627 {
628 CPU_M68000,
629 16000000, /* 16 MHz ??? */
630 blocken_readmem,blocken_writemem,0,0,
631 m68_level4_irq,1
632 },
633 {
634 CPU_Z80,
635 6000000, /* 6 MHz ??? */
636 heberpop_sound_readmem,heberpop_sound_writemem,heberpop_sound_readport,heberpop_sound_writeport,
637 ignore_interrupt,0 /* IRQ triggered by main CPU */
638 /* NMI triggered by YM3438 */
639 }
640 },
641 60, DEFAULT_REAL_60HZ_VBLANK_DURATION, /* frames per second, vblank duration */
642 1, /* single CPU, no need for interleaving */
643 0,
644
645 /* video hardware */
646 24*16, 16*16, { 0*16, 24*16-1, 1*16, 15*16-1 },
647 gfxdecodeinfo,
648 2048, 2048,
649 0,
650
651 VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE,
652 0,
653 shangha3_vh_start,
654 shangha3_vh_stop,
655 shangha3_vh_screenrefresh,
656
657 /* sound hardware */
658 0,0,0,0,
659 {
660 {
661 SOUND_YM3438,
662 &ym3438_interface
663 },
664 {
665 SOUND_OKIM6295,
666 &okim6295_interface
667 }
668 }
669 };
670
671
672
673 /***************************************************************************
674
675 Game driver(s)
676
677 ***************************************************************************/
678
679 ROM_START( shangha3 )
680 ROM_REGION( 0x80000, REGION_CPU1 )
681 ROM_LOAD_EVEN( "s3j_ic3.v11", 0x0000, 0x40000, 0xe98ce9c8 )
682 ROM_LOAD_ODD ( "s3j_ic2.v11", 0x0000, 0x40000, 0x09174620 )
683
684 ROM_REGION( 0x200000, REGION_GFX1 | REGIONFLAG_DISPOSE )
685 ROM_LOAD( "s3j_ic43.chr", 0x0000, 0x200000, 0x2dbf9d17 )
686
687 ROM_REGION( 0x40000, REGION_SOUND1 ) /* samples for M6295 */
688 ROM_LOAD( "s3j_ic75.v10", 0x0000, 0x40000, 0xf0cdc86a )
689 ROM_END
690
ROM_START(heberpop)691 ROM_START( heberpop )
692 ROM_REGION( 0x100000, REGION_CPU1 )
693 ROM_LOAD_EVEN( "hbpic31.bin", 0x0000, 0x80000, 0xc430d264 )
694 ROM_LOAD_ODD ( "hbpic32.bin", 0x0000, 0x80000, 0xbfa555a8 )
695
696 ROM_REGION( 0x10000, REGION_CPU2 )
697 ROM_LOAD( "hbpic34.bin", 0x0000, 0x10000, 0x0cf056c6 )
698
699 ROM_REGION( 0x380000, REGION_GFX1 ) /* don't dispose, read during tests */
700 ROM_LOAD( "hbpic98.bin", 0x000000, 0x80000, 0xa599100a )
701 ROM_LOAD( "hbpic99.bin", 0x080000, 0x80000, 0xfb8bb12f )
702 ROM_LOAD( "hbpic100.bin", 0x100000, 0x80000, 0x05a0f765 )
703 ROM_LOAD( "hbpic101.bin", 0x180000, 0x80000, 0x151ba025 )
704 ROM_LOAD( "hbpic102.bin", 0x200000, 0x80000, 0x2b5e341a )
705 ROM_LOAD( "hbpic103.bin", 0x280000, 0x80000, 0xefa0e745 )
706 ROM_LOAD( "hbpic104.bin", 0x300000, 0x80000, 0xbb896bbb )
707
708 ROM_REGION( 0x80000, REGION_SOUND1 ) /* samples for M6295 */
709 ROM_LOAD( "hbpic53.bin", 0x0000, 0x80000, 0xa4483aa0 )
710 ROM_END
711
712 ROM_START( blocken )
713 ROM_REGION( 0x100000, REGION_CPU1 )
714 ROM_LOAD_EVEN( "ic31j.bin", 0x0000, 0x20000, 0xec8de2a3 )
715 ROM_LOAD_ODD ( "ic32j.bin", 0x0000, 0x20000, 0x79b96240 )
716
717 ROM_REGION( 0x10000, REGION_CPU2 )
718 ROM_LOAD( "ic34.bin", 0x0000, 0x10000, 0x23e446ff )
719
720 ROM_REGION( 0x380000, REGION_GFX1 ) /* don't dispose, read during tests */
721 ROM_LOAD( "ic98j.bin", 0x000000, 0x80000, 0x35dda273 )
722 ROM_LOAD( "ic99j.bin", 0x080000, 0x80000, 0xce43762b )
723 /* 100000-1fffff empty */
724 ROM_LOAD( "ic100j.bin", 0x200000, 0x80000, 0xa34786fd )
725 /* 280000-37ffff empty */
726
727 ROM_REGION( 0x80000, REGION_SOUND1 ) /* samples for M6295 */
728 ROM_LOAD( "ic53.bin", 0x0000, 0x80000, 0x86108c56 )
729 ROM_END
730
731
732
733 static void init_shangha3(void)
734 {
735 shangha3_do_shadows = 1;
736 }
init_heberpop(void)737 static void init_heberpop(void)
738 {
739 shangha3_do_shadows = 0;
740 }
741
742 GAME( 1993, shangha3, 0, shangha3, shangha3, shangha3, ROT0_16BIT, "Sunsoft", "Shanghai III (Japan)" )
743 GAME( 1994, heberpop, 0, heberpop, heberpop, heberpop, ROT0_16BIT, "Sunsoft / Atlus", "Hebereke no Popoon (Japan)" )
744 GAME( 1994, blocken, 0, blocken, blocken, heberpop, ROT0_16BIT, "KID / Visco", "Blocken (Japan)" )
745