1 #include "../machine/tnzs.c"
2 #include "../vidhrdw/tnzs.c"
3
4 /***************************************************************************
5
6 The New Zealand Story driver, used for tnzs & tnzs2.
7
8 TODO: - Find out how the hardware credit-counter works (MPU)
9 - Verify dip switches
10 - Fix video offsets (See Dr Toppel in Flip-Screen - also
11 affects Chuka Taisen)
12 - Video scroll side flicker in Chuka Taisen, Insector X and Dr Toppel
13
14 Arkanoid 2:
15 - What do writes at $f400 do ?
16 - Why does the game zero the $fd00 area ?
17 Extrmatn:
18 - What do reads from $f600 do ? (discarded)
19 Chuka Taisen:
20 - What do writes at $f400 do ? (value 40h)
21 - What do reads from $f600 do in service mode ?
22 Dr Toppel:
23 - What do writes at $f400 do ? (value 40h)
24 - What do reads from $f600 do in service mode ?
25
26 ****************************************************************************
27
28 extrmatn and arkanoi2 have a special test mode. The correct procedure to make
29 it succeed is as follows:
30 - enter service mode
31 - on the color test screen, press 2 (player 2 start)
32 - set dip switch 1 and dip switch 2 so that they read 00000001
33 - reset the emulation, and skip the previous step.
34 - press 3 (coin 1). Text at the bottom will change to "CHECKING NOW".
35 - use all the inputs, including tilt, until all inputs are OK
36 - press 3 (coin 1) - to confirm that coin lockout 1 works
37 - press 3 (coin 1) - to confirm that coin lockout 2 works
38 - set dip switch 1 to 00000000
39 - set dip switch 1 to 10101010
40 - set dip switch 1 to 11111111
41 - set dip switch 2 to 00000000
42 - set dip switch 2 to 10101010
43 - set dip switch 2 to 11111111
44 - speaker should now output a tone
45 - press 3 (coin 1) , to confirm that OPN works
46 - press 3 (coin 1) , to confirm that SSGCH1 works
47 - press 3 (coin 1) , to confirm that SSGCH2 works
48 - press 3 (coin 1) , to confirm that SSGCH3 works
49 - finished ("CHECK ALL OK!")
50
51 ****************************************************************************
52
53 The New Zealand Story memory map (preliminary)
54
55 CPU #1
56 0000-7fff ROM
57 8000-bfff banked - banks 0-1 RAM; banks 2-7 ROM
58 c000-dfff object RAM, including:
59 c000-c1ff sprites (code, low byte)
60 c200-c3ff sprites (x-coord, low byte)
61 c400-c5ff tiles (code, low byte)
62
63 d000-d1ff sprites (code, high byte)
64 d200-d3ff sprites (x-coord and colour, high byte)
65 d400-d5ff tiles (code, high byte)
66 d600-d7ff tiles (colour)
67 e000-efff RAM shared with CPU #2
68 f000-ffff VDC RAM, including:
69 f000-f1ff sprites (y-coord)
70 f200-f2ff scrolling info
71 f300-f301 vdc controller
72 f302-f303 scroll x-coords (high bits)
73 f600 bankswitch
74 f800-fbff palette
75
76 CPU #2
77 0000-7fff ROM
78 8000-9fff banked ROM
79 a000 bankswitch
80 b000-b001 YM2203 interface (with DIPs on YM2203 ports)
81 c000-c001 I8742 MCU
82 e000-efff RAM shared with CPU #1
83 f000-f003 inputs (used only by Arkanoid 2)
84
85 ****************************************************************************/
86 /***************************************************************************
87
88 Arkanoid 2 - Revenge of Doh!
89 (C) 1987 Taito
90
91 driver by
92
93 Luca Elia (eliavit@unina.it)
94 Mirko Buffoni
95
96 - The game doesn't write to f800-fbff (static palette)
97
98
99
100 Interesting routines (main cpu)
101 -------------------------------
102
103 1ed prints the test screen (first string at 206)
104
105 47a prints dipsw1&2 e 1p&2p paddleL values:
106 e821 IN DIPSW1 e823-4 1P PaddleL (lo-hi)
107 e822 IN DIPSW2 e825-6 2P PaddleL (lo-hi)
108
109 584 prints OK or NG on each entry:
110 if (*addr)!=0 { if (*addr)!=2 OK else NG }
111 e880 1P PADDLEL e88a IN SERVICE
112 e881 1P PADDLER e88b IN TILT
113 e882 1P BUTTON e88c OUT LOCKOUT1
114 e883 1P START e88d OUT LOCKOUT2
115 e884 2P PADDLEL e88e IN DIP-SW1
116 e885 2P PADDLER e88f IN DIP-SW2
117 e886 2P BUTTON e890 SND OPN
118 e887 2P START e891 SND SSGCH1
119 e888 IN COIN1 e892 SND SSGCH2
120 e889 IN COIN2 e893 SND SSGCH3
121
122 672 prints a char
123 715 prints a string (0 terminated)
124
125 Shared Memory (values written mainly by the sound cpu)
126 ------------------------------------------------------
127
128 e001=dip-sw A e399=coin counter value e72c-d=1P paddle (lo-hi)
129 e002=dip-sw B e3a0-2=1P score/10 (BCD) e72e-f=2P paddle (lo-hi)
130 e008=level=2*(shown_level-1)+x <- remember it's a binary tree (42 last)
131 e7f0=country code(from 9fde in sound rom)
132 e807=counter, reset by sound cpu, increased by main cpu each vblank
133 e80b=test progress=0(start) 1(first 8) 2(all ok) 3(error)
134 ec09-a~=ed05-6=xy pos of cursor in hi-scores
135 ec81-eca8=hi-scores(8bytes*5entries)
136
137 addr bit name active addr bit name active
138 e72d 6 coin[1] low e729 1 2p select low
139 5 service high 0 1p select low
140 4 coin[2] low
141
142 addr bit name active addr bit name active
143 e730 7 tilt low e7e7 4 1p fire low
144 0 2p fire low
145
146 Interesting routines (sound cpu)
147 --------------------------------
148
149 4ae check starts B73,B7a,B81,B99 coin related
150 8c1 check coins 62e lockout check 664 dsw check
151
152 Interesting locations (sound cpu)
153 ---------------------------------
154
155 d006=each bit is on if a corresponding location (e880-e887) has changed
156 d00b=(c001)>>4=tilt if 0E (security sequence must be reset?)
157 addr bit name active
158 d00c 7 tilt
159 6 ?service?
160 5 coin2 low
161 4 coin1 low
162
163 d00d=each bit is on if the corresponding location (e880-e887) is 1 (OK)
164 d00e=each of the 4 MSBs is on if ..
165 d00f=FF if tilt, 00 otherwise
166 d011=if 00 checks counter, if FF doesn't
167 d23f=input port 1 value
168
169 ***************************************************************************/
170 /***************************************************************************
171
172 Kageki
173 (c) 1988 Taito Corporation
174
175 Driver by Takahiro Nogi (nogi@kt.rim.or.jp) 1999/11/06
176
177 ***************************************************************************/
178
179 #include "driver.h"
180 #include "vidhrdw/generic.h"
181
182
183
184 /* prototypes for functions in ../machine/tnzs.c */
185 unsigned char *tnzs_objram, *tnzs_workram;
186 unsigned char *tnzs_vdcram, *tnzs_scrollram;
187 void init_extrmatn(void);
188 void init_arkanoi2(void);
189 void init_drtoppel(void);
190 void init_chukatai(void);
191 void init_tnzs(void);
192 void init_insectx(void);
193 void init_kageki(void);
194 READ_HANDLER( arkanoi2_sh_f000_r );
195 void tnzs_init_machine(void);
196 int tnzs_interrupt (void);
197 READ_HANDLER( tnzs_mcu_r );
198 READ_HANDLER( tnzs_workram_r );
199 READ_HANDLER( tnzs_workram_sub_r );
200 WRITE_HANDLER( tnzs_workram_w );
201 WRITE_HANDLER( tnzs_workram_sub_w );
202 WRITE_HANDLER( tnzs_mcu_w );
203 WRITE_HANDLER( tnzs_bankswitch_w );
204 WRITE_HANDLER( tnzs_bankswitch1_w );
205
206
207 /* prototypes for functions in ../vidhrdw/tnzs.c */
208 int tnzs_vh_start(void);
209 void tnzs_vh_stop(void);
210 void arkanoi2_vh_convert_color_prom(unsigned char *palette, unsigned short *colortable,const unsigned char *color_prom);
211 void arkanoi2_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
212 void tnzs_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
213
214
215
216 /* max samples */
217 #define MAX_SAMPLES 0x2f
218
kageki_init_samples(const struct MachineSound * msound)219 int kageki_init_samples(const struct MachineSound *msound)
220 {
221 struct GameSamples *samples;
222 unsigned char *scan, *src, *dest;
223 int start, size;
224 int i, n;
225
226 size = sizeof(struct GameSamples) + MAX_SAMPLES * sizeof(struct GameSamples *);
227
228 if ((Machine->samples = (struct GameSamples*)malloc(size)) == NULL) return 1;
229
230 samples = Machine->samples;
231 samples->total = MAX_SAMPLES;
232
233 for (i = 0; i < samples->total; i++)
234 {
235 src = memory_region(REGION_SOUND1) + 0x0090;
236 start = (src[(i * 2) + 1] * 256) + src[(i * 2)];
237 scan = &src[start];
238 size = 0;
239
240 // check sample length
241 while (1)
242 {
243 if (*scan++ == 0x00)
244 {
245 break;
246 } else {
247 size++;
248 }
249 }
250 if ((samples->sample[i] = (struct GameSample*)malloc(sizeof(struct GameSample) + size * sizeof(unsigned char))) == NULL) return 1;
251
252 if (start < 0x100) start = size = 0;
253
254 samples->sample[i]->smpfreq = 7000; /* 7 KHz??? */
255 samples->sample[i]->resolution = 8; /* 8 bit */
256 samples->sample[i]->length = size;
257
258 // signed 8-bit sample to unsigned 8-bit sample convert
259 dest = (unsigned char *)samples->sample[i]->data;
260 scan = &src[start];
261 for (n = 0; n < size; n++)
262 {
263 *dest++ = ((*scan++) ^ 0x80);
264 }
265 // logerror("samples num:%02X ofs:%04X lng:%04X\n", i, start, size);
266 }
267
268 return 0;
269 }
270
271
272 static int kageki_csport_sel = 0;
READ_HANDLER(kageki_csport_r)273 static READ_HANDLER( kageki_csport_r )
274 {
275 int dsw, dsw1, dsw2;
276
277 dsw1 = readinputport(0); // DSW1
278 dsw2 = readinputport(1); // DSW2
279
280 switch (kageki_csport_sel)
281 {
282 case 0x00: // DSW2 5,1 / DSW1 5,1
283 dsw = (((dsw2 & 0x10) >> 1) | ((dsw2 & 0x01) << 2) | ((dsw1 & 0x10) >> 3) | ((dsw1 & 0x01) >> 0));
284 break;
285 case 0x01: // DSW2 7,3 / DSW1 7,3
286 dsw = (((dsw2 & 0x40) >> 3) | ((dsw2 & 0x04) >> 0) | ((dsw1 & 0x40) >> 5) | ((dsw1 & 0x04) >> 2));
287 break;
288 case 0x02: // DSW2 6,2 / DSW1 6,2
289 dsw = (((dsw2 & 0x20) >> 2) | ((dsw2 & 0x02) << 1) | ((dsw1 & 0x20) >> 4) | ((dsw1 & 0x02) >> 1));
290 break;
291 case 0x03: // DSW2 8,4 / DSW1 8,4
292 dsw = (((dsw2 & 0x80) >> 4) | ((dsw2 & 0x08) >> 1) | ((dsw1 & 0x80) >> 6) | ((dsw1 & 0x08) >> 3));
293 break;
294 default:
295 dsw = 0x00;
296 // logerror("kageki_csport_sel error !! (0x%08X)\n", kageki_csport_sel);
297 }
298
299 return (dsw & 0xff);
300 }
301
WRITE_HANDLER(kageki_csport_w)302 static WRITE_HANDLER( kageki_csport_w )
303 {
304 char mess[80];
305
306 if (data > 0x3f)
307 {
308 // read dipsw port
309 kageki_csport_sel = (data & 0x03);
310 } else {
311 if (data > MAX_SAMPLES)
312 {
313 // stop samples
314 sample_stop(0);
315 sprintf(mess, "VOICE:%02X STOP", data);
316 } else {
317 // play samples
318 sample_start(0, data, 0);
319 sprintf(mess, "VOICE:%02X PLAY", data);
320 }
321 // usrintf_showmessage(mess);
322 }
323 }
324
325
326 static struct MemoryReadAddress readmem[] =
327 {
328 { 0x0000, 0x7fff, MRA_ROM },
329 { 0x8000, 0xbfff, MRA_BANK1 }, /* ROM + RAM */
330 { 0xc000, 0xdfff, MRA_RAM },
331 { 0xe000, 0xefff, tnzs_workram_r }, /* WORK RAM (shared by the 2 z80's */
332 { 0xf000, 0xf1ff, MRA_RAM }, /* VDC RAM */
333 { 0xf600, 0xf600, MRA_NOP }, /* ? */
334 { 0xf800, 0xfbff, MRA_RAM }, /* not in extrmatn and arkanoi2 (PROMs instead) */
335 { -1 } /* end of table */
336 };
337
338 static struct MemoryWriteAddress writemem[] =
339 {
340 { 0x0000, 0x7fff, MWA_ROM },
341 { 0x8000, 0xbfff, MWA_BANK1 }, /* ROM + RAM */
342 { 0xc000, 0xdfff, MWA_RAM, &tnzs_objram },
343 { 0xe000, 0xefff, tnzs_workram_w, &tnzs_workram },
344 { 0xf000, 0xf1ff, MWA_RAM, &tnzs_vdcram },
345 { 0xf200, 0xf3ff, MWA_RAM, &tnzs_scrollram }, /* scrolling info */
346 { 0xf400, 0xf400, MWA_NOP }, /* ? */
347 { 0xf600, 0xf600, tnzs_bankswitch_w },
348 { 0xf800, 0xfbff, paletteram_xRRRRRGGGGGBBBBB_w, &paletteram }, /* not in extrmatn and arkanoi2 (PROMs instead) */
349 { -1 } /* end of table */
350 };
351
352 static struct MemoryReadAddress sub_readmem[] =
353 {
354 { 0x0000, 0x7fff, MRA_ROM },
355 { 0x8000, 0x9fff, MRA_BANK2 },
356 { 0xb000, 0xb000, YM2203_status_port_0_r },
357 { 0xb001, 0xb001, YM2203_read_port_0_r },
358 { 0xc000, 0xc001, tnzs_mcu_r }, /* plain input ports in insectx (memory handler */
359 /* changed in insectx_init() ) */
360 { 0xd000, 0xdfff, MRA_RAM },
361 { 0xe000, 0xefff, tnzs_workram_sub_r },
362 { 0xf000, 0xf003, arkanoi2_sh_f000_r }, /* paddles in arkanoid2/plumppop; the ports are */
363 /* read but not used by the other games, and are not read at */
364 /* all by insectx. */
365 { -1 } /* end of table */
366 };
367
368 static struct MemoryWriteAddress sub_writemem[] =
369 {
370 { 0x0000, 0x9fff, MWA_ROM },
371 { 0xa000, 0xa000, tnzs_bankswitch1_w },
372 { 0xb000, 0xb000, YM2203_control_port_0_w },
373 { 0xb001, 0xb001, YM2203_write_port_0_w },
374 { 0xc000, 0xc001, tnzs_mcu_w }, /* not present in insectx */
375 { 0xd000, 0xdfff, MWA_RAM },
376 { 0xe000, 0xefff, tnzs_workram_sub_w },
377 { -1 } /* end of table */
378 };
379
380 static struct MemoryReadAddress kageki_sub_readmem[] =
381 {
382 { 0x0000, 0x7fff, MRA_ROM },
383 { 0x8000, 0x9fff, MRA_BANK2 },
384 { 0xb000, 0xb000, YM2203_status_port_0_r },
385 { 0xb001, 0xb001, YM2203_read_port_0_r },
386 { 0xc000, 0xc000, input_port_2_r },
387 { 0xc001, 0xc001, input_port_3_r },
388 { 0xc002, 0xc002, input_port_4_r },
389 { 0xd000, 0xdfff, MRA_RAM },
390 { 0xe000, 0xefff, tnzs_workram_sub_r },
391 { -1 } /* end of table */
392 };
393
394 static struct MemoryWriteAddress kageki_sub_writemem[] =
395 {
396 { 0x0000, 0x9fff, MWA_ROM },
397 { 0xa000, 0xa000, tnzs_bankswitch1_w },
398 { 0xb000, 0xb000, YM2203_control_port_0_w },
399 { 0xb001, 0xb001, YM2203_write_port_0_w },
400 { 0xd000, 0xdfff, MWA_RAM },
401 { 0xe000, 0xefff, tnzs_workram_sub_w },
402 { -1 } /* end of table */
403 };
404
405 /* the bootleg board is different, it has a third CPU (and of course no mcu) */
406
WRITE_HANDLER(tnzsb_sound_command_w)407 static WRITE_HANDLER( tnzsb_sound_command_w )
408 {
409 soundlatch_w(offset,data);
410 cpu_cause_interrupt(2,0xff);
411 }
412
413 static struct MemoryReadAddress tnzsb_readmem1[] =
414 {
415 { 0x0000, 0x7fff, MRA_ROM },
416 { 0x8000, 0x9fff, MRA_BANK2 },
417 { 0xb002, 0xb002, input_port_0_r },
418 { 0xb003, 0xb003, input_port_1_r },
419 { 0xc000, 0xc000, input_port_2_r },
420 { 0xc001, 0xc001, input_port_3_r },
421 { 0xc002, 0xc002, input_port_4_r },
422 { 0xd000, 0xdfff, MRA_RAM },
423 { 0xe000, 0xefff, tnzs_workram_sub_r },
424 { 0xf000, 0xf003, MRA_RAM },
425 { -1 } /* end of table */
426 };
427
428 static struct MemoryWriteAddress tnzsb_writemem1[] =
429 {
430 { 0x0000, 0x9fff, MWA_ROM },
431 { 0xa000, 0xa000, tnzs_bankswitch1_w },
432 { 0xb004, 0xb004, tnzsb_sound_command_w },
433 { 0xd000, 0xdfff, MWA_RAM },
434 { 0xe000, 0xefff, tnzs_workram_sub_w },
435 { 0xf000, 0xf3ff, paletteram_xRRRRRGGGGGBBBBB_w, &paletteram },
436 { -1 } /* end of table */
437 };
438
439 static struct MemoryReadAddress tnzsb_readmem2[] =
440 {
441 { 0x0000, 0x7fff, MRA_ROM },
442 { 0xc000, 0xdfff, MRA_RAM },
443 { -1 } /* end of table */
444 };
445
446 static struct MemoryWriteAddress tnzsb_writemem2[] =
447 {
448 { 0x0000, 0x7fff, MWA_ROM },
449 { 0xc000, 0xdfff, MWA_RAM },
450 { -1 } /* end of table */
451 };
452
453 static struct IOReadPort tnzsb_readport[] =
454 {
455 { 0x00, 0x00, YM2203_status_port_0_r },
456 { 0x02, 0x02, soundlatch_r },
457 { -1 } /* end of table */
458 };
459
460 static struct IOWritePort tnzsb_writeport[] =
461 {
462 { 0x00, 0x00, YM2203_control_port_0_w },
463 { 0x01, 0x01, YM2203_write_port_0_w },
464 { -1 } /* end of table */
465 };
466
467
468
469 INPUT_PORTS_START( extrmatn )
470 PORT_START /* DSW A */
471 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
472 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
473 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
474 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
475 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
476 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
477 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
478 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
479 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
480 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
481 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
482 PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
483 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
484 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
485 PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
486 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
487 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
488 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
489 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
490 PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
491
492 PORT_START /* DSW B */
493 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
494 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
495 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
496 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
497 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
498 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
499 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
500 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
501 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
502 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
503 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
504 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
505 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
506 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
507 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
508 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
509 PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
510 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
511 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
512 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
513 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
514 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
515 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
516 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
517
518 PORT_START /* IN0 */
519 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
520 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
521 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
522 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
523 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
524 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
525 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
526 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
527
528 PORT_START /* IN1 */
529 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_PLAYER2 )
530 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER2 )
531 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_PLAYER2 )
532 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_PLAYER2 )
533 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
534 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
535 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
536 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
537
538 PORT_START /* IN2 */
539 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN3 )
540 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
541 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
542 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
543 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_COIN1 )
544 PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_COIN2 )
545 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
546 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
547 INPUT_PORTS_END
548
549 INPUT_PORTS_START( arkanoi2 )
550 PORT_START /* DSW1 - IN2 */
551 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
552 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
553 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
554 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
555 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
556 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
557 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
558 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) )
559 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
560 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
561 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
562 PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
563 PORT_DIPSETTING( 0x10, DEF_STR( 3C_1C ) )
564 PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) )
565 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
566 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
567 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_2C ) )
568 PORT_DIPSETTING( 0x80, DEF_STR( 1C_3C ) )
569 PORT_DIPSETTING( 0x40, DEF_STR( 1C_4C ) )
570 PORT_DIPSETTING( 0x00, DEF_STR( 1C_6C ) )
571
572 PORT_START /* DSW2 - IN3 */
573 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
574 PORT_DIPSETTING( 0x02, "Easy" )
575 PORT_DIPSETTING( 0x03, "Normal" )
576 PORT_DIPSETTING( 0x01, "Hard" )
577 PORT_DIPSETTING( 0x00, "Very Hard" )
578 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )
579 PORT_DIPSETTING( 0x00, "50k 150k" )
580 PORT_DIPSETTING( 0x0c, "100k 200k" )
581 PORT_DIPSETTING( 0x04, "50k Only" )
582 PORT_DIPSETTING( 0x08, "100k Only" )
583 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
584 PORT_DIPSETTING( 0x20, "2" )
585 PORT_DIPSETTING( 0x30, "3" )
586 PORT_DIPSETTING( 0x10, "4" )
587 PORT_DIPSETTING( 0x00, "5" )
588 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
589 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
590 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
591 PORT_DIPNAME( 0x80, 0x00, "Allow Continue" )
592 PORT_DIPSETTING( 0x80, DEF_STR( No ) )
593 PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
594
595 PORT_START /* IN1 - read at c000 (sound cpu) */
596 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
597 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
598 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
599 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
600 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
601 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
602 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
603 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
604
605 PORT_START /* empty */
606
607 PORT_START /* empty */
608
609 PORT_START /* spinner 1 - read at f000/1 */
610 PORT_ANALOG( 0x0fff, 0x0000, IPT_DIAL, 70, 15, 0, 0 )
611 PORT_BIT ( 0x1000, IP_ACTIVE_LOW, IPT_COIN2 )
612 PORT_BIT ( 0x2000, IP_ACTIVE_HIGH, IPT_COIN3 )
613 PORT_BIT ( 0x4000, IP_ACTIVE_LOW, IPT_COIN1 )
614 PORT_BIT ( 0x8000, IP_ACTIVE_LOW, IPT_TILT ) /* arbitrarily assigned, handled by the mcu */
615
616 PORT_START /* spinner 2 - read at f002/3 */
617 PORT_ANALOG( 0x0fff, 0x0000, IPT_DIAL | IPF_PLAYER2, 70, 15, 0, 0 )
618 PORT_BIT ( 0xf000, IP_ACTIVE_LOW, IPT_UNKNOWN )
619 INPUT_PORTS_END
620
621 INPUT_PORTS_START( ark2us )
622 PORT_START /* DSW1 - IN2 */
623 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
624 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
625 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
626 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
627 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
628 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
629 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
630 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) )
631 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
632 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
633 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
634 PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
635 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
636 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
637 PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
638 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
639 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
640 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
641 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
642 PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
643
644 PORT_START /* DSW2 - IN3 */
645 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
646 PORT_DIPSETTING( 0x02, "Easy" )
647 PORT_DIPSETTING( 0x03, "Normal" )
648 PORT_DIPSETTING( 0x01, "Hard" )
649 PORT_DIPSETTING( 0x00, "Very Hard" )
650 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )
651 PORT_DIPSETTING( 0x00, "50k 150k" )
652 PORT_DIPSETTING( 0x0c, "100k 200k" )
653 PORT_DIPSETTING( 0x04, "50k Only" )
654 PORT_DIPSETTING( 0x08, "100k Only" )
655 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
656 PORT_DIPSETTING( 0x20, "2" )
657 PORT_DIPSETTING( 0x30, "3" )
658 PORT_DIPSETTING( 0x10, "4" )
659 PORT_DIPSETTING( 0x00, "5" )
660 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
661 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
662 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
663 PORT_DIPNAME( 0x80, 0x00, "Allow Continue" )
664 PORT_DIPSETTING( 0x80, DEF_STR( No ) )
665 PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
666
667 PORT_START /* IN1 - read at c000 (sound cpu) */
668 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
669 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
670 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
671 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
672 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
673 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
674 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
675 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
676
677 PORT_START /* empty */
678
679 PORT_START /* empty */
680
681 PORT_START /* spinner 1 - read at f000/1 */
682 PORT_ANALOG( 0x0fff, 0x0000, IPT_DIAL, 70, 15, 0, 0 )
683 PORT_BIT ( 0x1000, IP_ACTIVE_LOW, IPT_COIN2 )
684 PORT_BIT ( 0x2000, IP_ACTIVE_HIGH, IPT_COIN3 )
685 PORT_BIT ( 0x4000, IP_ACTIVE_LOW, IPT_COIN1 )
686 PORT_BIT ( 0x8000, IP_ACTIVE_LOW, IPT_TILT ) /* arbitrarily assigned, handled by the mcu */
687
688 PORT_START /* spinner 2 - read at f002/3 */
689 PORT_ANALOG( 0x0fff, 0x0000, IPT_DIAL | IPF_PLAYER2, 70, 15, 0, 0 )
690 PORT_BIT ( 0xf000, IP_ACTIVE_LOW, IPT_UNKNOWN )
691 INPUT_PORTS_END
692
693 INPUT_PORTS_START( plumppop )
694 PORT_START /* DSW A */
695 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
696 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
697 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
698 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
699 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
700 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
701 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
702 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) )
703 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
704 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
705 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
706 PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
707 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
708 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
709 PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
710 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
711 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
712 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
713 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
714 PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
715
716 PORT_START /* DSW B */
717 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
718 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
719 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
720 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
721 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
722 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
723 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
724 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
725 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
726 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
727 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
728 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
729 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
730 PORT_DIPSETTING( 0x20, "2" )
731 PORT_DIPSETTING( 0x30, "3" )
732 PORT_DIPSETTING( 0x10, "4" )
733 PORT_DIPSETTING( 0x00, "5" )
734 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
735 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
736 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
737 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
738 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
739 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
740
741 PORT_START /* IN0 */
742 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
743 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
744 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
745 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
746 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
747 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_CHEAT )
748 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
749 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
750
751 PORT_START /* IN1 */
752 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
753 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
754 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
755 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
756 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
757 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_CHEAT | IPF_PLAYER2 )
758 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
759 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
760
761 PORT_START /* IN2 */
762 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN3 )
763 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
764 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
765 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
766 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_COIN1 )
767 PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_COIN2 )
768 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
769 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
770
771 PORT_START /* spinner 1 - read at f000/1 */
772 PORT_ANALOG( 0xffff, 0x0000, IPT_DIAL, 70, 15, 0, 0 )
773
774 PORT_START /* spinner 2 - read at f002/3 */
775 PORT_ANALOG( 0xffff, 0x0000, IPT_DIAL | IPF_PLAYER2, 70, 15, 0, 0 )
776 INPUT_PORTS_END
777
778 INPUT_PORTS_START( drtoppel )
779 PORT_START /* DSW A */
780 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
781 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
782 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
783 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
784 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
785 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
786 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
787 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) )
788 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
789 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
790 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
791 PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
792 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
793 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
794 PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
795 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
796 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
797 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
798 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
799 PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
800
801 PORT_START /* DSW B */
802 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
803 PORT_DIPSETTING( 0x02, "Easy" )
804 PORT_DIPSETTING( 0x03, "Medium" )
805 PORT_DIPSETTING( 0x01, "Hard" )
806 PORT_DIPSETTING( 0x00, "Hardest" )
807 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )
808 PORT_DIPSETTING( 0x0c, "30000" )
809 PORT_DIPSETTING( 0x00, DEF_STR( Unknown ) )
810 PORT_DIPSETTING( 0x04, DEF_STR( Unknown ) )
811 PORT_DIPSETTING( 0x08, DEF_STR( Unknown ) )
812 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
813 PORT_DIPSETTING( 0x20, "2" )
814 PORT_DIPSETTING( 0x30, "3" )
815 PORT_DIPSETTING( 0x10, "4" )
816 PORT_DIPSETTING( 0x00, "5" )
817 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
818 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
819 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
820 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
821 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
822 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
823
824 PORT_START /* IN0 */
825 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
826 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
827 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
828 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
829 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
830 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
831 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
832 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
833
834 PORT_START /* IN1 */
835 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_PLAYER2 )
836 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER2 )
837 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_PLAYER2 )
838 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_PLAYER2 )
839 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
840 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
841 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
842 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
843
844 PORT_START /* IN2 */
845 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN3 )
846 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
847 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
848 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
849 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_COIN1 )
850 PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_COIN2 )
851 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
852 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
853 INPUT_PORTS_END
854
855 INPUT_PORTS_START( chukatai )
856 PORT_START /* DSW A */
857 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
858 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
859 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
860 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
861 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
862 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
863 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
864 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) )
865 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
866 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
867 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
868 PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
869 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
870 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
871 PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
872 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
873 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
874 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
875 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
876 PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
877
878 PORT_START /* DSW B */
879 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
880 PORT_DIPSETTING( 0x02, "Easy" )
881 PORT_DIPSETTING( 0x03, "Medium" )
882 PORT_DIPSETTING( 0x01, "Hard" )
883 PORT_DIPSETTING( 0x00, "Hardest" )
884 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
885 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
886 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
887 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
888 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
889 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
890 /* Bonus life awards are to be verified
891 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )
892 PORT_DIPSETTING( 0x00, "50000 150000" )
893 PORT_DIPSETTING( 0x0c, "70000 200000" )
894 PORT_DIPSETTING( 0x04, "100000 250000" )
895 PORT_DIPSETTING( 0x08, "200000 300000" )
896 */
897 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
898 PORT_DIPSETTING( 0x00, "1" )
899 PORT_DIPSETTING( 0x10, "2" )
900 PORT_DIPSETTING( 0x30, "3" )
901 PORT_DIPSETTING( 0x20, "4" )
902 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
903 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
904 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
905 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
906 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
907 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
908
909 PORT_START /* IN0 */
910 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
911 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
912 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
913 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
914 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
915 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
916 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
917 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
918
919 PORT_START /* IN1 */
920 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_PLAYER2 )
921 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER2 )
922 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_PLAYER2 )
923 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_PLAYER2 )
924 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
925 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
926 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
927 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
928
929 PORT_START /* IN2 */
930 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN3 )
931 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
932 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
933 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
934 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
935 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
936 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
937 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
938 INPUT_PORTS_END
939
940 INPUT_PORTS_START( tnzs )
941 PORT_START /* DSW A */
942 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
943 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
944 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
945 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
946 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
947 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
948 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
949 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
950 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
951 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
952 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
953 PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
954 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
955 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
956 PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
957 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
958 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
959 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
960 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
961 PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
962
963 PORT_START /* DSW B */
964 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
965 PORT_DIPSETTING( 0x02, "Easy" )
966 PORT_DIPSETTING( 0x03, "Medium" )
967 PORT_DIPSETTING( 0x01, "Hard" )
968 PORT_DIPSETTING( 0x00, "Hardest" )
969 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )
970 PORT_DIPSETTING( 0x00, "50000 150000" )
971 PORT_DIPSETTING( 0x0c, "70000 200000" )
972 PORT_DIPSETTING( 0x04, "100000 250000" )
973 PORT_DIPSETTING( 0x08, "200000 300000" )
974 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
975 PORT_DIPSETTING( 0x20, "2" )
976 PORT_DIPSETTING( 0x30, "3" )
977 PORT_DIPSETTING( 0x00, "4" )
978 PORT_DIPSETTING( 0x10, "5" )
979 PORT_DIPNAME( 0x40, 0x40, "Allow Continue" )
980 PORT_DIPSETTING( 0x00, DEF_STR( No ) )
981 PORT_DIPSETTING( 0x40, DEF_STR( Yes ) )
982 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
983 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
984 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
985
986 PORT_START /* IN0 */
987 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
988 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
989 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
990 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
991 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
992 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
993 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
994 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
995
996 PORT_START /* IN1 */
997 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_PLAYER2 )
998 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER2 )
999 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_PLAYER2 )
1000 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_PLAYER2 )
1001 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
1002 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
1003 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1004 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
1005
1006 PORT_START /* IN2 */
1007 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN3 )
1008 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
1009 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
1010 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
1011 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
1012 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
1013 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1014 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1015 INPUT_PORTS_END
1016
1017 INPUT_PORTS_START( tnzsb )
1018 PORT_START /* DSW A */
1019 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
1020 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
1021 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
1022 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
1023 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
1024 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1025 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
1026 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
1027 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1028 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1029 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
1030 PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
1031 PORT_DIPSETTING( 0x10, DEF_STR( 3C_1C ) )
1032 PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) )
1033 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
1034 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
1035 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_2C ) )
1036 PORT_DIPSETTING( 0x80, DEF_STR( 1C_3C ) )
1037 PORT_DIPSETTING( 0x40, DEF_STR( 1C_4C ) )
1038 PORT_DIPSETTING( 0x00, DEF_STR( 1C_6C ) )
1039
1040 PORT_START /* DSW B */
1041 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
1042 PORT_DIPSETTING( 0x02, "Easy" )
1043 PORT_DIPSETTING( 0x03, "Medium" )
1044 PORT_DIPSETTING( 0x01, "Hard" )
1045 PORT_DIPSETTING( 0x00, "Hardest" )
1046 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )
1047 PORT_DIPSETTING( 0x00, "50000 150000" )
1048 PORT_DIPSETTING( 0x0c, "70000 200000" )
1049 PORT_DIPSETTING( 0x04, "100000 250000" )
1050 PORT_DIPSETTING( 0x08, "200000 300000" )
1051 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
1052 PORT_DIPSETTING( 0x20, "2" )
1053 PORT_DIPSETTING( 0x30, "3" )
1054 PORT_DIPSETTING( 0x00, "4" )
1055 PORT_DIPSETTING( 0x10, "5" )
1056 PORT_DIPNAME( 0x40, 0x40, "Allow Continue" )
1057 PORT_DIPSETTING( 0x00, DEF_STR( No ) )
1058 PORT_DIPSETTING( 0x40, DEF_STR( Yes ) )
1059 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
1060 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1061 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1062
1063 PORT_START /* IN0 */
1064 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
1065 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
1066 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
1067 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
1068 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
1069 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
1070 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1071 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
1072
1073 PORT_START /* IN1 */
1074 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_COCKTAIL )
1075 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_COCKTAIL )
1076 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_COCKTAIL )
1077 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_COCKTAIL )
1078 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_COCKTAIL )
1079 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_COCKTAIL )
1080 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1081 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
1082
1083 PORT_START /* IN2 */
1084 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN3 )
1085 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
1086 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
1087 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
1088 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
1089 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
1090 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1091 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1092 INPUT_PORTS_END
1093
1094 INPUT_PORTS_START( tnzs2 )
1095 PORT_START /* DSW A */
1096 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
1097 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
1098 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
1099 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
1100 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
1101 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1102 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
1103 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
1104 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1105 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1106 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
1107 PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
1108 PORT_DIPSETTING( 0x10, DEF_STR( 3C_1C ) )
1109 PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) )
1110 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
1111 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
1112 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_2C ) )
1113 PORT_DIPSETTING( 0x80, DEF_STR( 1C_3C ) )
1114 PORT_DIPSETTING( 0x40, DEF_STR( 1C_4C ) )
1115 PORT_DIPSETTING( 0x00, DEF_STR( 1C_6C ) )
1116
1117 PORT_START /* DSW B */
1118 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
1119 PORT_DIPSETTING( 0x02, "Easy" )
1120 PORT_DIPSETTING( 0x03, "Medium" )
1121 PORT_DIPSETTING( 0x01, "Hard" )
1122 PORT_DIPSETTING( 0x00, "Hardest" )
1123 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )
1124 PORT_DIPSETTING( 0x00, "10000 100000" )
1125 PORT_DIPSETTING( 0x0c, "10000 150000" )
1126 PORT_DIPSETTING( 0x08, "10000 200000" )
1127 PORT_DIPSETTING( 0x04, "10000 300000" )
1128 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
1129 PORT_DIPSETTING( 0x20, "2" )
1130 PORT_DIPSETTING( 0x30, "3" )
1131 PORT_DIPSETTING( 0x00, "4" )
1132 PORT_DIPSETTING( 0x10, "5" )
1133 PORT_DIPNAME( 0x40, 0x40, "Allow Continue" )
1134 PORT_DIPSETTING( 0x00, DEF_STR( No ) )
1135 PORT_DIPSETTING( 0x40, DEF_STR( Yes ) )
1136 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
1137 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1138 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1139
1140 PORT_START /* IN0 */
1141 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
1142 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
1143 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
1144 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
1145 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
1146 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
1147 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1148 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
1149
1150 PORT_START /* IN1 */
1151 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_PLAYER2 )
1152 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER2 )
1153 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_PLAYER2 )
1154 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_PLAYER2 )
1155 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
1156 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
1157 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1158 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
1159
1160 PORT_START /* IN2 */
1161 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN3 )
1162 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
1163 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
1164 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
1165 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
1166 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
1167 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1168 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1169 INPUT_PORTS_END
1170
1171 INPUT_PORTS_START( insectx )
1172 PORT_START /* DSW A */
1173 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
1174 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
1175 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
1176 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
1177 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
1178 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1179 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
1180 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) )
1181 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1182 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
1183 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
1184 PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
1185 PORT_DIPSETTING( 0x10, DEF_STR( 3C_1C ) )
1186 PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) )
1187 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
1188 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
1189 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_2C ) )
1190 PORT_DIPSETTING( 0x80, DEF_STR( 1C_3C ) )
1191 PORT_DIPSETTING( 0x40, DEF_STR( 1C_4C ) )
1192 PORT_DIPSETTING( 0x00, DEF_STR( 1C_6C ) )
1193
1194 PORT_START /* DSW B */
1195 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
1196 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
1197 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1198 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
1199 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
1200 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1201 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
1202 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
1203 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1204 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
1205 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1206 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1207 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
1208 PORT_DIPSETTING( 0x00, "1" )
1209 PORT_DIPSETTING( 0x10, "2" )
1210 PORT_DIPSETTING( 0x30, "3" )
1211 PORT_DIPSETTING( 0x20, "4" )
1212 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
1213 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1214 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1215 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
1216 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1217 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1218
1219 PORT_START /* IN0 */
1220 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
1221 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
1222 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
1223 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
1224 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
1225 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
1226 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1227 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
1228
1229 PORT_START /* IN1 */
1230 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_COCKTAIL )
1231 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_COCKTAIL )
1232 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_COCKTAIL )
1233 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_COCKTAIL )
1234 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_COCKTAIL )
1235 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_COCKTAIL )
1236 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1237 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
1238
1239 PORT_START /* IN2 */
1240 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN3 )
1241 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
1242 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 )
1243 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN1 )
1244 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
1245 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
1246 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1247 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1248 INPUT_PORTS_END
1249
1250 INPUT_PORTS_START( kageki )
1251 PORT_START /* DSW A */
1252 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
1253 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
1254 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
1255 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
1256 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
1257 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1258 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
1259 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) )
1260 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1261 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
1262 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
1263 PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
1264 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
1265 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
1266 PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
1267 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
1268 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
1269 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
1270 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
1271 PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
1272
1273 PORT_START /* DSW B */
1274 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
1275 PORT_DIPSETTING( 0x02, "Easy" )
1276 PORT_DIPSETTING( 0x03, "Medium" )
1277 PORT_DIPSETTING( 0x01, "Hard" )
1278 PORT_DIPSETTING( 0x00, "Hardest" )
1279 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
1280 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
1281 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1282 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
1283 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1284 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1285 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
1286 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
1287 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1288 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
1289 PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
1290 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1291 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
1292 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1293 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1294 PORT_DIPNAME( 0x80, 0x80, "Allow Continue" )
1295 PORT_DIPSETTING( 0x00, DEF_STR( No ) )
1296 PORT_DIPSETTING( 0x80, DEF_STR( Yes ) )
1297
1298 PORT_START /* IN0 */
1299 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
1300 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
1301 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
1302 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
1303 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
1304 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
1305 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1306 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
1307
1308 PORT_START /* IN1 */
1309 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_PLAYER2 )
1310 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER2 )
1311 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_PLAYER2 )
1312 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_PLAYER2 )
1313 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
1314 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
1315 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1316 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
1317
1318 PORT_START /* IN2 */
1319 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN3 )
1320 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
1321 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
1322 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
1323 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
1324 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
1325 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1326 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1327 INPUT_PORTS_END
1328
1329
1330 static struct GfxLayout arkanoi2_charlayout =
1331 {
1332 16,16,
1333 4096,
1334 4,
1335 { 3*4096*32*8, 2*4096*32*8, 1*4096*32*8, 0*4096*32*8 },
1336 { 0, 1, 2, 3, 4, 5, 6, 7,
1337 8*8+0,8*8+1,8*8+2,8*8+3,8*8+4,8*8+5,8*8+6,8*8+7},
1338 { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
1339 16*8, 17*8, 18*8, 19*8, 20*8, 21*8, 22*8, 23*8 },
1340 32*8
1341 };
1342
1343 static struct GfxLayout tnzs_charlayout =
1344 {
1345 16,16,
1346 8192,
1347 4,
1348 { 3*8192*32*8, 2*8192*32*8, 1*8192*32*8, 0*8192*32*8 },
1349 { 0, 1, 2, 3, 4, 5, 6, 7,
1350 8*8+0, 8*8+1, 8*8+2, 8*8+3, 8*8+4, 8*8+5, 8*8+6, 8*8+7 },
1351 { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
1352 16*8, 17*8, 18*8, 19*8, 20*8, 21*8, 22*8, 23*8 },
1353 32*8
1354 };
1355
1356 static struct GfxLayout insectx_charlayout =
1357 {
1358 16,16,
1359 8192,
1360 4,
1361 { 8, 0, 8192*64*8+8, 8192*64*8 },
1362 { 0, 1, 2, 3, 4, 5, 6, 7,
1363 8*16+0, 8*16+1, 8*16+2, 8*16+3, 8*16+4, 8*16+5, 8*16+6, 8*16+7 },
1364 { 0*16, 1*16, 2*16, 3*16, 4*16, 5*16, 6*16, 7*16,
1365 16*16, 17*16, 18*16, 19*16, 20*16, 21*16, 22*16, 23*16 },
1366 64*8
1367 };
1368
1369 static struct GfxDecodeInfo arkanoi2_gfxdecodeinfo[] =
1370 {
1371 { REGION_GFX1, 0, &arkanoi2_charlayout, 0, 32 },
1372 { -1 } /* end of array */
1373 };
1374
1375 static struct GfxDecodeInfo tnzs_gfxdecodeinfo[] =
1376 {
1377 { REGION_GFX1, 0, &tnzs_charlayout, 0, 32 },
1378 { -1 } /* end of array */
1379 };
1380
1381 static struct GfxDecodeInfo insectx_gfxdecodeinfo[] =
1382 {
1383 { REGION_GFX1, 0, &insectx_charlayout, 0, 32 },
1384 { -1 } /* end of array */
1385 };
1386
1387
1388
1389 static struct YM2203interface ym2203_interface =
1390 {
1391 1, /* 1 chip */
1392 3000000, /* 3 MHz ??? */
1393 { YM2203_VOL(30,30) },
1394 { input_port_0_r }, /* DSW1 connected to port A */
1395 { input_port_1_r }, /* DSW2 connected to port B */
1396 { 0 },
1397 { 0 }
1398 };
1399
1400
1401 /* handler called by the 2203 emulator when the internal timers cause an IRQ */
irqhandler(int irq)1402 static void irqhandler(int irq)
1403 {
1404 cpu_set_nmi_line(2,irq ? ASSERT_LINE : CLEAR_LINE);
1405 }
1406
1407 static struct YM2203interface ym2203b_interface =
1408 {
1409 1, /* 1 chip */
1410 3000000, /* 3 MHz ??? */
1411 { YM2203_VOL(100,100) },
1412 { 0 },
1413 { 0 },
1414 { 0 },
1415 { 0 },
1416 { irqhandler }
1417 };
1418
1419 static struct YM2203interface kageki_ym2203_interface =
1420 {
1421 1, /* 1 chip */
1422 3000000, /* 12000000/4 ??? */
1423 { YM2203_VOL(35, 15) },
1424 { kageki_csport_r },
1425 { 0 },
1426 { 0 },
1427 { kageki_csport_w },
1428 };
1429
1430 static struct Samplesinterface samples_interface =
1431 {
1432 1, /* 1 channel */
1433 100 /* volume */
1434 };
1435
1436 static struct CustomSound_interface custom_interface =
1437 {
1438 kageki_init_samples,
1439 0,
1440 0
1441 };
1442
1443
1444 static struct MachineDriver machine_driver_arkanoi2 =
1445 {
1446 /* basic machine hardware */
1447 {
1448 {
1449 CPU_Z80,
1450 8000000, /* ?? Hz (only crystal is 12MHz) */
1451 /* 8MHz is wrong, but extrmatn doesn't work properly at 6MHz */
1452 readmem,writemem,0,0,
1453 tnzs_interrupt,1
1454 },
1455 {
1456 CPU_Z80,
1457 6000000, /* ?? Hz */
1458 sub_readmem,sub_writemem,0,0,
1459 interrupt,1
1460 },
1461 },
1462 60, DEFAULT_60HZ_VBLANK_DURATION, /* video frequency (Hz), duration */
1463 100, /* cpu slices */
1464 tnzs_init_machine,
1465
1466 /* video hardware */
1467 32*8, 32*8, { 0*8, 32*8-1, 2*8, 30*8-1 },
1468 arkanoi2_gfxdecodeinfo,
1469 512, 512,
1470 arkanoi2_vh_convert_color_prom, /* convert color p-roms */
1471
1472 VIDEO_TYPE_RASTER,
1473 0,
1474 tnzs_vh_start,
1475 tnzs_vh_stop,
1476 arkanoi2_vh_screenrefresh,
1477
1478 /* sound hardware */
1479 0,0,0,0,
1480 {
1481 {
1482 SOUND_YM2203,
1483 &ym2203_interface
1484 }
1485 }
1486 };
1487
1488 static struct MachineDriver machine_driver_drtoppel =
1489 {
1490 /* basic machine hardware */
1491 {
1492 {
1493 CPU_Z80,
1494 12000000/2, /* 6.0 MHz ??? - Main board Crystal is 12Mhz */
1495 readmem,writemem,0,0,
1496 tnzs_interrupt,1
1497 },
1498 {
1499 CPU_Z80,
1500 12000000/2, /* 6.0 MHz ??? - Main board Crystal is 12Mhz */
1501 sub_readmem,sub_writemem,0,0,
1502 interrupt,1
1503 },
1504 },
1505 60, DEFAULT_60HZ_VBLANK_DURATION, /* video frequency (Hz), duration */
1506 100, /* cpu slices */
1507 tnzs_init_machine,
1508
1509 /* video hardware */
1510 32*8, 32*8, { 0*8, 32*8-1, 2*8, 30*8-1 },
1511 tnzs_gfxdecodeinfo,
1512 512, 512,
1513 arkanoi2_vh_convert_color_prom, /* convert color bproms */
1514
1515 VIDEO_TYPE_RASTER,
1516 0,
1517 tnzs_vh_start,
1518 tnzs_vh_stop,
1519 arkanoi2_vh_screenrefresh,
1520
1521 /* sound hardware */
1522 0,0,0,0,
1523 {
1524 {
1525 SOUND_YM2203,
1526 &ym2203_interface
1527 }
1528 }
1529 };
1530
1531 static struct MachineDriver machine_driver_tnzs =
1532 {
1533 /* basic machine hardware */
1534 {
1535 {
1536 CPU_Z80,
1537 12000000/2, /* 6.0 MHz ??? - Main board Crystal is 12Mhz */
1538 readmem,writemem,0,0,
1539 tnzs_interrupt,1
1540 },
1541 {
1542 CPU_Z80,
1543 12000000/2, /* 6.0 MHz ??? - Main board Crystal is 12Mhz */
1544 sub_readmem,sub_writemem,0,0,
1545 interrupt,1
1546 }
1547 },
1548 60, DEFAULT_60HZ_VBLANK_DURATION, /* frames per second, vblank duration */
1549 200, /* 100 CPU slices per frame - an high value to ensure proper */
1550 /* synchronization of the CPUs */
1551 tnzs_init_machine,
1552
1553 /* video hardware */
1554 32*8, 32*8, { 0*8, 32*8-1, 2*8, 30*8-1 },
1555 tnzs_gfxdecodeinfo,
1556 512, 512,
1557 0,
1558
1559 VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE,
1560 0,
1561 tnzs_vh_start,
1562 tnzs_vh_stop,
1563 tnzs_vh_screenrefresh,
1564
1565 /* sound hardware */
1566 0,0,0,0,
1567 {
1568 {
1569 SOUND_YM2203,
1570 &ym2203_interface
1571 }
1572 }
1573 };
1574
1575 static struct MachineDriver machine_driver_tnzsb =
1576 {
1577 /* basic machine hardware */
1578 {
1579 {
1580 CPU_Z80,
1581 6000000, /* 6 Mhz(?) */
1582 readmem,writemem,0,0,
1583 tnzs_interrupt,1
1584 },
1585 {
1586 CPU_Z80,
1587 6000000, /* 6 Mhz(?) */
1588 tnzsb_readmem1,tnzsb_writemem1,0,0,
1589 interrupt,1
1590 },
1591 {
1592 CPU_Z80,
1593 4000000, /* 4 Mhz??? */
1594 tnzsb_readmem2,tnzsb_writemem2,tnzsb_readport,tnzsb_writeport,
1595 ignore_interrupt,1
1596 }
1597 },
1598 60, DEFAULT_60HZ_VBLANK_DURATION, /* frames per second, vblank duration */
1599 200, /* 100 CPU slices per frame - an high value to ensure proper */
1600 /* synchronization of the CPUs */
1601 tnzs_init_machine,
1602
1603 /* video hardware */
1604 32*8, 32*8, { 0*8, 32*8-1, 2*8, 30*8-1 },
1605 tnzs_gfxdecodeinfo,
1606 512, 512,
1607 0,
1608
1609 VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE,
1610 0,
1611 tnzs_vh_start,
1612 tnzs_vh_stop,
1613 tnzs_vh_screenrefresh,
1614
1615 /* sound hardware */
1616 0,0,0,0,
1617 {
1618 {
1619 SOUND_YM2203,
1620 &ym2203b_interface
1621 }
1622 }
1623 };
1624
1625 static struct MachineDriver machine_driver_insectx =
1626 {
1627 /* basic machine hardware */
1628 {
1629 {
1630 CPU_Z80,
1631 6000000, /* 6 Mhz(?) */
1632 readmem,writemem,0,0,
1633 tnzs_interrupt,1
1634 },
1635 {
1636 CPU_Z80,
1637 6000000, /* 6 Mhz(?) */
1638 sub_readmem,sub_writemem,0,0,
1639 interrupt,1
1640 }
1641 },
1642 60, DEFAULT_60HZ_VBLANK_DURATION, /* frames per second, vblank duration */
1643 200, /* 100 CPU slices per frame - an high value to ensure proper */
1644 /* synchronization of the CPUs */
1645 tnzs_init_machine,
1646
1647 /* video hardware */
1648 32*8, 32*8, { 0*8, 32*8-1, 2*8, 30*8-1 },
1649 insectx_gfxdecodeinfo,
1650 512, 512,
1651 0,
1652
1653 VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE,
1654 0,
1655 tnzs_vh_start,
1656 tnzs_vh_stop,
1657 tnzs_vh_screenrefresh,
1658
1659 /* sound hardware */
1660 0,0,0,0,
1661 {
1662 {
1663 SOUND_YM2203,
1664 &ym2203_interface
1665 }
1666 }
1667 };
1668
1669 static struct MachineDriver machine_driver_kageki =
1670 {
1671 {
1672 {
1673 CPU_Z80,
1674 6000000, /* 12000000/2 ??? */
1675 readmem, writemem, 0, 0,
1676 tnzs_interrupt, 1
1677 },
1678 {
1679 CPU_Z80,
1680 4000000, /* 12000000/3 ??? */
1681 kageki_sub_readmem, kageki_sub_writemem, 0, 0,
1682 interrupt, 1
1683 }
1684 },
1685 60, DEFAULT_60HZ_VBLANK_DURATION, /* frames per second, vblank duration */
1686 200, /* 200 CPU slices per frame - an high value to ensure proper */
1687 /* synchronization of the CPUs */
1688 tnzs_init_machine,
1689
1690 /* video hardware */
1691 32*8, 32*8, { 0*8, 32*8-1, 2*8, 30*8-1 },
1692 tnzs_gfxdecodeinfo,
1693 512, 512,
1694 0,
1695
1696 VIDEO_TYPE_RASTER|VIDEO_MODIFIES_PALETTE,
1697 0,
1698 tnzs_vh_start,
1699 tnzs_vh_stop,
1700 tnzs_vh_screenrefresh,
1701
1702 /* sound hardware */
1703 0, 0, 0, 0,
1704 {
1705 {
1706 SOUND_YM2203,
1707 &kageki_ym2203_interface
1708 },
1709 {
1710 SOUND_SAMPLES,
1711 &samples_interface
1712 },
1713 {
1714 SOUND_CUSTOM,
1715 &custom_interface
1716 }
1717 }
1718 };
1719
1720
1721
1722 /***************************************************************************
1723
1724 Game driver(s)
1725
1726 ***************************************************************************/
1727
1728 ROM_START( extrmatn )
1729 ROM_REGION( 0x30000, REGION_CPU1 ) /* Region 0 - main cpu */
1730 ROM_LOAD( "b06-20.bin", 0x00000, 0x08000, 0x04e3fc1f )
1731 ROM_CONTINUE( 0x18000, 0x08000 ) /* banked at 8000-bfff */
1732 ROM_LOAD( "b06-21.bin", 0x20000, 0x10000, 0x1614d6a2 ) /* banked at 8000-bfff */
1733
1734 ROM_REGION( 0x18000, REGION_CPU2 ) /* Region 2 - sound cpu */
1735 ROM_LOAD( "b06-06.bin", 0x00000, 0x08000, 0x744f2c84 )
1736 ROM_CONTINUE( 0x10000, 0x08000 ) /* banked at 8000-9fff */
1737
1738 ROM_REGION( 0x80000, REGION_GFX1 | REGIONFLAG_DISPOSE )
1739 ROM_LOAD( "b06-01.bin", 0x00000, 0x20000, 0xd2afbf7e )
1740 ROM_LOAD( "b06-02.bin", 0x20000, 0x20000, 0xe0c2757a )
1741 ROM_LOAD( "b06-03.bin", 0x40000, 0x20000, 0xee80ab9d )
1742 ROM_LOAD( "b06-04.bin", 0x60000, 0x20000, 0x3697ace4 )
1743
1744 ROM_REGION( 0x0400, REGION_PROMS )
1745 ROM_LOAD( "b06-09.bin", 0x00000, 0x200, 0xf388b361 ) /* hi bytes */
1746 ROM_LOAD( "b06-08.bin", 0x00200, 0x200, 0x10c9aac3 ) /* lo bytes */
1747 ROM_END
1748
1749 ROM_START( arkanoi2 )
1750 ROM_REGION( 0x30000, REGION_CPU1 ) /* Region 0 - main cpu */
1751 ROM_LOAD( "a2-05.rom", 0x00000, 0x08000, 0x136edf9d )
1752 ROM_CONTINUE( 0x18000, 0x08000 ) /* banked at 8000-bfff */
1753 /* 20000-2ffff empty */
1754
1755 ROM_REGION( 0x18000, REGION_CPU2 ) /* Region 2 - sound cpu */
1756 ROM_LOAD( "a2-13.rom", 0x00000, 0x08000, 0xe8035ef1 )
1757 ROM_CONTINUE( 0x10000, 0x08000 ) /* banked at 8000-9fff */
1758
1759 ROM_REGION( 0x80000, REGION_GFX1 | REGIONFLAG_DISPOSE )
1760 ROM_LOAD( "a2-m01.bin", 0x00000, 0x20000, 0x2ccc86b4 )
1761 ROM_LOAD( "a2-m02.bin", 0x20000, 0x20000, 0x056a985f )
1762 ROM_LOAD( "a2-m03.bin", 0x40000, 0x20000, 0x274a795f )
1763 ROM_LOAD( "a2-m04.bin", 0x60000, 0x20000, 0x9754f703 )
1764
1765 ROM_REGION( 0x0400, REGION_PROMS )
1766 ROM_LOAD( "b08-08.bin", 0x00000, 0x200, 0xa4f7ebd9 ) /* hi bytes */
1767 ROM_LOAD( "b08-07.bin", 0x00200, 0x200, 0xea34d9f7 ) /* lo bytes */
1768 ROM_END
1769
1770 ROM_START( ark2us )
1771 ROM_REGION( 0x30000, REGION_CPU1 ) /* Region 0 - main cpu */
1772 ROM_LOAD( "b08-11.bin", 0x00000, 0x08000, 0x99555231 )
1773 ROM_CONTINUE( 0x18000, 0x08000 ) /* banked at 8000-bfff */
1774 /* 20000-2ffff empty */
1775
1776 ROM_REGION( 0x18000, REGION_CPU2 ) /* Region 2 - sound cpu */
1777 ROM_LOAD( "b08-12.bin", 0x00000, 0x08000, 0xdc84e27d )
1778 ROM_CONTINUE( 0x10000, 0x08000 ) /* banked at 8000-9fff */
1779
1780 ROM_REGION( 0x80000, REGION_GFX1 | REGIONFLAG_DISPOSE )
1781 ROM_LOAD( "a2-m01.bin", 0x00000, 0x20000, 0x2ccc86b4 )
1782 ROM_LOAD( "a2-m02.bin", 0x20000, 0x20000, 0x056a985f )
1783 ROM_LOAD( "a2-m03.bin", 0x40000, 0x20000, 0x274a795f )
1784 ROM_LOAD( "a2-m04.bin", 0x60000, 0x20000, 0x9754f703 )
1785
1786 ROM_REGION( 0x0400, REGION_PROMS )
1787 ROM_LOAD( "b08-08.bin", 0x00000, 0x200, 0xa4f7ebd9 ) /* hi bytes */
1788 ROM_LOAD( "b08-07.bin", 0x00200, 0x200, 0xea34d9f7 ) /* lo bytes */
1789 ROM_END
1790
1791 ROM_START( ark2jp )
1792 ROM_REGION( 0x30000, REGION_CPU1 ) /* Region 0 - main cpu */
1793 ROM_LOAD( "a2-05.rom", 0x00000, 0x08000, 0x136edf9d )
1794 ROM_CONTINUE( 0x18000, 0x08000 ) /* banked at 8000-bfff */
1795 /* 20000-2ffff empty */
1796
1797 ROM_REGION( 0x18000, REGION_CPU2 ) /* Region 2 - sound cpu */
1798 ROM_LOAD( "b08-06", 0x00000, 0x08000, 0xadfcd40c )
1799 ROM_CONTINUE( 0x10000, 0x08000 ) /* banked at 8000-9fff */
1800
1801 ROM_REGION( 0x80000, REGION_GFX1 | REGIONFLAG_DISPOSE )
1802 ROM_LOAD( "a2-m01.bin", 0x00000, 0x20000, 0x2ccc86b4 )
1803 ROM_LOAD( "a2-m02.bin", 0x20000, 0x20000, 0x056a985f )
1804 ROM_LOAD( "a2-m03.bin", 0x40000, 0x20000, 0x274a795f )
1805 ROM_LOAD( "a2-m04.bin", 0x60000, 0x20000, 0x9754f703 )
1806
1807 ROM_REGION( 0x0400, REGION_PROMS )
1808 ROM_LOAD( "b08-08.bin", 0x00000, 0x200, 0xa4f7ebd9 ) /* hi bytes */
1809 ROM_LOAD( "b08-07.bin", 0x00200, 0x200, 0xea34d9f7 ) /* lo bytes */
1810 ROM_END
1811
1812 ROM_START( plumppop )
1813 ROM_REGION( 0x30000, REGION_CPU1 ) /* 64k + bankswitch areas for the first CPU */
1814 ROM_LOAD( "a98-09.bin", 0x00000, 0x08000, 0x107f9e06 )
1815 ROM_CONTINUE( 0x18000, 0x08000 ) /* banked at 8000-bfff */
1816 ROM_LOAD( "a98-10.bin", 0x20000, 0x10000, 0xdf6e6af2 ) /* banked at 8000-bfff */
1817
1818 ROM_REGION( 0x18000, REGION_CPU2 ) /* 64k for the second CPU */
1819 ROM_LOAD( "a98-11.bin", 0x00000, 0x08000, 0xbc56775c )
1820 ROM_CONTINUE( 0x10000, 0x08000 ) /* banked at 8000-9fff */
1821
1822 ROM_REGION( 0x100000, REGION_GFX1 | REGIONFLAG_DISPOSE )
1823 ROM_LOAD( "a98-01.bin", 0x00000, 0x10000, 0xf3033dca )
1824 ROM_RELOAD( 0x10000, 0x10000 )
1825 ROM_LOAD( "a98-02.bin", 0x20000, 0x10000, 0xf2d17b0c )
1826 ROM_RELOAD( 0x30000, 0x10000 )
1827 ROM_LOAD( "a98-03.bin", 0x40000, 0x10000, 0x1a519b0a )
1828 ROM_RELOAD( 0x40000, 0x10000 )
1829 ROM_LOAD( "a98-04.bin", 0x60000, 0x10000, 0xb64501a1 )
1830 ROM_RELOAD( 0x70000, 0x10000 )
1831 ROM_LOAD( "a98-05.bin", 0x80000, 0x10000, 0x45c36963 )
1832 ROM_RELOAD( 0x90000, 0x10000 )
1833 ROM_LOAD( "a98-06.bin", 0xa0000, 0x10000, 0xe075341b )
1834 ROM_RELOAD( 0xb0000, 0x10000 )
1835 ROM_LOAD( "a98-07.bin", 0xc0000, 0x10000, 0x8e16cd81 )
1836 ROM_RELOAD( 0xd0000, 0x10000 )
1837 ROM_LOAD( "a98-08.bin", 0xe0000, 0x10000, 0xbfa7609a )
1838 ROM_RELOAD( 0xf0000, 0x10000 )
1839
1840 ROM_REGION( 0x0400, REGION_PROMS ) /* color proms */
1841 ROM_LOAD( "a98-13.bpr", 0x0000, 0x200, 0x7cde2da5 ) /* hi bytes */
1842 ROM_LOAD( "a98-12.bpr", 0x0200, 0x200, 0x90dc9da7 ) /* lo bytes */
1843 ROM_END
1844
1845 ROM_START( drtoppel )
1846 ROM_REGION( 0x30000, REGION_CPU1 ) /* 64k + bankswitch areas for the first CPU */
1847 ROM_LOAD( "b19-09.bin", 0x00000, 0x08000, 0x3e654f82 )
1848 ROM_CONTINUE( 0x18000, 0x08000 ) /* banked at 8000-bfff */
1849 ROM_LOAD( "b19-10.bin", 0x20000, 0x10000, 0x7e72fd25 ) /* banked at 8000-bfff */
1850
1851 ROM_REGION( 0x18000, REGION_CPU2 ) /* 64k for the second CPU */
1852 ROM_LOAD( "b19-11.bin", 0x00000, 0x08000, 0x524dc249 )
1853 ROM_CONTINUE( 0x10000, 0x08000 ) /* banked at 8000-9fff */
1854
1855 ROM_REGION( 0x100000, REGION_GFX1 | REGIONFLAG_DISPOSE )
1856 ROM_LOAD( "b19-01.bin", 0x00000, 0x20000, 0xa7e8a0c1 )
1857 ROM_LOAD( "b19-02.bin", 0x20000, 0x20000, 0x790ae654 )
1858 ROM_LOAD( "b19-03.bin", 0x40000, 0x20000, 0x495c4c5a )
1859 ROM_LOAD( "b19-04.bin", 0x60000, 0x20000, 0x647007a0 )
1860 ROM_LOAD( "b19-05.bin", 0x80000, 0x20000, 0x49f2b1a5 )
1861 ROM_LOAD( "b19-06.bin", 0xa0000, 0x20000, 0x2d39f1d0 )
1862 ROM_LOAD( "b19-07.bin", 0xc0000, 0x20000, 0x8bb06f41 )
1863 ROM_LOAD( "b19-08.bin", 0xe0000, 0x20000, 0x3584b491 )
1864
1865 ROM_REGION( 0x0400, REGION_PROMS ) /* color proms */
1866 ROM_LOAD( "b19-13.bin", 0x0000, 0x200, 0x6a547980 ) /* hi bytes */
1867 ROM_LOAD( "b19-12.bin", 0x0200, 0x200, 0x5754e9d8 ) /* lo bytes */
1868 ROM_END
1869
1870 ROM_START( chukatai )
1871 ROM_REGION( 0x30000, REGION_CPU1 ) /* 64k + bankswitch areas for the first CPU */
1872 ROM_LOAD( "b44.10", 0x00000, 0x08000, 0x8c69e008 )
1873 ROM_CONTINUE( 0x18000, 0x08000 ) /* banked at 8000-bfff */
1874 ROM_LOAD( "b44.11", 0x20000, 0x10000, 0x32484094 ) /* banked at 8000-bfff */
1875
1876 ROM_REGION( 0x18000, REGION_CPU2 ) /* 64k for the second CPU */
1877 ROM_LOAD( "b44.12", 0x00000, 0x08000, 0x0600ace6 )
1878 ROM_CONTINUE( 0x10000, 0x08000 ) /* banked at 8000-9fff */
1879
1880 ROM_REGION( 0x100000, REGION_GFX1 | REGIONFLAG_DISPOSE )
1881 ROM_LOAD( "b44-01.a13", 0x00000, 0x20000, 0xaae7b3d5 )
1882 ROM_LOAD( "b44-02.a12", 0x20000, 0x20000, 0x7f0b9568 )
1883 ROM_LOAD( "b44-03.a10", 0x40000, 0x20000, 0x5a54a3b9 )
1884 ROM_LOAD( "b44-04.a08", 0x60000, 0x20000, 0x3c5f544b )
1885 ROM_LOAD( "b44-05.a07", 0x80000, 0x20000, 0xd1b7e314 )
1886 ROM_LOAD( "b44-06.a05", 0xa0000, 0x20000, 0x269978a8 )
1887 ROM_LOAD( "b44-07.a04", 0xc0000, 0x20000, 0x3e0e737e )
1888 ROM_LOAD( "b44-08.a02", 0xe0000, 0x20000, 0x6cb1e8fc )
1889 ROM_END
1890
1891 ROM_START( tnzs )
1892 ROM_REGION( 0x30000, REGION_CPU1 ) /* 64k + bankswitch areas for the first CPU */
1893 ROM_LOAD( "nzsb5310.bin", 0x00000, 0x08000, 0xa73745c6 )
1894 ROM_CONTINUE( 0x18000, 0x18000 ) /* banked at 8000-bfff */
1895
1896 ROM_REGION( 0x18000, REGION_CPU2 ) /* 64k for the second CPU */
1897 ROM_LOAD( "nzsb5311.bin", 0x00000, 0x08000, 0x9784d443 )
1898 ROM_CONTINUE( 0x10000, 0x08000 ) /* banked at 8000-9fff */
1899
1900 ROM_REGION( 0x100000, REGION_GFX1 | REGIONFLAG_DISPOSE )
1901 /* ROMs taken from another set (the ones from this set were read incorrectly) */
1902 ROM_LOAD( "nzsb5316.bin", 0x00000, 0x20000, 0xc3519c2a )
1903 ROM_LOAD( "nzsb5317.bin", 0x20000, 0x20000, 0x2bf199e8 )
1904 ROM_LOAD( "nzsb5318.bin", 0x40000, 0x20000, 0x92f35ed9 )
1905 ROM_LOAD( "nzsb5319.bin", 0x60000, 0x20000, 0xedbb9581 )
1906 ROM_LOAD( "nzsb5322.bin", 0x80000, 0x20000, 0x59d2aef6 )
1907 ROM_LOAD( "nzsb5323.bin", 0xa0000, 0x20000, 0x74acfb9b )
1908 ROM_LOAD( "nzsb5320.bin", 0xc0000, 0x20000, 0x095d0dc0 )
1909 ROM_LOAD( "nzsb5321.bin", 0xe0000, 0x20000, 0x9800c54d )
1910 ROM_END
1911
1912 ROM_START( tnzsb )
1913 ROM_REGION( 0x30000, REGION_CPU1 ) /* 64k + bankswitch areas for the first CPU */
1914 ROM_LOAD( "nzsb5324.bin", 0x00000, 0x08000, 0xd66824c6 )
1915 ROM_CONTINUE( 0x18000, 0x18000 ) /* banked at 8000-bfff */
1916
1917 ROM_REGION( 0x18000, REGION_CPU2 ) /* 64k for the second CPU */
1918 ROM_LOAD( "nzsb5325.bin", 0x00000, 0x08000, 0xd6ac4e71 )
1919 ROM_CONTINUE( 0x10000, 0x08000 ) /* banked at 8000-9fff */
1920
1921 ROM_REGION( 0x10000, REGION_CPU3 ) /* 64k for the third CPU */
1922 ROM_LOAD( "nzsb5326.bin", 0x00000, 0x10000, 0xcfd5649c )
1923
1924 ROM_REGION( 0x100000, REGION_GFX1 | REGIONFLAG_DISPOSE )
1925 /* ROMs taken from another set (the ones from this set were read incorrectly) */
1926 ROM_LOAD( "nzsb5316.bin", 0x00000, 0x20000, 0xc3519c2a )
1927 ROM_LOAD( "nzsb5317.bin", 0x20000, 0x20000, 0x2bf199e8 )
1928 ROM_LOAD( "nzsb5318.bin", 0x40000, 0x20000, 0x92f35ed9 )
1929 ROM_LOAD( "nzsb5319.bin", 0x60000, 0x20000, 0xedbb9581 )
1930 ROM_LOAD( "nzsb5322.bin", 0x80000, 0x20000, 0x59d2aef6 )
1931 ROM_LOAD( "nzsb5323.bin", 0xa0000, 0x20000, 0x74acfb9b )
1932 ROM_LOAD( "nzsb5320.bin", 0xc0000, 0x20000, 0x095d0dc0 )
1933 ROM_LOAD( "nzsb5321.bin", 0xe0000, 0x20000, 0x9800c54d )
1934 ROM_END
1935
1936 ROM_START( tnzs2 )
1937 ROM_REGION( 0x30000, REGION_CPU1 ) /* 64k + bankswitch areas for the first CPU */
1938 ROM_LOAD( "ns_c-11.rom", 0x00000, 0x08000, 0x3c1dae7b )
1939 ROM_CONTINUE( 0x18000, 0x18000 ) /* banked at 8000-bfff */
1940
1941 ROM_REGION( 0x18000, REGION_CPU2 ) /* 64k for the second CPU */
1942 ROM_LOAD( "ns_e-3.rom", 0x00000, 0x08000, 0xc7662e96 )
1943 ROM_CONTINUE( 0x10000, 0x08000 )
1944
1945 ROM_REGION( 0x100000, REGION_GFX1 | REGIONFLAG_DISPOSE )
1946 ROM_LOAD( "ns_a13.rom", 0x00000, 0x20000, 0x7e0bd5bb )
1947 ROM_LOAD( "ns_a12.rom", 0x20000, 0x20000, 0x95880726 )
1948 ROM_LOAD( "ns_a10.rom", 0x40000, 0x20000, 0x2bc4c053 )
1949 ROM_LOAD( "ns_a08.rom", 0x60000, 0x20000, 0x8ff8d88c )
1950 ROM_LOAD( "ns_a07.rom", 0x80000, 0x20000, 0x291bcaca )
1951 ROM_LOAD( "ns_a05.rom", 0xa0000, 0x20000, 0x6e762e20 )
1952 ROM_LOAD( "ns_a04.rom", 0xc0000, 0x20000, 0xe1fd1b9d )
1953 ROM_LOAD( "ns_a02.rom", 0xe0000, 0x20000, 0x2ab06bda )
1954 ROM_END
1955
1956 ROM_START( insectx )
1957 ROM_REGION( 0x30000, REGION_CPU1 ) /* 64k + bankswitch areas for the first CPU */
1958 ROM_LOAD( "insector.u32", 0x00000, 0x08000, 0x18eef387 )
1959 ROM_CONTINUE( 0x18000, 0x18000 ) /* banked at 8000-bfff */
1960
1961 ROM_REGION( 0x18000, REGION_CPU2 ) /* 64k for the second CPU */
1962 ROM_LOAD( "insector.u38", 0x00000, 0x08000, 0x324b28c9 )
1963 ROM_CONTINUE( 0x10000, 0x08000 ) /* banked at 8000-9fff */
1964
1965 ROM_REGION( 0x100000, REGION_GFX1 | REGIONFLAG_DISPOSE )
1966 ROM_LOAD( "insector.r15", 0x00000, 0x80000, 0xd00294b1 )
1967 ROM_LOAD( "insector.r16", 0x80000, 0x80000, 0xdb5a7434 )
1968 ROM_END
1969
1970 ROM_START( kageki )
1971 ROM_REGION( 0x30000, REGION_CPU1 )
1972 ROM_LOAD( "b35-16.11c", 0x00000, 0x08000, 0xa4e6fd58 ) /* US ver */
1973 ROM_CONTINUE( 0x18000, 0x08000 )
1974 ROM_LOAD( "b35-10.9c", 0x20000, 0x10000, 0xb150457d )
1975
1976 ROM_REGION( 0x18000, REGION_CPU2 )
1977 ROM_LOAD( "b35-17.43e", 0x00000, 0x08000, 0xfdd9c246 ) /* US ver */
1978 ROM_CONTINUE( 0x10000, 0x08000 )
1979
1980 ROM_REGION( 0x100000, REGION_GFX1 | REGIONFLAG_DISPOSE )
1981 ROM_LOAD( "b35-01.13a", 0x00000, 0x20000, 0x01d83a69 )
1982 ROM_LOAD( "b35-02.12a", 0x20000, 0x20000, 0xd8af47ac )
1983 ROM_LOAD( "b35-03.10a", 0x40000, 0x20000, 0x3cb68797 )
1984 ROM_LOAD( "b35-04.8a", 0x60000, 0x20000, 0x71c03f91 )
1985 ROM_LOAD( "b35-05.7a", 0x80000, 0x20000, 0xa4e20c08 )
1986 ROM_LOAD( "b35-06.5a", 0xa0000, 0x20000, 0x3f8ab658 )
1987 ROM_LOAD( "b35-07.4a", 0xc0000, 0x20000, 0x1b4af049 )
1988 ROM_LOAD( "b35-08.2a", 0xe0000, 0x20000, 0xdeb2268c )
1989
1990 ROM_REGION( 0x10000, REGION_SOUND1 ) /* samples */
1991 ROM_LOAD( "b35-15.98g", 0x00000, 0x10000, 0xe6212a0f ) /* US ver */
1992 ROM_END
1993
1994 ROM_START( kagekij )
1995 ROM_REGION( 0x30000, REGION_CPU1 )
1996 ROM_LOAD( "b35-09j.11c", 0x00000, 0x08000, 0x829637d5 ) /* JP ver */
1997 ROM_CONTINUE( 0x18000, 0x08000 )
1998 ROM_LOAD( "b35-10.9c", 0x20000, 0x10000, 0xb150457d )
1999
2000 ROM_REGION( 0x18000, REGION_CPU2 )
2001 ROM_LOAD( "b35-11j.43e", 0x00000, 0x08000, 0x64d093fc ) /* JP ver */
2002 ROM_CONTINUE( 0x10000, 0x08000 )
2003
2004 ROM_REGION( 0x100000, REGION_GFX1 | REGIONFLAG_DISPOSE )
2005 ROM_LOAD( "b35-01.13a", 0x00000, 0x20000, 0x01d83a69 )
2006 ROM_LOAD( "b35-02.12a", 0x20000, 0x20000, 0xd8af47ac )
2007 ROM_LOAD( "b35-03.10a", 0x40000, 0x20000, 0x3cb68797 )
2008 ROM_LOAD( "b35-04.8a", 0x60000, 0x20000, 0x71c03f91 )
2009 ROM_LOAD( "b35-05.7a", 0x80000, 0x20000, 0xa4e20c08 )
2010 ROM_LOAD( "b35-06.5a", 0xa0000, 0x20000, 0x3f8ab658 )
2011 ROM_LOAD( "b35-07.4a", 0xc0000, 0x20000, 0x1b4af049 )
2012 ROM_LOAD( "b35-08.2a", 0xe0000, 0x20000, 0xdeb2268c )
2013
2014 ROM_REGION( 0x10000, REGION_SOUND1 ) /* samples */
2015 ROM_LOAD( "b35-12j.98g", 0x00000, 0x10000, 0x184409f1 ) /* JP ver */
2016 ROM_END
2017
2018
2019
2020 GAME( 1987, extrmatn, 0, arkanoi2, extrmatn, extrmatn, ROT270, "[Taito] World Games", "Extermination (US)" )
2021 GAME( 1987, arkanoi2, 0, arkanoi2, arkanoi2, arkanoi2, ROT270, "Taito Corporation Japan", "Arkanoid - Revenge of DOH (World)" )
2022 GAME( 1987, ark2us, arkanoi2, arkanoi2, ark2us, arkanoi2, ROT270, "Taito America Corporation (Romstar license)", "Arkanoid - Revenge of DOH (US)" )
2023 GAME( 1987, ark2jp, arkanoi2, arkanoi2, ark2us, arkanoi2, ROT270, "Taito Corporation", "Arkanoid - Revenge of DOH (Japan)" )
2024 GAME( 1987, plumppop, 0, drtoppel, plumppop, drtoppel, ROT0, "Taito Corporation", "Plump Pop (Japan)" )
2025 GAME( 1987, drtoppel, 0, drtoppel, drtoppel, drtoppel, ROT90, "Taito Corporation", "Dr. Toppel's Tankentai (Japan)" )
2026 GAME( 1988, chukatai, 0, tnzs, chukatai, chukatai, ROT0, "Taito Corporation", "Chuka Taisen (Japan)" )
2027 GAME( 1988, tnzs, 0, tnzs, tnzs, tnzs, ROT0, "Taito Corporation", "The NewZealand Story (Japan)" )
2028 GAME( 1988, tnzsb, tnzs, tnzsb, tnzsb, tnzs, ROT0, "bootleg", "The NewZealand Story (World, bootleg)" )
2029 GAME( 1988, tnzs2, tnzs, tnzs, tnzs2, tnzs, ROT0, "Taito Corporation Japan", "The NewZealand Story 2 (World)" )
2030 GAME( 1989, insectx, 0, insectx, insectx, insectx, ROT0, "Taito Corporation Japan", "Insector X (World)" )
2031 GAME( 1988, kageki, 0, kageki, kageki, kageki, ROT90, "Taito America Corporation (Romstar license)", "Kageki (US)" )
2032 GAME( 1988, kagekij, kageki, kageki, kageki, kageki, ROT90, "Taito Corporation", "Kageki (Japan)" )
2033