1 /***************************************************************************
2 
3 Green Beret memory map (preliminary)
4 
5 gberetb is a bootleg hacked to run on different hardware.
6 
7 driver by Nicola Salmoria
8 
9 correct rom naming information by Belgium Dump Team (17/06/2003).
10 
11 0000-bfff ROM
12 c000-c7ff Color RAM
13 c800-cfff Video RAM
14 d000-d0c0 Sprites (bank 0)
15 d100-d1c0 Sprites (bank 1)
16 d200-dfff RAM
17 e000-e01f ZRAM1 line scroll registers
18 e020-e03f ZRAM2 bit 8 of line scroll registers
19 
20 read:
21 f200      DSW1
22           bit 0-1 lives
23           bit 2   cocktail/upright cabinet (0 = upright)
24           bit 3-4 bonus
25           bit 5-6 difficulty
26           bit 7   demo sounds
27 f400      DSW2
28           bit 0 = screen flip
29           bit 1 = single/dual upright controls
30 f600      DSW0
31           bit 0-1-2-3 coins per play Coin1
32           bit 4-5-6-7 coins per play Coin2
33 f601      IN1 player 2 controls
34 f602      IN0 player 1 controls
35 f603      IN2
36           bit 0-1-2 coin  bit 3 1 player start  bit 4 2 players start
37 
38 write:
39 e040      ?
40 e041      ?
41 e042      ?
42 e043      bit 3 = sprite RAM bank select; other bits = ?
43 e044      bit 0 = nmi enable, bit 3 = flip screen, other bits = ?
44 f000      ?
45 f200      SN76496 command
46 f400      SN76496 trigger (write command to f200, then write to this location
47           to cause the chip to read it)
48 f600      watchdog reset (?)
49 
50 interrupts:
51 The game uses both IRQ (mode 1) and NMI.
52 
53 
54 TODO:
55 gberetb:
56 - cocktail mode
57 mrgoemon:
58 - flickering rogue sprites
59 - it resets during the first boot sequence, but works afterwards
60 
61 ***************************************************************************/
62 
63 #include "driver.h"
64 #include "vidhrdw/generic.h"
65 
66 
67 
68 extern unsigned char *gberet_videoram,*gberet_colorram;
69 extern unsigned char *gberet_spritebank;
70 extern unsigned char *gberet_scrollram;
71 WRITE_HANDLER( gberet_videoram_w );
72 WRITE_HANDLER( gberet_colorram_w );
73 WRITE_HANDLER( gberet_e044_w );
74 WRITE_HANDLER( gberet_scroll_w );
75 WRITE_HANDLER( gberetb_scroll_w );
76 PALETTE_INIT( gberet );
77 VIDEO_START( gberet );
78 VIDEO_UPDATE( gberet );
79 VIDEO_UPDATE( gberetb );
80 
81 INTERRUPT_GEN( gberet_interrupt );
82 
83 
WRITE_HANDLER(gberet_coincounter_w)84 static WRITE_HANDLER( gberet_coincounter_w )
85 {
86 	/* bits 0/1 = coin counters */
87 	coin_counter_w(0,data & 1);
88 	coin_counter_w(1,data & 2);
89 }
90 
WRITE_HANDLER(mrgoemon_bankswitch_w)91 static WRITE_HANDLER( mrgoemon_bankswitch_w )
92 {
93 	unsigned char *RAM = memory_region(REGION_CPU1);
94 	int offs;
95 
96 	/* bits 0/1 = coin counters */
97 	coin_counter_w(0,data & 1);
98 	coin_counter_w(1,data & 2);
99 
100 	/* bits 5-7 = ROM bank select */
101 	offs = 0x10000 + ((data & 0xe0) >> 5) * 0x800;
102 	cpu_setbank(1,&RAM[offs]);
103 }
104 
105 
106 
MEMORY_READ_START(readmem)107 static MEMORY_READ_START( readmem )
108 	{ 0x0000, 0xbfff, MRA_ROM },
109 	{ 0xc000, 0xe03f, MRA_RAM },
110 	{ 0xf200, 0xf200, input_port_4_r },	/* DSW1 */
111 	{ 0xf400, 0xf400, input_port_5_r },	/* DSW2 */
112 	{ 0xf600, 0xf600, input_port_3_r },	/* DSW0 */
113 	{ 0xf601, 0xf601, input_port_1_r },	/* IN1 */
114 	{ 0xf602, 0xf602, input_port_0_r },	/* IN0 */
115 	{ 0xf603, 0xf603, input_port_2_r },	/* IN2 */
116 	{ 0xf800, 0xf800, MRA_NOP },	/* gberetb only - IRQ acknowledge */
117 MEMORY_END
118 
119 static MEMORY_WRITE_START( writemem )
120 	{ 0x0000, 0xbfff, MWA_ROM },
121 	{ 0xc000, 0xc7ff, gberet_colorram_w, &gberet_colorram },
122 	{ 0xc800, 0xcfff, gberet_videoram_w, &gberet_videoram },
123 	{ 0xd000, 0xd0bf, MWA_RAM, &spriteram_2 },
124 	{ 0xd100, 0xd1bf, MWA_RAM, &spriteram, &spriteram_size },
125 	{ 0xd200, 0xdfff, MWA_RAM },
126 	{ 0xe000, 0xe03f, gberet_scroll_w, &gberet_scrollram },
127 	{ 0xe043, 0xe043, MWA_RAM, &gberet_spritebank },
128 	{ 0xe044, 0xe044, gberet_e044_w },
129 	{ 0xf000, 0xf000, gberet_coincounter_w },
130 	{ 0xf200, 0xf200, MWA_NOP },		/* Loads the snd command into the snd latch */
131 	{ 0xf400, 0xf400, SN76496_0_w },	/* This address triggers the SN chip to read the data port. */
132 //	{ 0xf600, 0xf600, MWA_NOP },
133 MEMORY_END
134 
135 static MEMORY_WRITE_START( gberetb_writemem )
136 	{ 0x0000, 0xbfff, MWA_ROM },
137 	{ 0xc000, 0xc7ff, gberet_colorram_w, &gberet_colorram },
138 	{ 0xc800, 0xcfff, gberet_videoram_w, &gberet_videoram },
139 	{ 0xd000, 0xd0ff, MWA_RAM },
140 	{ 0xd100, 0xd1ff, MWA_RAM },
141 	{ 0xd200, 0xdfff, MWA_RAM },
142 	{ 0xe000, 0xe03f, MWA_RAM },
143 //	{ 0xe800, 0xe8ff, MWA_RAM },
144 	{ 0xe900, 0xe9ff, MWA_RAM, &spriteram, &spriteram_size },
145 	{ 0xf800, 0xf800, MWA_NOP },	/* NMI acknowledge */
146 	{ 0xf900, 0xf901, gberetb_scroll_w },
147 //	{ 0xe043, 0xe043, MWA_RAM, &gberet_spritebank },
148 	{ 0xe044, 0xe044, gberet_e044_w },
149 	{ 0xf400, 0xf400, SN76496_0_w },
150 MEMORY_END
151 
152 static MEMORY_READ_START( mrgoemon_readmem )
153 	{ 0x0000, 0xbfff, MRA_ROM },
154 	{ 0xc000, 0xe03f, MRA_RAM },
155 	{ 0xf200, 0xf200, input_port_4_r },	/* DSW1 */
156 	{ 0xf400, 0xf400, input_port_5_r },	/* DSW2 */
157 	{ 0xf600, 0xf600, input_port_3_r },	/* DSW0 */
158 	{ 0xf601, 0xf601, input_port_1_r },	/* IN1 */
159 	{ 0xf602, 0xf602, input_port_0_r },	/* IN0 */
160 	{ 0xf603, 0xf603, input_port_2_r },	/* IN2 */
161 	{ 0xf800, 0xffff, MRA_BANK1 },
162 MEMORY_END
163 
164 static MEMORY_WRITE_START( mrgoemon_writemem )
165 	{ 0x0000, 0xbfff, MWA_ROM },
166 	{ 0xc000, 0xc7ff, gberet_colorram_w, &gberet_colorram },
167 	{ 0xc800, 0xcfff, gberet_videoram_w, &gberet_videoram },
168 	{ 0xd000, 0xd0bf, MWA_RAM, &spriteram_2 },
169 	{ 0xd100, 0xd1bf, MWA_RAM, &spriteram, &spriteram_size },
170 	{ 0xd200, 0xdfff, MWA_RAM },
171 	{ 0xe000, 0xe03f, gberet_scroll_w, &gberet_scrollram },
172 	{ 0xe043, 0xe043, MWA_RAM, &gberet_spritebank },
173 	{ 0xe044, 0xe044, gberet_e044_w },
174 	{ 0xf000, 0xf000, mrgoemon_bankswitch_w },	/* + coin counters */
175 	{ 0xf200, 0xf200, MWA_NOP },		/* Loads the snd command into the snd latch */
176 	{ 0xf400, 0xf400, SN76496_0_w },	/* This address triggers the SN chip to read the data port. */
177 	{ 0xf800, 0xffff, MWA_ROM },
178 MEMORY_END
179 
180 
181 
182 INPUT_PORTS_START( gberet )
183 	PORT_START	/* IN0 */
184 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  | IPF_8WAY )
185 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY )
186 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    | IPF_8WAY )
187 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  | IPF_8WAY )
188 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
189 	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
190 	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
191 	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
192 
193 	PORT_START	/* IN1 */
194 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  | IPF_8WAY | IPF_COCKTAIL )
195 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_COCKTAIL )
196 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    | IPF_8WAY | IPF_COCKTAIL )
197 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  | IPF_8WAY | IPF_COCKTAIL )
198 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_COCKTAIL )
199 	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_COCKTAIL )
200 	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
201 	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
202 
203 	PORT_START	/* IN2 */
204 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
205 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
206 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
207 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
208 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 )
209 	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
210 	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
211 	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
212 
213 	PORT_START	/* DSW0 */
214 	PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_A ) )
215 	PORT_DIPSETTING(    0x02, DEF_STR( 4C_1C ) )
216 	PORT_DIPSETTING(    0x05, DEF_STR( 3C_1C ) )
217 	PORT_DIPSETTING(    0x08, DEF_STR( 2C_1C ) )
218 	PORT_DIPSETTING(    0x04, DEF_STR( 3C_2C ) )
219 	PORT_DIPSETTING(    0x01, DEF_STR( 4C_3C ) )
220 	PORT_DIPSETTING(    0x0f, DEF_STR( 1C_1C ) )
221 	PORT_DIPSETTING(    0x03, DEF_STR( 3C_4C ) )
222 	PORT_DIPSETTING(    0x07, DEF_STR( 2C_3C ) )
223 	PORT_DIPSETTING(    0x0e, DEF_STR( 1C_2C ) )
224 	PORT_DIPSETTING(    0x06, DEF_STR( 2C_5C ) )
225 	PORT_DIPSETTING(    0x0d, DEF_STR( 1C_3C ) )
226 	PORT_DIPSETTING(    0x0c, DEF_STR( 1C_4C ) )
227 	PORT_DIPSETTING(    0x0b, DEF_STR( 1C_5C ) )
228 	PORT_DIPSETTING(    0x0a, DEF_STR( 1C_6C ) )
229 	PORT_DIPSETTING(    0x09, DEF_STR( 1C_7C ) )
230 	PORT_DIPSETTING(    0x00, DEF_STR( Free_Play ) )
231 	PORT_DIPNAME( 0xf0, 0xf0, DEF_STR( Coin_B ) )
232 	PORT_DIPSETTING(    0x20, DEF_STR( 4C_1C ) )
233 	PORT_DIPSETTING(    0x50, DEF_STR( 3C_1C ) )
234 	PORT_DIPSETTING(    0x80, DEF_STR( 2C_1C ) )
235 	PORT_DIPSETTING(    0x40, DEF_STR( 3C_2C ) )
236 	PORT_DIPSETTING(    0x10, DEF_STR( 4C_3C ) )
237 	PORT_DIPSETTING(    0xf0, DEF_STR( 1C_1C ) )
238 	PORT_DIPSETTING(    0x30, DEF_STR( 3C_4C ) )
239 	PORT_DIPSETTING(    0x70, DEF_STR( 2C_3C ) )
240 	PORT_DIPSETTING(    0xe0, DEF_STR( 1C_2C ) )
241 	PORT_DIPSETTING(    0x60, DEF_STR( 2C_5C ) )
242 	PORT_DIPSETTING(    0xd0, DEF_STR( 1C_3C ) )
243 	PORT_DIPSETTING(    0xc0, DEF_STR( 1C_4C ) )
244 	PORT_DIPSETTING(    0xb0, DEF_STR( 1C_5C ) )
245 	PORT_DIPSETTING(    0xa0, DEF_STR( 1C_6C ) )
246 	PORT_DIPSETTING(    0x90, DEF_STR( 1C_7C ) )
247 	/* 0x00 is invalid */
248 
249 	PORT_START	/* DSW1 */
250 	PORT_DIPNAME( 0x03, 0x02, DEF_STR( Lives ) )
251 	PORT_DIPSETTING(    0x03, "2" )
252 	PORT_DIPSETTING(    0x02, "3" )
253 	PORT_DIPSETTING(    0x01, "5" )
254 	PORT_DIPSETTING(    0x00, "7" )
255 	PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) )
256 	PORT_DIPSETTING(    0x00, DEF_STR( Upright ) )
257 	PORT_DIPSETTING(    0x04, DEF_STR( Cocktail ) )
258 	PORT_DIPNAME( 0x18, 0x18, DEF_STR( Bonus_Life ) )
259 	PORT_DIPSETTING(    0x18, "30000 70000" )
260 	PORT_DIPSETTING(    0x10, "40000 80000" )
261 	PORT_DIPSETTING(    0x08, "50000 100000" )
262 	PORT_DIPSETTING(    0x00, "50000 200000" )
263 	PORT_DIPNAME( 0x60, 0x60, DEF_STR( Difficulty ) )
264 	PORT_DIPSETTING(    0x60, "Easy" )
265 	PORT_DIPSETTING(    0x40, "Medium" )
266 	PORT_DIPSETTING(    0x20, "Hard" )
267 	PORT_DIPSETTING(    0x00, "Hardest" )
268 	PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) )
269 	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
270 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
271 
272 	PORT_START	/* DSW2 */
273 	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) )
274 	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
275 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
276 	PORT_DIPNAME( 0x02, 0x02, "Controls" )
277 	PORT_DIPSETTING(    0x02, "Single" )
278 	PORT_DIPSETTING(    0x00, "Dual" )
279 	PORT_DIPNAME( 0x04, 0x04, DEF_STR ( Unknown ) )
280 	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
281 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
282 	PORT_DIPNAME( 0x08, 0x08, DEF_STR ( Unknown ) )
283 	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
284 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
285 	PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )
286 INPUT_PORTS_END
287 
288 /* IN2 is different and IN1 and DSW0 are swapped */
289 INPUT_PORTS_START( gberetb )
290 	PORT_START	/* IN0 */
291 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  | IPF_8WAY )
292 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY )
293 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    | IPF_8WAY )
294 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  | IPF_8WAY )
295 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
296 	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
297 	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
298 	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
299 
300 	PORT_START	/* DSW0 */
301 	PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_A ) )
302 	PORT_DIPSETTING(    0x02, DEF_STR( 4C_1C ) )
303 	PORT_DIPSETTING(    0x05, DEF_STR( 3C_1C ) )
304 	PORT_DIPSETTING(    0x08, DEF_STR( 2C_1C ) )
305 	PORT_DIPSETTING(    0x04, DEF_STR( 3C_2C ) )
306 	PORT_DIPSETTING(    0x01, DEF_STR( 4C_3C ) )
307 	PORT_DIPSETTING(    0x0f, DEF_STR( 1C_1C ) )
308 	PORT_DIPSETTING(    0x03, DEF_STR( 3C_4C ) )
309 	PORT_DIPSETTING(    0x07, DEF_STR( 2C_3C ) )
310 	PORT_DIPSETTING(    0x0e, DEF_STR( 1C_2C ) )
311 	PORT_DIPSETTING(    0x06, DEF_STR( 2C_5C ) )
312 	PORT_DIPSETTING(    0x0d, DEF_STR( 1C_3C ) )
313 	PORT_DIPSETTING(    0x0c, DEF_STR( 1C_4C ) )
314 	PORT_DIPSETTING(    0x0b, DEF_STR( 1C_5C ) )
315 	PORT_DIPSETTING(    0x0a, DEF_STR( 1C_6C ) )
316 	PORT_DIPSETTING(    0x09, DEF_STR( 1C_7C ) )
317 	PORT_DIPSETTING(    0x00, DEF_STR( Free_Play ) )
318 	PORT_DIPNAME( 0xf0, 0xf0, DEF_STR( Coin_B ) )
319 	PORT_DIPSETTING(    0x20, DEF_STR( 4C_1C ) )
320 	PORT_DIPSETTING(    0x50, DEF_STR( 3C_1C ) )
321 	PORT_DIPSETTING(    0x80, DEF_STR( 2C_1C ) )
322 	PORT_DIPSETTING(    0x40, DEF_STR( 3C_2C ) )
323 	PORT_DIPSETTING(    0x10, DEF_STR( 4C_3C ) )
324 	PORT_DIPSETTING(    0xf0, DEF_STR( 1C_1C ) )
325 	PORT_DIPSETTING(    0x30, DEF_STR( 3C_4C ) )
326 	PORT_DIPSETTING(    0x70, DEF_STR( 2C_3C ) )
327 	PORT_DIPSETTING(    0xe0, DEF_STR( 1C_2C ) )
328 	PORT_DIPSETTING(    0x60, DEF_STR( 2C_5C ) )
329 	PORT_DIPSETTING(    0xd0, DEF_STR( 1C_3C ) )
330 	PORT_DIPSETTING(    0xc0, DEF_STR( 1C_4C ) )
331 	PORT_DIPSETTING(    0xb0, DEF_STR( 1C_5C ) )
332 	PORT_DIPSETTING(    0xa0, DEF_STR( 1C_6C ) )
333 	PORT_DIPSETTING(    0x90, DEF_STR( 1C_7C ) )
334 	/* 0x00 is invalid */
335 
336 	PORT_START	/* IN2 */
337 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
338 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
339 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
340 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
341 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 )
342 	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 )
343 	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
344 	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
345 
346 	PORT_START	/* IN1 */
347 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  | IPF_8WAY | IPF_COCKTAIL )
348 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_COCKTAIL )
349 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    | IPF_8WAY | IPF_COCKTAIL )
350 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  | IPF_8WAY | IPF_COCKTAIL )
351 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_COCKTAIL )
352 	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_COCKTAIL )
353 	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
354 	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
355 
356 	PORT_START	/* DSW1 */
357 	PORT_DIPNAME( 0x03, 0x02, DEF_STR( Lives ) )
358 	PORT_DIPSETTING(    0x03, "2" )
359 	PORT_DIPSETTING(    0x02, "3" )
360 	PORT_DIPSETTING(    0x01, "5" )
361 	PORT_DIPSETTING(    0x00, "7" )
362 	PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) )
363 	PORT_DIPSETTING(    0x00, DEF_STR( Upright ) )
364 	PORT_DIPSETTING(    0x04, DEF_STR( Cocktail ) )
365 	PORT_DIPNAME( 0x18, 0x18, DEF_STR( Bonus_Life ) )
366 	PORT_DIPSETTING(    0x18, "30000 70000" )
367 	PORT_DIPSETTING(    0x10, "40000 80000" )
368 	PORT_DIPSETTING(    0x08, "50000 100000" )
369 	PORT_DIPSETTING(    0x00, "50000 200000" )
370 	PORT_DIPNAME( 0x60, 0x60, DEF_STR( Difficulty ) )
371 	PORT_DIPSETTING(    0x60, "Easy" )
372 	PORT_DIPSETTING(    0x40, "Medium" )
373 	PORT_DIPSETTING(    0x20, "Hard" )
374 	PORT_DIPSETTING(    0x00, "Hardest" )
375 	PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) )
376 	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
377 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
378 
379 	PORT_START	/* DSW2 */
380 	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) )
381 	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
382 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
383 	PORT_DIPNAME( 0x02, 0x02, "Controls" )
384 	PORT_DIPSETTING(    0x02, "Single" )
385 	PORT_DIPSETTING(    0x00, "Dual" )
386 	PORT_DIPNAME( 0x04, 0x04, DEF_STR ( Unknown ) )
387 	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
388 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
389 	PORT_DIPNAME( 0x08, 0x08, DEF_STR ( Unknown ) )
390 	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
391 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
392 	PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )
393 INPUT_PORTS_END
394 
395 INPUT_PORTS_START( mrgoemon )
396 	PORT_START	/* IN0 */
397 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  | IPF_4WAY )
398 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_4WAY )
399 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    | IPF_4WAY )
400 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  | IPF_4WAY )
401 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
402 	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
403 	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
404 	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
405 
406 	PORT_START	/* IN1 */
407 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  | IPF_4WAY | IPF_COCKTAIL )
408 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_4WAY | IPF_COCKTAIL )
409 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    | IPF_4WAY | IPF_COCKTAIL )
410 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  | IPF_4WAY | IPF_COCKTAIL )
411 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_COCKTAIL )
412 	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_COCKTAIL )
413 	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
414 	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
415 
416 	PORT_START	/* IN2 */
417 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
418 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
419 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
420 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
421 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 )
422 	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
423 	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
424 	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
425 
426 	PORT_START	/* DSW0 */
427 	PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_A ) )
428 	PORT_DIPSETTING(    0x02, DEF_STR( 4C_1C ) )
429 	PORT_DIPSETTING(    0x05, DEF_STR( 3C_1C ) )
430 	PORT_DIPSETTING(    0x08, DEF_STR( 2C_1C ) )
431 	PORT_DIPSETTING(    0x04, DEF_STR( 3C_2C ) )
432 	PORT_DIPSETTING(    0x01, DEF_STR( 4C_3C ) )
433 	PORT_DIPSETTING(    0x0f, DEF_STR( 1C_1C ) )
434 	PORT_DIPSETTING(    0x03, DEF_STR( 3C_4C ) )
435 	PORT_DIPSETTING(    0x07, DEF_STR( 2C_3C ) )
436 	PORT_DIPSETTING(    0x0e, DEF_STR( 1C_2C ) )
437 	PORT_DIPSETTING(    0x06, DEF_STR( 2C_5C ) )
438 	PORT_DIPSETTING(    0x0d, DEF_STR( 1C_3C ) )
439 	PORT_DIPSETTING(    0x0c, DEF_STR( 1C_4C ) )
440 	PORT_DIPSETTING(    0x0b, DEF_STR( 1C_5C ) )
441 	PORT_DIPSETTING(    0x0a, DEF_STR( 1C_6C ) )
442 	PORT_DIPSETTING(    0x09, DEF_STR( 1C_7C ) )
443 	PORT_DIPSETTING(    0x00, DEF_STR( Free_Play ) )
444 	PORT_DIPNAME( 0xf0, 0xf0, DEF_STR( Coin_B ) )
445 	PORT_DIPSETTING(    0x20, DEF_STR( 4C_1C ) )
446 	PORT_DIPSETTING(    0x50, DEF_STR( 3C_1C ) )
447 	PORT_DIPSETTING(    0x80, DEF_STR( 2C_1C ) )
448 	PORT_DIPSETTING(    0x40, DEF_STR( 3C_2C ) )
449 	PORT_DIPSETTING(    0x10, DEF_STR( 4C_3C ) )
450 	PORT_DIPSETTING(    0xf0, DEF_STR( 1C_1C ) )
451 	PORT_DIPSETTING(    0x30, DEF_STR( 3C_4C ) )
452 	PORT_DIPSETTING(    0x70, DEF_STR( 2C_3C ) )
453 	PORT_DIPSETTING(    0xe0, DEF_STR( 1C_2C ) )
454 	PORT_DIPSETTING(    0x60, DEF_STR( 2C_5C ) )
455 	PORT_DIPSETTING(    0xd0, DEF_STR( 1C_3C ) )
456 	PORT_DIPSETTING(    0xc0, DEF_STR( 1C_4C ) )
457 	PORT_DIPSETTING(    0xb0, DEF_STR( 1C_5C ) )
458 	PORT_DIPSETTING(    0xa0, DEF_STR( 1C_6C ) )
459 	PORT_DIPSETTING(    0x90, DEF_STR( 1C_7C ) )
460 	/* 0x00 is invalid */
461 
462 	PORT_START	/* DSW1 */
463 	PORT_DIPNAME( 0x03, 0x02, DEF_STR( Lives ) )
464 	PORT_DIPSETTING(    0x03, "2" )
465 	PORT_DIPSETTING(    0x02, "3" )
466 	PORT_DIPSETTING(    0x01, "5" )
467 	PORT_DIPSETTING(    0x00, "7" )
468 	PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) )
469 	PORT_DIPSETTING(    0x00, DEF_STR( Upright ) )
470 	PORT_DIPSETTING(    0x04, DEF_STR( Cocktail ) )
471 	PORT_DIPNAME( 0x18, 0x18, DEF_STR( Bonus_Life ) )
472 	PORT_DIPSETTING(    0x18, "20000 and every 60000" )
473 	PORT_DIPSETTING(    0x10, "30000 and every 70000" )
474 	PORT_DIPSETTING(    0x08, "40000 and every 80000" )
475 	PORT_DIPSETTING(    0x00, "50000 and every 90000" )
476 	PORT_DIPNAME( 0x60, 0x60, DEF_STR( Difficulty ) )
477 	PORT_DIPSETTING(    0x60, "Easy" )
478 	PORT_DIPSETTING(    0x40, "Medium" )
479 	PORT_DIPSETTING(    0x20, "Hard" )
480 	PORT_DIPSETTING(    0x00, "Hardest" )
481 	PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) )
482 	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
483 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
484 
485 	PORT_START	/* DSW2 */
486 	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) )
487 	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
488 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
489 	PORT_DIPNAME( 0x02, 0x02, "Controls" )
490 	PORT_DIPSETTING(    0x02, "Single" )
491 	PORT_DIPSETTING(    0x00, "Dual" )
492 	PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
493 	PORT_DIPNAME( 0x08, 0x08, DEF_STR ( Unknown ) )
494 	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
495 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
496 	PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )
497 INPUT_PORTS_END
498 
499 
500 
501 static struct GfxLayout charlayout =
502 {
503 	8,8,	/* 8*8 characters */
504 	512,	/* 512 characters */
505 	4,	/* 4 bits per pixel */
506 	{ 0, 1, 2, 3 },	/* the four bitplanes are packed in one nibble */
507 	{ 0*4, 1*4, 2*4, 3*4, 4*4, 5*4, 6*4, 7*4 },
508 	{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
509 	32*8	/* every char takes 8 consecutive bytes */
510 };
511 
512 static struct GfxLayout spritelayout =
513 {
514 	16,16,	/* 16*16 sprites */
515 	512,	/* 512 sprites */
516 	4,	/* 4 bits per pixel */
517 	{ 0, 1, 2, 3 },	/* the four bitplanes are packed in one nibble */
518 	{ 0*4, 1*4, 2*4, 3*4, 4*4, 5*4, 6*4, 7*4,
519 		32*8+0*4, 32*8+1*4, 32*8+2*4, 32*8+3*4, 32*8+4*4, 32*8+5*4, 32*8+6*4, 32*8+7*4 },
520 	{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32,
521 		64*8+0*32, 64*8+1*32, 64*8+2*32, 64*8+3*32, 64*8+4*32, 64*8+5*32, 64*8+6*32, 64*8+7*32 },
522 	128*8	/* every sprite takes 128 consecutive bytes */
523 };
524 
525 static struct GfxLayout gberetb_charlayout =
526 {
527 	8,8,	/* 8*8 characters */
528 	512,	/* 512 characters */
529 	4,	/* 4 bits per pixel */
530 	{ 0, 1, 2, 3 },	/* the four bitplanes are packed in one nibble */
531 	{ 6*4, 7*4, 0*4, 1*4, 2*4, 3*4, 4*4, 5*4 },
532 	{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
533 	32*8	/* every char takes 8 consecutive bytes */
534 };
535 
536 static struct GfxLayout gberetb_spritelayout =
537 {
538 	16,16,	/* 16*16 sprites */
539 	512,	/* 512 sprites */
540 	4,	/* 4 bits per pixel */
541 	{ 0*0x4000*8, 1*0x4000*8, 2*0x4000*8, 3*0x4000*8 },
542 	{ 0, 1, 2, 3, 4, 5, 6, 7,
543 		16*8+0, 16*8+1, 16*8+2, 16*8+3, 16*8+4, 16*8+5, 16*8+6, 16*8+7 },
544 	{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
545 		8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
546 	32*8	/* every sprite takes 32 consecutive bytes */
547 };
548 
549 
550 static struct GfxDecodeInfo gfxdecodeinfo[] =
551 {
552 	{ REGION_GFX1, 0, &charlayout,       0, 16 },
553 	{ REGION_GFX2, 0, &spritelayout, 16*16, 16 },
554 	{ -1 } /* end of array */
555 };
556 
557 static struct GfxDecodeInfo gberetb_gfxdecodeinfo[] =
558 {
559 	{ REGION_GFX1, 0, &gberetb_charlayout,       0, 16 },
560 	{ REGION_GFX2, 0, &gberetb_spritelayout, 16*16, 16 },
561 	{ -1 } /* end of array */
562 };
563 
564 
565 
566 static struct SN76496interface sn76496_interface =
567 {
568 	1,	/* 1 chip */
569 	{ 18432000/12 },	/* 2H (generated by a custom IC) */
570 	{ 100 }
571 };
572 
573 
574 
575 static MACHINE_DRIVER_START( gberet )
576 
577 	/* basic machine hardware */
578 	MDRV_CPU_ADD(Z80,18432000/6)	/* X1S (generated by a custom IC) */
579 	MDRV_CPU_MEMORY(readmem,writemem)
580 	MDRV_CPU_VBLANK_INT(gberet_interrupt,32)	/* 1 IRQ + 16 NMI (generated by a custom IC) */
581 
582 	MDRV_FRAMES_PER_SECOND(30)
583 	MDRV_VBLANK_DURATION(DEFAULT_30HZ_VBLANK_DURATION)
584 
585 	/* video hardware */
586 	MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
587 	MDRV_SCREEN_SIZE(32*8, 32*8)
588 	MDRV_VISIBLE_AREA(1*8, 31*8-1, 2*8, 30*8-1)
589 	MDRV_GFXDECODE(gfxdecodeinfo)
590 	MDRV_PALETTE_LENGTH(32)
591 	MDRV_COLORTABLE_LENGTH(2*16*16)
592 
593 	MDRV_PALETTE_INIT(gberet)
594 	MDRV_VIDEO_START(gberet)
595 	MDRV_VIDEO_UPDATE(gberet)
596 
597 	/* sound hardware */
598 	MDRV_SOUND_ADD(SN76496, sn76496_interface)
599 MACHINE_DRIVER_END
600 
601 static MACHINE_DRIVER_START( gberetb )
602 
603 	/* basic machine hardware */
604 	MDRV_CPU_ADD(Z80, 3072000)	/* 3.072 MHz ?? */
605 	MDRV_CPU_MEMORY(readmem,gberetb_writemem)
606 	MDRV_CPU_VBLANK_INT(gberet_interrupt,16)	/* 1 IRQ + 8 NMI */
607 
608 	MDRV_FRAMES_PER_SECOND(60)
609 	MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
610 
611 	/* video hardware */
612 	MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
613 	MDRV_SCREEN_SIZE(32*8, 32*8)
614 	MDRV_VISIBLE_AREA(1*8, 31*8-1, 2*8, 30*8-1)
615 	MDRV_GFXDECODE(gberetb_gfxdecodeinfo)
616 	MDRV_PALETTE_LENGTH(32)
617 	MDRV_COLORTABLE_LENGTH(2*16*16)
618 
619 	MDRV_PALETTE_INIT(gberet)
620 	MDRV_VIDEO_START(gberet)
621 	MDRV_VIDEO_UPDATE(gberetb)
622 
623 	/* sound hardware */
624 	MDRV_SOUND_ADD(SN76496, sn76496_interface)
625 MACHINE_DRIVER_END
626 
627 static MACHINE_DRIVER_START( mrgoemon )
628 
629 	/* basic machine hardware */
630 	MDRV_CPU_ADD(Z80,18432000/6)	/* X1S (generated by a custom IC) */
631 	MDRV_CPU_MEMORY(mrgoemon_readmem,mrgoemon_writemem)
632 	MDRV_CPU_VBLANK_INT(gberet_interrupt,16)	/* 1 IRQ + 8 NMI */
633 
634 	MDRV_FRAMES_PER_SECOND(60)
635 	MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
636 
637 	/* video hardware */
638 	MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
639 	MDRV_SCREEN_SIZE(32*8, 32*8)
640 	MDRV_VISIBLE_AREA(1*8, 31*8-1, 2*8, 30*8-1)
641 	MDRV_GFXDECODE(gfxdecodeinfo)
642 	MDRV_PALETTE_LENGTH(32)
643 	MDRV_COLORTABLE_LENGTH(2*16*16)
644 
645 	MDRV_PALETTE_INIT(gberet)
646 	MDRV_VIDEO_START(gberet)
647 	MDRV_VIDEO_UPDATE(gberet)
648 
649 	/* sound hardware */
650 	MDRV_SOUND_ADD(SN76496, sn76496_interface)
651 MACHINE_DRIVER_END
652 
653 
654 
655 /***************************************************************************
656 
657   Game driver(s)
658 
659 ***************************************************************************/
660 
661 ROM_START( gberet )
662 	ROM_REGION( 0x10000, REGION_CPU1, 0 )	/* 64k for code */
663 	ROM_LOAD( "577l03.10c",   0x0000, 0x4000, CRC(ae29e4ff) SHA1(5c66de1403c5df5b6647bb37e26070ffd33590e8) )
664 	ROM_LOAD( "577l02.8c",    0x4000, 0x4000, CRC(240836a5) SHA1(b76f3789f152198bf8a9a366378d664e683c6c9d) )
665 	ROM_LOAD( "577l01.7c",    0x8000, 0x4000, CRC(41fa3e1f) SHA1(90d1463e16b0f52c01078be044ce3672d4acebff) )
666 
667 	ROM_REGION( 0x04000, REGION_GFX1, ROMREGION_DISPOSE )
668 	ROM_LOAD( "577l07.3f",    0x00000, 0x4000, CRC(4da7bd1b) SHA1(54adba9ae086852902d78ab36039498aae50d7a9) )
669 
670 	ROM_REGION( 0x10000, REGION_GFX2, ROMREGION_DISPOSE )
671 	ROM_LOAD( "577l06.5e",    0x00000, 0x4000, CRC(0f1cb0ca) SHA1(094004e70c05df8cd486d0854c258fa766e2925d) )
672 	ROM_LOAD( "577l05.4e",    0x04000, 0x4000, CRC(523a8b66) SHA1(5f2bcf2b702fe05f8a022b6284cb2d0a5b5f222f) )
673 	ROM_LOAD( "577l08.4f",    0x08000, 0x4000, CRC(883933a4) SHA1(b565842edf09feeb2c4ac44ad58331757586b6aa) )
674 	ROM_LOAD( "577l04.3e",    0x0c000, 0x4000, CRC(ccecda4c) SHA1(cac053cab68cb420edd408ce032143db7abc29f5) )
675 
676 	ROM_REGION( 0x0220, REGION_PROMS, 0 )
677 	ROM_LOAD( "577h09.2f",    0x0000, 0x0020, CRC(c15e7c80) SHA1(c0e8a01e63ed8cf20b33456b68890313b387ad23) ) /* palette */
678 	ROM_LOAD( "577h10.5f",    0x0020, 0x0100, CRC(e9de1e53) SHA1(406b8dfe54e6176082005cc5545e79c098672547) ) /* sprites */
679 	ROM_LOAD( "577h11.6f",    0x0120, 0x0100, CRC(2a1a992b) SHA1(77cff7c9c8433f999a87776021935864cf9dccb4) ) /* characters */
680 ROM_END
681 
682 ROM_START( rushatck )
683 	ROM_REGION( 0x10000, REGION_CPU1, 0 )	/* 64k for code */
684 	ROM_LOAD( "577h03.10c",   0x0000, 0x4000, CRC(4d276b52) SHA1(ba5d61c89fd2db4b303b81deccc887561156cbe3) )
685 	ROM_LOAD( "577h02.8c",    0x4000, 0x4000, CRC(b5802806) SHA1(0e4698ecfb9eda916703165ea5d55516fdef5fe4) )
686 	ROM_LOAD( "577h01.7c",    0x8000, 0x4000, CRC(da7c8f3d) SHA1(eb61eedee169f67db93407ad0fe8a195089b7e3a) )
687 
688 	ROM_REGION( 0x04000, REGION_GFX1, ROMREGION_DISPOSE )
689 	ROM_LOAD( "577h07.3f",    0x00000, 0x4000, CRC(03f9815f) SHA1(209c76fd36d1b5672992c55e24d3cf77d4c5a0aa) )
690 
691 	ROM_REGION( 0x10000, REGION_GFX2, ROMREGION_DISPOSE )
692 	ROM_LOAD( "577l06.5e",    0x00000, 0x4000, CRC(0f1cb0ca) SHA1(094004e70c05df8cd486d0854c258fa766e2925d) )
693 	ROM_LOAD( "577h05.4e",    0x04000, 0x4000, CRC(9d028e8f) SHA1(4faa47152a6c1da0024bb03fbcf7baf0540e891e) )
694 	ROM_LOAD( "577l08.4f",    0x08000, 0x4000, CRC(883933a4) SHA1(b565842edf09feeb2c4ac44ad58331757586b6aa) )
695 	ROM_LOAD( "577l04.3e",    0x0c000, 0x4000, CRC(ccecda4c) SHA1(cac053cab68cb420edd408ce032143db7abc29f5) )
696 
697 	ROM_REGION( 0x0220, REGION_PROMS, 0 )
698 	ROM_LOAD( "577h09.2f",    0x0000, 0x0020, CRC(c15e7c80) SHA1(c0e8a01e63ed8cf20b33456b68890313b387ad23) ) /* palette */
699 	ROM_LOAD( "577h10.5f",    0x0020, 0x0100, CRC(e9de1e53) SHA1(406b8dfe54e6176082005cc5545e79c098672547) ) /* sprites */
700 	ROM_LOAD( "577h11.6f",    0x0120, 0x0100, CRC(2a1a992b) SHA1(77cff7c9c8433f999a87776021935864cf9dccb4) ) /* characters */
701 ROM_END
702 
703 ROM_START( gberetb )
704 	ROM_REGION( 0x10000, REGION_CPU1, 0 )	/* 64k for code */
705 	ROM_LOAD( "2-ic82.10g",   0x0000, 0x8000, CRC(6d6fb494) SHA1(0d01c86ed7a8962ee3e1056a8d41584ad1406f0f) )
706 	ROM_LOAD( "3-ic81.10f",   0x8000, 0x4000, CRC(f1520a0a) SHA1(227b2d2e1fc0e81ae02e663a3089e7399612e3cf) )
707 
708 	ROM_REGION( 0x04000, REGION_GFX1, ROMREGION_DISPOSE )
709 	ROM_LOAD( "1-ic92.12c",   0x00000, 0x4000, CRC(b0189c87) SHA1(29202978b07bf059b88bf206d8fafc80e0cdb6dc) )
710 
711 	ROM_REGION( 0x10000, REGION_GFX2, ROMREGION_DISPOSE )
712 	ROM_LOAD( "7-1c8.2b",     0x00000, 0x4000, CRC(86334522) SHA1(f2907d136dbfdb92cbd550524b4453755f6244b6) )
713 	ROM_LOAD( "6-ic9.2c",     0x04000, 0x4000, CRC(bda50d3e) SHA1(c6f5a15270a69464e977926d056b31dcec8b41c3) )
714 	ROM_LOAD( "5-ic10.2d",    0x08000, 0x4000, CRC(6a7b3881) SHA1(795bfb1fbc11ceac687b15e98574feb650e2f674) )
715 	ROM_LOAD( "4-ic11.2e",    0x0c000, 0x4000, CRC(3fb186c9) SHA1(40ce0447014af3f5b5b88648ab7e43a955bd1274) )
716 
717 	ROM_REGION( 0x0220, REGION_PROMS, 0 )
718 	ROM_LOAD( "577h09",       0x0000, 0x0020, CRC(c15e7c80) SHA1(c0e8a01e63ed8cf20b33456b68890313b387ad23) ) /* palette */
719 	ROM_LOAD( "577h10",       0x0020, 0x0100, CRC(e9de1e53) SHA1(406b8dfe54e6176082005cc5545e79c098672547) ) /* sprites */
720 	ROM_LOAD( "577h11",       0x0120, 0x0100, CRC(2a1a992b) SHA1(77cff7c9c8433f999a87776021935864cf9dccb4) ) /* characters */
721 ROM_END
722 
723 ROM_START( mrgoemon )
724 	ROM_REGION( 0x14000, REGION_CPU1, 0 )	/* 64k for code + banked ROM */
725 	ROM_LOAD( "621d01.10c",   0x00000, 0x8000, CRC(b2219c56) SHA1(274160be5dabbbfa61af71d92bddffbb56eadab6) )
726 	ROM_LOAD( "621d02.12c",   0x08000, 0x4000, CRC(c3337a97) SHA1(6fd5f365b2624a37f252c202cd97877705b4a6c2) )
727 	ROM_CONTINUE(             0x10000, 0x4000 )
728 
729 	ROM_REGION( 0x04000, REGION_GFX1, ROMREGION_DISPOSE )
730 	ROM_LOAD( "621a05.6d",    0x00000, 0x4000, CRC(f0a6dfc5) SHA1(395024ebfff550b0da393096483196fb1152a077) )
731 
732 	ROM_REGION( 0x10000, REGION_GFX2, ROMREGION_DISPOSE )
733 	ROM_LOAD( "621d03.4d",    0x00000, 0x8000, CRC(66f2b973) SHA1(7e906f258a5f4928f9615c6ea176efbca659b3a7) )
734 	ROM_LOAD( "621d04.5d",    0x08000, 0x8000, CRC(47df6301) SHA1(e675c070e46993d3453c2ddadc49ec8b84cec854) )
735 
736 	ROM_REGION( 0x0220, REGION_PROMS, 0 )
737 	ROM_LOAD( "621a06.5f",    0x0000, 0x0020, CRC(7c90de5f) SHA1(8ac5708e72e32f3d79ccde0cbaedefc34f8ac57e) ) /* palette */
738 	ROM_LOAD( "621a07.6f",    0x0020, 0x0100, CRC(3980acdc) SHA1(f4e0bd74bccd77b84096c38bc70cf488a42d9562) ) /* sprites */
739 	ROM_LOAD( "621a08.7f",    0x0120, 0x0100, CRC(2fb244dd) SHA1(ceb909ad96c0dabc8684e69b028f4287e227c351) ) /* characters */
740 ROM_END
741 
742 
743 
744 GAME( 1985, gberet,   0,      gberet,   gberet,   0, ROT0, "Konami", "Green Beret" )
745 GAME( 1985, rushatck, gberet, gberet,   gberet,   0, ROT0, "Konami", "Rush'n Attack" )
746 GAME( 1985, gberetb,  gberet, gberetb,  gberetb,  0, ROT0, "bootleg", "Green Beret (bootleg)" )
747 GAME( 1986, mrgoemon, 0,      mrgoemon, mrgoemon, 0, ROT0, "Konami", "Mr. Goemon (Japan)" )
748 
749