1 /***************************************************************************
2
3 The New Zealand Story driver, used for tnzs & tnzs2.
4
5 TODO: - Find out how the hardware credit-counter works (MPU)
6 - Verify dip switches
7 - Fix video offsets (See Dr Toppel in Flip-Screen - also
8 affects Chuka Taisen)
9 - Video scroll side flicker in Chuka Taisen, Insector X and Dr Toppel
10
11 Arkanoid 2:
12 - What do writes at $f400 do ?
13 - Why does the game zero the $fd00 area ?
14 Extrmatn:
15 - What do reads from $f600 do ? (discarded)
16 Chuka Taisen:
17 - What do writes at $f400 do ? (value 40h)
18 - What do reads from $f600 do in service mode ?
19 Dr Toppel:
20 - What do writes at $f400 do ? (value 40h)
21 - What do reads from $f600 do in service mode ?
22
23 ****************************************************************************
24
25 extrmatn and arknoid2 have a special test mode. The correct procedure to make
26 it succeed is as follows:
27 - enter service mode
28 - on the color test screen, press 2 (player 2 start)
29 - set dip switch 1 and dip switch 2 so that they read 00000001
30 - reset the emulation, and skip the previous step.
31 - press 5 (coin 1). Text at the bottom will change to "CHECKING NOW".
32 - use all the inputs, including tilt, until all inputs are OK
33 - press 5 (coin 1) - to confirm that coin lockout 1 works
34 - press 5 (coin 1) - to confirm that coin lockout 2 works
35 - set dip switch 1 to 00000000
36 - set dip switch 1 to 10101010
37 - set dip switch 1 to 11111111
38 - set dip switch 2 to 00000000
39 - set dip switch 2 to 10101010
40 - set dip switch 2 to 11111111
41 - speaker should now output a tone
42 - press 5 (coin 1) , to confirm that OPN works
43 - press 5 (coin 1) , to confirm that SSGCH1 works
44 - press 5 (coin 1) , to confirm that SSGCH2 works
45 - press 5 (coin 1) , to confirm that SSGCH3 works
46 - finished ("CHECK ALL OK!")
47
48 ****************************************************************************
49
50 The New Zealand Story memory map (preliminary)
51
52 CPU #1
53 0000-7fff ROM
54 8000-bfff banked - banks 0-1 RAM; banks 2-7 ROM
55 c000-dfff object RAM, including:
56 c000-c1ff sprites (code, low byte)
57 c200-c3ff sprites (x-coord, low byte)
58 c400-c5ff tiles (code, low byte)
59
60 d000-d1ff sprites (code, high byte)
61 d200-d3ff sprites (x-coord and colour, high byte)
62 d400-d5ff tiles (code, high byte)
63 d600-d7ff tiles (colour)
64 e000-efff RAM shared with CPU #2
65 f000-ffff VDC RAM, including:
66 f000-f1ff sprites (y-coord)
67 f200-f2ff scrolling info
68 f300-f301 vdc controller
69 f302-f303 scroll x-coords (high bits)
70 f600 bankswitch
71 f800-fbff palette
72
73 CPU #2
74 0000-7fff ROM
75 8000-9fff banked ROM
76 a000 bankswitch
77 b000-b001 YM2203 interface (with DIPs on YM2203 ports)
78 c000-c001 I8742 MCU
79 e000-efff RAM shared with CPU #1
80 f000-f003 inputs (used only by Arkanoid 2)
81
82 ****************************************************************************/
83 /***************************************************************************
84
85 Arkanoid 2 - Revenge of Doh!
86 (C) 1987 Taito
87
88 driver by
89
90 Luca Elia (l.elia@tin.it)
91 Mirko Buffoni
92
93 - The game doesn't write to f800-fbff (static palette)
94
95
96
97 Interesting routines (main cpu)
98 -------------------------------
99
100 1ed prints the test screen (first string at 206)
101
102 47a prints dipsw1&2 e 1p&2p paddleL values:
103 e821 IN DIPSW1 e823-4 1P PaddleL (lo-hi)
104 e822 IN DIPSW2 e825-6 2P PaddleL (lo-hi)
105
106 584 prints OK or NG on each entry:
107 if (*addr)!=0 { if (*addr)!=2 OK else NG }
108 e880 1P PADDLEL e88a IN SERVICE
109 e881 1P PADDLER e88b IN TILT
110 e882 1P BUTTON e88c OUT LOCKOUT1
111 e883 1P START e88d OUT LOCKOUT2
112 e884 2P PADDLEL e88e IN DIP-SW1
113 e885 2P PADDLER e88f IN DIP-SW2
114 e886 2P BUTTON e890 SND OPN
115 e887 2P START e891 SND SSGCH1
116 e888 IN COIN1 e892 SND SSGCH2
117 e889 IN COIN2 e893 SND SSGCH3
118
119 672 prints a char
120 715 prints a string (0 terminated)
121
122 Shared Memory (values written mainly by the sound cpu)
123 ------------------------------------------------------
124
125 e001=dip-sw A e399=coin counter value e72c-d=1P paddle (lo-hi)
126 e002=dip-sw B e3a0-2=1P score/10 (BCD) e72e-f=2P paddle (lo-hi)
127 e008=level=2*(shown_level-1)+x <- remember it's a binary tree (42 last)
128 e7f0=country code(from 9fde in sound rom)
129 e807=counter, reset by sound cpu, increased by main cpu each vblank
130 e80b=test progress=0(start) 1(first 8) 2(all ok) 3(error)
131 ec09-a~=ed05-6=xy pos of cursor in hi-scores
132 ec81-eca8=hi-scores(8bytes*5entries)
133
134 addr bit name active addr bit name active
135 e72d 6 coin[1] low e729 1 2p select low
136 5 service high 0 1p select low
137 4 coin[2] low
138
139 addr bit name active addr bit name active
140 e730 7 tilt low e7e7 4 1p fire low
141 0 2p fire low
142
143 Interesting routines (sound cpu)
144 --------------------------------
145
146 4ae check starts B73,B7a,B81,B99 coin related
147 8c1 check coins 62e lockout check 664 dsw check
148
149 Interesting locations (sound cpu)
150 ---------------------------------
151
152 d006=each bit is on if a corresponding location (e880-e887) has changed
153 d00b=(c001)>>4=tilt if 0E (security sequence must be reset?)
154 addr bit name active
155 d00c 7 tilt
156 6 ?service?
157 5 coin2 low
158 4 coin1 low
159
160 d00d=each bit is on if the corresponding location (e880-e887) is 1 (OK)
161 d00e=each of the 4 MSBs is on if ..
162 d00f=FF if tilt, 00 otherwise
163 d011=if 00 checks counter, if FF doesn't
164 d23f=input port 1 value
165
166 ***************************************************************************/
167 /***************************************************************************
168
169 Kageki
170 (c) 1988 Taito Corporation
171
172 Driver by Takahiro Nogi (nogi@kt.rim.or.jp) 1999/11/06
173
174 ***************************************************************************/
175
176 #include "driver.h"
177 #include "vidhrdw/generic.h"
178 #include "cpu/i8x41/i8x41.h"
179
180
181
182 /* prototypes for functions in ../machine/tnzs.c */
183 unsigned char *tnzs_objram, *tnzs_workram;
184 unsigned char *tnzs_vdcram, *tnzs_scrollram;
185 DRIVER_INIT( extrmatn );
186 DRIVER_INIT( arknoid2 );
187 DRIVER_INIT( drtoppel );
188 DRIVER_INIT( chukatai );
189 DRIVER_INIT( tnzs );
190 DRIVER_INIT( tnzsb );
191 DRIVER_INIT( insectx );
192 DRIVER_INIT( kageki );
193 READ_HANDLER( arknoid2_sh_f000_r );
194 MACHINE_INIT( tnzs );
195 INTERRUPT_GEN( arknoid2_interrupt );
196 READ_HANDLER( tnzs_port1_r );
197 READ_HANDLER( tnzs_port2_r );
198 WRITE_HANDLER( tnzs_port2_w );
199 READ_HANDLER( tnzs_mcu_r );
200 READ_HANDLER( tnzs_workram_r );
201 READ_HANDLER( tnzs_workram_sub_r );
202 WRITE_HANDLER( tnzs_workram_w );
203 WRITE_HANDLER( tnzs_workram_sub_w );
204 WRITE_HANDLER( tnzs_mcu_w );
205 WRITE_HANDLER( tnzs_bankswitch_w );
206 WRITE_HANDLER( tnzs_bankswitch1_w );
207
208
209 /* prototypes for functions in ../vidhrdw/tnzs.c */
210 PALETTE_INIT( arknoid2 );
211 VIDEO_UPDATE( tnzs );
212
213
214
215 /* max samples */
216 #define MAX_SAMPLES 0x2f
217
kageki_init_samples(const struct MachineSound * msound)218 int kageki_init_samples(const struct MachineSound *msound)
219 {
220 struct GameSamples *samples;
221 unsigned char *scan, *src, *dest;
222 int start, size;
223 int i, n;
224
225 size = sizeof(struct GameSamples) + MAX_SAMPLES * sizeof(struct GameSamples *);
226
227 if ((Machine->samples = auto_malloc(size)) == NULL) return 1;
228
229 samples = Machine->samples;
230 samples->total = MAX_SAMPLES;
231
232 for (i = 0; i < samples->total; i++)
233 {
234 src = memory_region(REGION_SOUND1) + 0x0090;
235 start = (src[(i * 2) + 1] * 256) + src[(i * 2)];
236 scan = &src[start];
237 size = 0;
238
239 // check sample length
240 while (1)
241 {
242 if (*scan++ == 0x00)
243 {
244 break;
245 } else {
246 size++;
247 }
248 }
249 if ((samples->sample[i] = auto_malloc(sizeof(struct GameSample) + size * sizeof(unsigned char))) == NULL) return 1;
250
251 if (start < 0x100) start = size = 0;
252
253 samples->sample[i]->smpfreq = 7000; /* 7 KHz??? */
254 samples->sample[i]->resolution = 8; /* 8 bit */
255 samples->sample[i]->length = size;
256
257 // signed 8-bit sample to unsigned 8-bit sample convert
258 dest = (unsigned char *)samples->sample[i]->data;
259 scan = &src[start];
260 for (n = 0; n < size; n++)
261 {
262 *dest++ = ((*scan++) ^ 0x80);
263 }
264 // logerror("samples num:%02X ofs:%04X lng:%04X\n", i, start, size);
265 }
266
267 return 0;
268 }
269
270
271 static int kageki_csport_sel = 0;
READ_HANDLER(kageki_csport_r)272 static READ_HANDLER( kageki_csport_r )
273 {
274 int dsw, dsw1, dsw2;
275
276 dsw1 = readinputport(0); // DSW1
277 dsw2 = readinputport(1); // DSW2
278
279 switch (kageki_csport_sel)
280 {
281 case 0x00: // DSW2 5,1 / DSW1 5,1
282 dsw = (((dsw2 & 0x10) >> 1) | ((dsw2 & 0x01) << 2) | ((dsw1 & 0x10) >> 3) | ((dsw1 & 0x01) >> 0));
283 break;
284 case 0x01: // DSW2 7,3 / DSW1 7,3
285 dsw = (((dsw2 & 0x40) >> 3) | ((dsw2 & 0x04) >> 0) | ((dsw1 & 0x40) >> 5) | ((dsw1 & 0x04) >> 2));
286 break;
287 case 0x02: // DSW2 6,2 / DSW1 6,2
288 dsw = (((dsw2 & 0x20) >> 2) | ((dsw2 & 0x02) << 1) | ((dsw1 & 0x20) >> 4) | ((dsw1 & 0x02) >> 1));
289 break;
290 case 0x03: // DSW2 8,4 / DSW1 8,4
291 dsw = (((dsw2 & 0x80) >> 4) | ((dsw2 & 0x08) >> 1) | ((dsw1 & 0x80) >> 6) | ((dsw1 & 0x08) >> 3));
292 break;
293 default:
294 dsw = 0x00;
295 // logerror("kageki_csport_sel error !! (0x%08X)\n", kageki_csport_sel);
296 }
297
298 return (dsw & 0xff);
299 }
300
WRITE_HANDLER(kageki_csport_w)301 static WRITE_HANDLER( kageki_csport_w )
302 {
303 char mess[80];
304
305 if (data > 0x3f)
306 {
307 // read dipsw port
308 kageki_csport_sel = (data & 0x03);
309 } else {
310 if (data > MAX_SAMPLES)
311 {
312 // stop samples
313 sample_stop(0);
314 sprintf(mess, "VOICE:%02X STOP", data);
315 } else {
316 // play samples
317 sample_start(0, data, 0);
318 sprintf(mess, "VOICE:%02X PLAY", data);
319 }
320 // usrintf_showmessage(mess);
321 }
322 }
323
324
MEMORY_READ_START(readmem)325 static MEMORY_READ_START( readmem )
326 { 0x0000, 0x7fff, MRA_ROM },
327 { 0x8000, 0xbfff, MRA_BANK1 }, /* ROM + RAM */
328 { 0xc000, 0xdfff, MRA_RAM },
329 { 0xe000, 0xefff, tnzs_workram_r }, /* WORK RAM (shared by the 2 z80's */
330 { 0xf000, 0xf1ff, MRA_RAM }, /* VDC RAM */
331 { 0xf600, 0xf600, MRA_NOP }, /* ? */
332 { 0xf800, 0xfbff, MRA_RAM }, /* not in extrmatn and arknoid2 (PROMs instead) */
333 MEMORY_END
334
335 static MEMORY_WRITE_START( writemem )
336 { 0x0000, 0x7fff, MWA_ROM },
337 { 0x8000, 0xbfff, MWA_BANK1 }, /* ROM + RAM */
338 { 0xc000, 0xdfff, MWA_RAM, &tnzs_objram },
339 { 0xe000, 0xefff, tnzs_workram_w, &tnzs_workram },
340 { 0xf000, 0xf1ff, MWA_RAM, &tnzs_vdcram },
341 { 0xf200, 0xf3ff, MWA_RAM, &tnzs_scrollram }, /* scrolling info */
342 { 0xf400, 0xf400, MWA_NOP }, /* ? */
343 { 0xf600, 0xf600, tnzs_bankswitch_w },
344 /* arknoid2, extrmatn, plumppop and drtoppel have PROMs instead of RAM */
345 /* drtoppel writes here anyway! (maybe leftover from tests during development) */
346 /* so the handler is patched out in init_drtopple() */
347 { 0xf800, 0xfbff, paletteram_xRRRRRGGGGGBBBBB_w, &paletteram },
348 MEMORY_END
349
350 static MEMORY_READ_START( sub_readmem )
351 { 0x0000, 0x7fff, MRA_ROM },
352 { 0x8000, 0x9fff, MRA_BANK2 },
353 { 0xb000, 0xb000, YM2203_status_port_0_r },
354 { 0xb001, 0xb001, YM2203_read_port_0_r },
355 { 0xc000, 0xc001, tnzs_mcu_r }, /* plain input ports in insectx (memory handler */
356 /* changed in insectx_init() ) */
357 { 0xd000, 0xdfff, MRA_RAM },
358 { 0xe000, 0xefff, tnzs_workram_sub_r },
359 { 0xf000, 0xf003, arknoid2_sh_f000_r }, /* paddles in arkanoid2/plumppop. The ports are */
360 /* read but not used by the other games, and are not read at */
361 /* all by insectx. */
362 MEMORY_END
363
364 static MEMORY_WRITE_START( sub_writemem )
365 { 0x0000, 0x9fff, MWA_ROM },
366 { 0xa000, 0xa000, tnzs_bankswitch1_w },
367 { 0xb000, 0xb000, YM2203_control_port_0_w },
368 { 0xb001, 0xb001, YM2203_write_port_0_w },
369 { 0xc000, 0xc001, tnzs_mcu_w }, /* not present in insectx */
370 { 0xd000, 0xdfff, MWA_RAM },
371 { 0xe000, 0xefff, tnzs_workram_sub_w },
372 MEMORY_END
373
374 static MEMORY_READ_START( kageki_sub_readmem )
375 { 0x0000, 0x7fff, MRA_ROM },
376 { 0x8000, 0x9fff, MRA_BANK2 },
377 { 0xb000, 0xb000, YM2203_status_port_0_r },
378 { 0xb001, 0xb001, YM2203_read_port_0_r },
379 { 0xc000, 0xc000, input_port_2_r },
380 { 0xc001, 0xc001, input_port_3_r },
381 { 0xc002, 0xc002, input_port_4_r },
382 { 0xd000, 0xdfff, MRA_RAM },
383 { 0xe000, 0xefff, tnzs_workram_sub_r },
384 MEMORY_END
385
386 static MEMORY_WRITE_START( kageki_sub_writemem )
387 { 0x0000, 0x9fff, MWA_ROM },
388 { 0xa000, 0xa000, tnzs_bankswitch1_w },
389 { 0xb000, 0xb000, YM2203_control_port_0_w },
390 { 0xb001, 0xb001, YM2203_write_port_0_w },
391 { 0xd000, 0xdfff, MWA_RAM },
392 { 0xe000, 0xefff, tnzs_workram_sub_w },
393 MEMORY_END
394
395 /* the bootleg board is different, it has a third CPU (and of course no mcu) */
396
397 static WRITE_HANDLER( tnzsb_sound_command_w )
398 {
399 soundlatch_w(offset,data);
400 cpu_set_irq_line_and_vector(2,0,HOLD_LINE,0xff);
401 }
402
MEMORY_READ_START(tnzsb_readmem1)403 static MEMORY_READ_START( tnzsb_readmem1 )
404 { 0x0000, 0x7fff, MRA_ROM },
405 { 0x8000, 0x9fff, MRA_BANK2 },
406 { 0xb002, 0xb002, input_port_0_r },
407 { 0xb003, 0xb003, input_port_1_r },
408 { 0xc000, 0xc000, input_port_2_r },
409 { 0xc001, 0xc001, input_port_3_r },
410 { 0xc002, 0xc002, input_port_4_r },
411 { 0xd000, 0xdfff, MRA_RAM },
412 { 0xe000, 0xefff, tnzs_workram_sub_r },
413 { 0xf000, 0xf003, MRA_RAM },
414 MEMORY_END
415
416 static MEMORY_WRITE_START( tnzsb_writemem1 )
417 { 0x0000, 0x9fff, MWA_ROM },
418 { 0xa000, 0xa000, tnzs_bankswitch1_w },
419 { 0xb004, 0xb004, tnzsb_sound_command_w },
420 { 0xd000, 0xdfff, MWA_RAM },
421 { 0xe000, 0xefff, tnzs_workram_sub_w },
422 { 0xf000, 0xf3ff, paletteram_xRRRRRGGGGGBBBBB_w, &paletteram },
423 MEMORY_END
424
425 static MEMORY_READ_START( tnzsb_readmem2 )
426 { 0x0000, 0x7fff, MRA_ROM },
427 { 0xc000, 0xdfff, MRA_RAM },
428 MEMORY_END
429
430 static MEMORY_WRITE_START( tnzsb_writemem2 )
431 { 0x0000, 0x7fff, MWA_ROM },
432 { 0xc000, 0xdfff, MWA_RAM },
433 MEMORY_END
434
435 static PORT_READ_START( tnzsb_readport )
436 { 0x00, 0x00, YM2203_status_port_0_r },
437 { 0x02, 0x02, soundlatch_r },
438 PORT_END
439
440 static PORT_WRITE_START( tnzsb_writeport )
441 { 0x00, 0x00, YM2203_control_port_0_w },
442 { 0x01, 0x01, YM2203_write_port_0_w },
443 PORT_END
444
445
446 static MEMORY_READ_START( i8742_readmem )
447 { 0x0000, 0x07ff, MRA_ROM },
448 { 0x0800, 0x08ff, MRA_RAM }, /* Internal i8742 RAM */
449 MEMORY_END
450
451 static MEMORY_WRITE_START( i8742_writemem )
452 { 0x0000, 0x07ff, MWA_ROM },
453 { 0x0800, 0x08ff, MWA_RAM }, /* Internal i8742 RAM */
454 MEMORY_END
455
456 static PORT_READ_START( i8742_readport )
457 { 0x01, 0x01, tnzs_port1_r },
458 { 0x02, 0x02, tnzs_port2_r },
459 { I8X41_t0, I8X41_t0, input_port_5_r },
460 { I8X41_t1, I8X41_t1, input_port_6_r },
461 PORT_END
462
463 static PORT_WRITE_START( i8742_writeport )
464 { 0x02, 0x02, tnzs_port2_w },
465 PORT_END
466
467
468
469 INPUT_PORTS_START( extrmatn )
470 PORT_START /* DSW A */
471 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unused ) )
472 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
473 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
474 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
475 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
476 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
477 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
478 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unused ) )
479 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
480 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
481 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
482 PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
483 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
484 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
485 PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
486 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
487 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
488 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
489 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
490 PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
491
492 PORT_START /* DSW B */
493 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
494 PORT_DIPSETTING( 0x02, "Easy" )
495 PORT_DIPSETTING( 0x03, "Normal" )
496 PORT_DIPSETTING( 0x01, "Hard" )
497 PORT_DIPSETTING( 0x00, "Hardest" )
498 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unused ) )
499 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
500 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
501 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unused ) )
502 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
503 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
504 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unused ) )
505 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
506 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
507 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unused ) )
508 PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
509 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
510 PORT_DIPNAME( 0xc0, 0xc0, "Damage Multiplicator" )
511 PORT_DIPSETTING( 0xc0, "*1" )
512 PORT_DIPSETTING( 0x80, "*1.5" )
513 PORT_DIPSETTING( 0x40, "*2" )
514 PORT_DIPSETTING( 0x00, "*3" )
515
516 PORT_START /* IN0 */
517 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_PLAYER1 )
518 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER1 )
519 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_PLAYER1 )
520 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_PLAYER1 )
521 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
522 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
523 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
524 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
525
526 PORT_START /* IN1 */
527 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_PLAYER2 )
528 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER2 )
529 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_PLAYER2 )
530 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_PLAYER2 )
531 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
532 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
533 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
534 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
535
536 PORT_START /* IN2 */
537 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )
538 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
539 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
540 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
541 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
542 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
543 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
544 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
545
546 PORT_START /* Coin 1 */
547 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
548 PORT_BIT( 0xfe, IP_ACTIVE_HIGH, IPT_UNUSED )
549
550 PORT_START /* Coin 2 */
551 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN2 )
552 PORT_BIT( 0xfe, IP_ACTIVE_HIGH, IPT_UNUSED )
553 INPUT_PORTS_END
554
555 INPUT_PORTS_START( arknoid2 )
556 PORT_START /* DSW1 - IN2 */
557 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
558 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
559 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
560 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
561 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
562 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
563 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
564 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) )
565 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
566 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
567 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
568 PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
569 PORT_DIPSETTING( 0x10, DEF_STR( 3C_1C ) )
570 PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) )
571 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
572 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
573 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_2C ) )
574 PORT_DIPSETTING( 0x80, DEF_STR( 1C_3C ) )
575 PORT_DIPSETTING( 0x40, DEF_STR( 1C_4C ) )
576 PORT_DIPSETTING( 0x00, DEF_STR( 1C_6C ) )
577
578 PORT_START /* DSW2 - IN3 */
579 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
580 PORT_DIPSETTING( 0x02, "Easy" )
581 PORT_DIPSETTING( 0x03, "Normal" )
582 PORT_DIPSETTING( 0x01, "Hard" )
583 PORT_DIPSETTING( 0x00, "Very Hard" )
584 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )
585 PORT_DIPSETTING( 0x00, "50k 150k" )
586 PORT_DIPSETTING( 0x0c, "100k 200k" )
587 PORT_DIPSETTING( 0x04, "50k Only" )
588 PORT_DIPSETTING( 0x08, "100k Only" )
589 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
590 PORT_DIPSETTING( 0x20, "2" )
591 PORT_DIPSETTING( 0x30, "3" )
592 PORT_DIPSETTING( 0x10, "4" )
593 PORT_DIPSETTING( 0x00, "5" )
594 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
595 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
596 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
597 PORT_DIPNAME( 0x80, 0x00, "Allow Continue" )
598 PORT_DIPSETTING( 0x80, DEF_STR( No ) )
599 PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
600
601 PORT_START /* IN1 - read at c000 (sound cpu) */
602 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
603 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
604 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
605 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
606 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
607 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
608 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
609 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
610
611 PORT_START /* empty */
612
613 PORT_START /* IN2 */
614 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )
615 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
616 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
617 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
618 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
619 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
620 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
621 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
622
623 PORT_START /* Coin 1 */
624 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
625 PORT_BIT( 0xfe, IP_ACTIVE_HIGH, IPT_UNUSED )
626
627 PORT_START /* Coin 2 */
628 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN2 )
629 PORT_BIT( 0xfe, IP_ACTIVE_HIGH, IPT_UNUSED )
630
631 PORT_START /* spinner 1 - read at f000/1 */
632 PORT_ANALOG( 0x0fff, 0x0000, IPT_DIAL, 70, 15, 0, 0 )
633 PORT_BIT ( 0x1000, IP_ACTIVE_LOW, IPT_COIN2 ) /* Mirrored for service mode */
634 PORT_BIT ( 0x2000, IP_ACTIVE_HIGH, IPT_SERVICE1 ) /* Mirrored for service mode */
635 PORT_BIT ( 0x4000, IP_ACTIVE_LOW, IPT_COIN1 ) /* Mirrored for service mode */
636 PORT_BIT ( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
637
638 PORT_START /* spinner 2 - read at f002/3 */
639 PORT_ANALOG( 0x0fff, 0x0000, IPT_DIAL | IPF_PLAYER2, 70, 15, 0, 0 )
640 PORT_BIT ( 0xf000, IP_ACTIVE_LOW, IPT_UNKNOWN )
641 INPUT_PORTS_END
642
643 INPUT_PORTS_START( arknid2u )
644 PORT_START /* DSW1 - IN2 */
645 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
646 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
647 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
648 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
649 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
650 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
651 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
652 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) )
653 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
654 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
655 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
656 PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
657 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
658 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
659 PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
660 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
661 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
662 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
663 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
664 PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
665
666 PORT_START /* DSW2 - IN3 */
667 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
668 PORT_DIPSETTING( 0x02, "Easy" )
669 PORT_DIPSETTING( 0x03, "Normal" )
670 PORT_DIPSETTING( 0x01, "Hard" )
671 PORT_DIPSETTING( 0x00, "Very Hard" )
672 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )
673 PORT_DIPSETTING( 0x00, "50k 150k" )
674 PORT_DIPSETTING( 0x0c, "100k 200k" )
675 PORT_DIPSETTING( 0x04, "50k Only" )
676 PORT_DIPSETTING( 0x08, "100k Only" )
677 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
678 PORT_DIPSETTING( 0x20, "2" )
679 PORT_DIPSETTING( 0x30, "3" )
680 PORT_DIPSETTING( 0x10, "4" )
681 PORT_DIPSETTING( 0x00, "5" )
682 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
683 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
684 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
685 PORT_DIPNAME( 0x80, 0x00, "Allow Continue" )
686 PORT_DIPSETTING( 0x80, DEF_STR( No ) )
687 PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
688
689 PORT_START /* IN1 - read at c000 (sound cpu) */
690 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
691 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
692 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
693 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
694 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
695 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
696 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
697 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
698
699 PORT_START /* empty */
700
701 PORT_START /* IN2 */
702 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )
703 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
704 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
705 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
706 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
707 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
708 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
709 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
710
711 PORT_START /* Coin 1 */
712 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
713 PORT_BIT( 0xfe, IP_ACTIVE_HIGH, IPT_UNUSED )
714
715 PORT_START /* Coin 2 */
716 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN2 )
717 PORT_BIT( 0xfe, IP_ACTIVE_HIGH, IPT_UNUSED )
718
719 PORT_START /* spinner 1 - read at f000/1 */
720 PORT_ANALOG( 0x0fff, 0x0000, IPT_DIAL, 70, 15, 0, 0 )
721 PORT_BIT ( 0x1000, IP_ACTIVE_LOW, IPT_COIN2 ) /* Mirrored for service mode */
722 PORT_BIT ( 0x2000, IP_ACTIVE_HIGH, IPT_SERVICE1 ) /* Mirrored for service mode */
723 PORT_BIT ( 0x4000, IP_ACTIVE_LOW, IPT_COIN1 ) /* Mirrored for service mode */
724 PORT_BIT ( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
725
726 PORT_START /* spinner 2 - read at f002/3 */
727 PORT_ANALOG( 0x0fff, 0x0000, IPT_DIAL | IPF_PLAYER2, 70, 15, 0, 0 )
728 PORT_BIT ( 0xf000, IP_ACTIVE_LOW, IPT_UNKNOWN )
729 INPUT_PORTS_END
730
731 INPUT_PORTS_START( plumppop )
732 PORT_START /* DSW A */
733 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
734 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
735 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
736 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
737 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
738 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
739 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
740 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) )
741 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
742 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
743 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
744 PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
745 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
746 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
747 PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
748 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
749 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
750 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
751 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
752 PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
753
754 PORT_START /* DSW B */
755 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
756 PORT_DIPSETTING( 0x02, "Easy" )
757 PORT_DIPSETTING( 0x03, "Medium" )
758 PORT_DIPSETTING( 0x01, "Hard" )
759 PORT_DIPSETTING( 0x00, "Hardest" )
760 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )
761 PORT_DIPSETTING( 0x08, "50k 150k" )
762 PORT_DIPSETTING( 0x0c, "70k 200k" )
763 PORT_DIPSETTING( 0x04, "100k 250k" )
764 PORT_DIPSETTING( 0x00, "200k 300k" )
765 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
766 PORT_DIPSETTING( 0x20, "2" )
767 PORT_DIPSETTING( 0x30, "3" )
768 PORT_DIPSETTING( 0x10, "4" )
769 PORT_DIPSETTING( 0x00, "5" )
770 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
771 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
772 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
773 PORT_DIPNAME( 0x80, 0x80, "Allow Continue" )
774 PORT_DIPSETTING( 0x00, DEF_STR( No ) )
775 PORT_DIPSETTING( 0x80, DEF_STR( Yes ) )
776
777 PORT_START /* IN0 */
778 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
779 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
780 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
781 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
782 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
783 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_CHEAT )
784 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
785 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
786
787 PORT_START /* IN1 */
788 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
789 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
790 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
791 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
792 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
793 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_CHEAT | IPF_PLAYER2 )
794 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
795 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
796
797 PORT_START /* IN2 */
798 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )
799 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
800 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
801 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
802 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_COIN1 )
803 PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_COIN2 )
804 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
805 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
806
807 PORT_START /* Coin 1 */
808 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
809 PORT_BIT( 0xfe, IP_ACTIVE_HIGH, IPT_UNUSED )
810
811 PORT_START /* Coin 2 */
812 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN2 )
813 PORT_BIT( 0xfe, IP_ACTIVE_HIGH, IPT_UNUSED )
814
815 PORT_START /* spinner 1 - read at f000/1 */
816 PORT_ANALOG( 0xffff, 0x0000, IPT_DIAL, 70, 15, 0, 0 )
817
818 PORT_START /* spinner 2 - read at f002/3 */
819 PORT_ANALOG( 0xffff, 0x0000, IPT_DIAL | IPF_PLAYER2, 70, 15, 0, 0 )
820 INPUT_PORTS_END
821
822 INPUT_PORTS_START( drtoppel )
823 PORT_START /* DSW A */
824 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
825 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
826 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
827 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
828 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
829 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
830 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
831 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) )
832 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
833 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
834 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
835 PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
836 PORT_DIPSETTING( 0x10, DEF_STR( 3C_1C ) )
837 PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) )
838 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
839 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
840 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_2C ) )
841 PORT_DIPSETTING( 0x80, DEF_STR( 1C_3C ) )
842 PORT_DIPSETTING( 0x40, DEF_STR( 1C_4C ) )
843 PORT_DIPSETTING( 0x00, DEF_STR( 1C_6C ) )
844
845 PORT_START /* DSW B */
846 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
847 PORT_DIPSETTING( 0x02, "Easy" )
848 PORT_DIPSETTING( 0x03, "Medium" )
849 PORT_DIPSETTING( 0x01, "Hard" )
850 PORT_DIPSETTING( 0x00, "Hardest" )
851 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )
852 PORT_DIPSETTING( 0x0c, "30000" )
853 PORT_DIPSETTING( 0x00, DEF_STR( Unknown ) )
854 PORT_DIPSETTING( 0x04, DEF_STR( Unknown ) )
855 PORT_DIPSETTING( 0x08, DEF_STR( Unknown ) )
856 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
857 PORT_DIPSETTING( 0x20, "2" )
858 PORT_DIPSETTING( 0x30, "3" )
859 PORT_DIPSETTING( 0x10, "4" )
860 PORT_DIPSETTING( 0x00, "5" )
861 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
862 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
863 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
864 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
865 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
866 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
867
868 PORT_START /* IN0 */
869 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
870 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
871 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
872 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
873 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
874 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
875 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
876 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
877
878 PORT_START /* IN1 */
879 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_PLAYER2 )
880 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER2 )
881 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_PLAYER2 )
882 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_PLAYER2 )
883 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
884 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
885 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
886 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
887
888 PORT_START /* IN2 */
889 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )
890 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
891 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
892 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
893 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
894 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
895 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
896 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
897
898 PORT_START /* Coin 1 */
899 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
900 PORT_BIT( 0xfe, IP_ACTIVE_HIGH, IPT_UNUSED )
901
902 PORT_START /* Coin 2 */
903 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN2 )
904 PORT_BIT( 0xfe, IP_ACTIVE_HIGH, IPT_UNUSED )
905 INPUT_PORTS_END
906
907 INPUT_PORTS_START( drtopplu )
908 PORT_START /* DSW A */
909 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
910 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
911 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
912 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
913 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
914 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
915 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
916 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) )
917 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
918 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
919 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
920 PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
921 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
922 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
923 PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
924 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
925 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
926 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
927 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
928 PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
929
930 PORT_START /* DSW B */
931 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
932 PORT_DIPSETTING( 0x02, "Easy" )
933 PORT_DIPSETTING( 0x03, "Medium" )
934 PORT_DIPSETTING( 0x01, "Hard" )
935 PORT_DIPSETTING( 0x00, "Hardest" )
936 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )
937 PORT_DIPSETTING( 0x0c, "30000" )
938 PORT_DIPSETTING( 0x00, DEF_STR( Unknown ) )
939 PORT_DIPSETTING( 0x04, DEF_STR( Unknown ) )
940 PORT_DIPSETTING( 0x08, DEF_STR( Unknown ) )
941 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
942 PORT_DIPSETTING( 0x20, "2" )
943 PORT_DIPSETTING( 0x30, "3" )
944 PORT_DIPSETTING( 0x10, "4" )
945 PORT_DIPSETTING( 0x00, "5" )
946 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
947 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
948 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
949 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
950 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
951 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
952
953 PORT_START /* IN0 */
954 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
955 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
956 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
957 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
958 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
959 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
960 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
961 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
962
963 PORT_START /* IN1 */
964 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_PLAYER2 )
965 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER2 )
966 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_PLAYER2 )
967 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_PLAYER2 )
968 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
969 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
970 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
971 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
972
973 PORT_START /* IN2 */
974 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )
975 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
976 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
977 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
978 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
979 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
980 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
981 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
982
983 PORT_START /* Coin 1 */
984 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
985 PORT_BIT( 0xfe, IP_ACTIVE_HIGH, IPT_UNUSED )
986
987 PORT_START /* Coin 2 */
988 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN2 )
989 PORT_BIT( 0xfe, IP_ACTIVE_HIGH, IPT_UNUSED )
990 INPUT_PORTS_END
991
992 INPUT_PORTS_START( chukatai )
993 PORT_START /* DSW A */
994 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
995 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
996 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
997 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
998 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
999 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1000 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
1001 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) )
1002 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1003 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
1004 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
1005 PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
1006 PORT_DIPSETTING( 0x10, DEF_STR( 3C_1C ) )
1007 PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) )
1008 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
1009 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
1010 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_2C ) )
1011 PORT_DIPSETTING( 0x80, DEF_STR( 1C_3C ) )
1012 PORT_DIPSETTING( 0x40, DEF_STR( 1C_4C ) )
1013 PORT_DIPSETTING( 0x00, DEF_STR( 1C_6C ) )
1014
1015 PORT_START /* DSW B */
1016 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
1017 PORT_DIPSETTING( 0x02, "Easy" )
1018 PORT_DIPSETTING( 0x03, "Medium" )
1019 PORT_DIPSETTING( 0x01, "Hard" )
1020 PORT_DIPSETTING( 0x00, "Hardest" )
1021 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )
1022 PORT_DIPSETTING( 0x08, "100k 300k 440k" )
1023 PORT_DIPSETTING( 0x00, "100k 300k 500k" )
1024 PORT_DIPSETTING( 0x0c, "100k 400k" )
1025 PORT_DIPSETTING( 0x04, "100k 500k" )
1026 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
1027 PORT_DIPSETTING( 0x00, "1" )
1028 PORT_DIPSETTING( 0x10, "2" )
1029 PORT_DIPSETTING( 0x30, "3" )
1030 PORT_DIPSETTING( 0x20, "4" )
1031 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
1032 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1033 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1034 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
1035 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1036 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1037
1038 PORT_START /* IN0 */
1039 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
1040 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
1041 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
1042 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
1043 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
1044 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
1045 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1046 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
1047
1048 PORT_START /* IN1 */
1049 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_PLAYER2 )
1050 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER2 )
1051 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_PLAYER2 )
1052 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_PLAYER2 )
1053 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
1054 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
1055 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1056 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
1057
1058 PORT_START /* IN2 */
1059 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )
1060 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
1061 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
1062 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
1063 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
1064 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
1065 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1066 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1067
1068 PORT_START /* Coin 1 */
1069 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
1070 PORT_BIT( 0xfe, IP_ACTIVE_HIGH, IPT_UNUSED )
1071
1072 PORT_START /* Coin 2 */
1073 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN2 )
1074 PORT_BIT( 0xfe, IP_ACTIVE_HIGH, IPT_UNUSED )
1075 INPUT_PORTS_END
1076
1077 INPUT_PORTS_START( chukatau )
1078 PORT_START /* DSW A */
1079 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
1080 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
1081 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
1082 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
1083 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
1084 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1085 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
1086 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) )
1087 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1088 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
1089 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
1090 PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
1091 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
1092 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
1093 PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
1094 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
1095 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
1096 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
1097 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
1098 PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
1099
1100 PORT_START /* DSW B */
1101 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
1102 PORT_DIPSETTING( 0x02, "Easy" )
1103 PORT_DIPSETTING( 0x03, "Medium" )
1104 PORT_DIPSETTING( 0x01, "Hard" )
1105 PORT_DIPSETTING( 0x00, "Hardest" )
1106 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )
1107 PORT_DIPSETTING( 0x08, "100k 300k 440k" )
1108 PORT_DIPSETTING( 0x00, "100k 300k 500k" )
1109 PORT_DIPSETTING( 0x0c, "100k 400k" )
1110 PORT_DIPSETTING( 0x04, "100k 500k" )
1111 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
1112 PORT_DIPSETTING( 0x00, "1" )
1113 PORT_DIPSETTING( 0x10, "2" )
1114 PORT_DIPSETTING( 0x30, "3" )
1115 PORT_DIPSETTING( 0x20, "4" )
1116 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
1117 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1118 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1119 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
1120 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1121 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1122
1123 PORT_START /* IN0 */
1124 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
1125 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
1126 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
1127 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
1128 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
1129 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
1130 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1131 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
1132
1133 PORT_START /* IN1 */
1134 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_PLAYER2 )
1135 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER2 )
1136 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_PLAYER2 )
1137 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_PLAYER2 )
1138 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
1139 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
1140 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1141 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
1142
1143 PORT_START /* IN2 */
1144 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )
1145 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
1146 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
1147 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
1148 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
1149 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
1150 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1151 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1152
1153 PORT_START /* Coin 1 */
1154 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
1155 PORT_BIT( 0xfe, IP_ACTIVE_HIGH, IPT_UNUSED )
1156
1157 PORT_START /* Coin 2 */
1158 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN2 )
1159 PORT_BIT( 0xfe, IP_ACTIVE_HIGH, IPT_UNUSED )
1160 INPUT_PORTS_END
1161
1162 INPUT_PORTS_START( tnzs )
1163 PORT_START /* DSW A */
1164 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
1165 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
1166 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
1167 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
1168 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
1169 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1170 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
1171 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
1172 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1173 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1174 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
1175 PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
1176 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
1177 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
1178 PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
1179 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
1180 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
1181 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
1182 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
1183 PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
1184
1185 PORT_START /* DSW B */
1186 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
1187 PORT_DIPSETTING( 0x02, "Easy" )
1188 PORT_DIPSETTING( 0x03, "Medium" )
1189 PORT_DIPSETTING( 0x01, "Hard" )
1190 PORT_DIPSETTING( 0x00, "Hardest" )
1191 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )
1192 PORT_DIPSETTING( 0x00, "50000 150000" )
1193 PORT_DIPSETTING( 0x0c, "70000 200000" )
1194 PORT_DIPSETTING( 0x04, "100000 250000" )
1195 PORT_DIPSETTING( 0x08, "200000 300000" )
1196 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
1197 PORT_DIPSETTING( 0x20, "2" )
1198 PORT_DIPSETTING( 0x30, "3" )
1199 PORT_DIPSETTING( 0x00, "4" )
1200 PORT_DIPSETTING( 0x10, "5" )
1201 PORT_DIPNAME( 0x40, 0x40, "Allow Continue" )
1202 PORT_DIPSETTING( 0x00, DEF_STR( No ) )
1203 PORT_DIPSETTING( 0x40, DEF_STR( Yes ) )
1204 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
1205 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1206 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1207
1208 PORT_START /* IN0 */
1209 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
1210 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
1211 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
1212 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
1213 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
1214 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
1215 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1216 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
1217
1218 PORT_START /* IN1 */
1219 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_PLAYER2 )
1220 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER2 )
1221 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_PLAYER2 )
1222 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_PLAYER2 )
1223 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
1224 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
1225 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1226 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
1227
1228 PORT_START /* IN2 */
1229 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )
1230 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
1231 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
1232 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
1233 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
1234 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
1235 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1236 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1237
1238 PORT_START /* Coin 1 */
1239 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
1240 PORT_BIT( 0xfe, IP_ACTIVE_HIGH, IPT_UNUSED )
1241
1242 PORT_START /* Coin 2 */
1243 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 )
1244 PORT_BIT( 0xfe, IP_ACTIVE_HIGH, IPT_UNUSED )
1245 INPUT_PORTS_END
1246
1247 INPUT_PORTS_START( tnzsb )
1248 PORT_START /* DSW A */
1249 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
1250 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
1251 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
1252 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
1253 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
1254 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1255 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
1256 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
1257 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1258 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1259 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
1260 PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
1261 PORT_DIPSETTING( 0x10, DEF_STR( 3C_1C ) )
1262 PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) )
1263 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
1264 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
1265 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_2C ) )
1266 PORT_DIPSETTING( 0x80, DEF_STR( 1C_3C ) )
1267 PORT_DIPSETTING( 0x40, DEF_STR( 1C_4C ) )
1268 PORT_DIPSETTING( 0x00, DEF_STR( 1C_6C ) )
1269
1270 PORT_START /* DSW B */
1271 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
1272 PORT_DIPSETTING( 0x02, "Easy" )
1273 PORT_DIPSETTING( 0x03, "Medium" )
1274 PORT_DIPSETTING( 0x01, "Hard" )
1275 PORT_DIPSETTING( 0x00, "Hardest" )
1276 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )
1277 PORT_DIPSETTING( 0x00, "50000 150000" )
1278 PORT_DIPSETTING( 0x0c, "70000 200000" )
1279 PORT_DIPSETTING( 0x04, "100000 250000" )
1280 PORT_DIPSETTING( 0x08, "200000 300000" )
1281 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
1282 PORT_DIPSETTING( 0x20, "2" )
1283 PORT_DIPSETTING( 0x30, "3" )
1284 PORT_DIPSETTING( 0x00, "4" )
1285 PORT_DIPSETTING( 0x10, "5" )
1286 PORT_DIPNAME( 0x40, 0x40, "Allow Continue" )
1287 PORT_DIPSETTING( 0x00, DEF_STR( No ) )
1288 PORT_DIPSETTING( 0x40, DEF_STR( Yes ) )
1289 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
1290 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1291 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1292
1293 PORT_START /* IN0 */
1294 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
1295 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
1296 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
1297 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
1298 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
1299 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
1300 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1301 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
1302
1303 PORT_START /* IN1 */
1304 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_COCKTAIL )
1305 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_COCKTAIL )
1306 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_COCKTAIL )
1307 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_COCKTAIL )
1308 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_COCKTAIL )
1309 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_COCKTAIL )
1310 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1311 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
1312
1313 PORT_START /* IN2 */
1314 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )
1315 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
1316 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
1317 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
1318 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
1319 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
1320 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1321 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1322 INPUT_PORTS_END
1323
1324 INPUT_PORTS_START( tnzs2 )
1325 PORT_START /* DSW A */
1326 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
1327 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
1328 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
1329 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
1330 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
1331 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1332 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
1333 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
1334 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1335 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1336 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
1337 PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
1338 PORT_DIPSETTING( 0x10, DEF_STR( 3C_1C ) )
1339 PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) )
1340 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
1341 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
1342 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_2C ) )
1343 PORT_DIPSETTING( 0x80, DEF_STR( 1C_3C ) )
1344 PORT_DIPSETTING( 0x40, DEF_STR( 1C_4C ) )
1345 PORT_DIPSETTING( 0x00, DEF_STR( 1C_6C ) )
1346
1347 PORT_START /* DSW B */
1348 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
1349 PORT_DIPSETTING( 0x02, "Easy" )
1350 PORT_DIPSETTING( 0x03, "Medium" )
1351 PORT_DIPSETTING( 0x01, "Hard" )
1352 PORT_DIPSETTING( 0x00, "Hardest" )
1353 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )
1354 PORT_DIPSETTING( 0x00, "10000 100000" )
1355 PORT_DIPSETTING( 0x0c, "10000 150000" )
1356 PORT_DIPSETTING( 0x08, "10000 200000" )
1357 PORT_DIPSETTING( 0x04, "10000 300000" )
1358 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
1359 PORT_DIPSETTING( 0x20, "2" )
1360 PORT_DIPSETTING( 0x30, "3" )
1361 PORT_DIPSETTING( 0x00, "4" )
1362 PORT_DIPSETTING( 0x10, "5" )
1363 PORT_DIPNAME( 0x40, 0x40, "Allow Continue" )
1364 PORT_DIPSETTING( 0x00, DEF_STR( No ) )
1365 PORT_DIPSETTING( 0x40, DEF_STR( Yes ) )
1366 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
1367 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1368 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1369
1370 PORT_START /* IN0 */
1371 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
1372 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
1373 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
1374 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
1375 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
1376 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
1377 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1378 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
1379
1380 PORT_START /* IN1 */
1381 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_PLAYER2 )
1382 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER2 )
1383 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_PLAYER2 )
1384 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_PLAYER2 )
1385 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
1386 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
1387 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1388 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
1389
1390 PORT_START /* IN2 */
1391 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )
1392 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
1393 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
1394 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
1395 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
1396 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
1397 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1398 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1399
1400 PORT_START /* Coin 1 */
1401 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
1402 PORT_BIT( 0xfe, IP_ACTIVE_HIGH, IPT_UNUSED )
1403
1404 PORT_START /* Coin 2 */
1405 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 )
1406 PORT_BIT( 0xfe, IP_ACTIVE_HIGH, IPT_UNUSED )
1407 INPUT_PORTS_END
1408
1409 INPUT_PORTS_START( insectx )
1410 PORT_START /* DSW A */
1411 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
1412 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
1413 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
1414 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
1415 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
1416 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1417 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
1418 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) )
1419 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1420 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
1421 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
1422 PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
1423 PORT_DIPSETTING( 0x10, DEF_STR( 3C_1C ) )
1424 PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) )
1425 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
1426 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
1427 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_2C ) )
1428 PORT_DIPSETTING( 0x80, DEF_STR( 1C_3C ) )
1429 PORT_DIPSETTING( 0x40, DEF_STR( 1C_4C ) )
1430 PORT_DIPSETTING( 0x00, DEF_STR( 1C_6C ) )
1431
1432 PORT_START /* DSW B */
1433 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
1434 PORT_DIPSETTING( 0x02, "Easy" )
1435 PORT_DIPSETTING( 0x03, "Medium" )
1436 PORT_DIPSETTING( 0x01, "Hard" )
1437 PORT_DIPSETTING( 0x00, "Hardest" )
1438 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )
1439 PORT_DIPSETTING( 0x08, "100k 200k 300k 440k" )
1440 PORT_DIPSETTING( 0x0c, "100k 400k" )
1441 PORT_DIPSETTING( 0x04, "100k 500k" )
1442 PORT_DIPSETTING( 0x00, "150000 Only" )
1443 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
1444 PORT_DIPSETTING( 0x00, "1" )
1445 PORT_DIPSETTING( 0x10, "2" )
1446 PORT_DIPSETTING( 0x30, "3" )
1447 PORT_DIPSETTING( 0x20, "4" )
1448 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
1449 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1450 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1451 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
1452 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1453 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1454
1455 PORT_START /* IN0 */
1456 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
1457 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
1458 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
1459 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
1460 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
1461 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
1462 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1463 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
1464
1465 PORT_START /* IN1 */
1466 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_COCKTAIL )
1467 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_COCKTAIL )
1468 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_COCKTAIL )
1469 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_COCKTAIL )
1470 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_COCKTAIL )
1471 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_COCKTAIL )
1472 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1473 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
1474
1475 PORT_START /* IN2 */
1476 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )
1477 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
1478 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 )
1479 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN1 )
1480 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
1481 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
1482 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1483 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1484 INPUT_PORTS_END
1485
1486 INPUT_PORTS_START( kageki )
1487 PORT_START /* DSW A */
1488 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
1489 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
1490 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
1491 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
1492 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
1493 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1494 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
1495 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) )
1496 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1497 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
1498 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
1499 PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
1500 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
1501 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
1502 PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
1503 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
1504 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
1505 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
1506 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
1507 PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
1508
1509 PORT_START /* DSW B */
1510 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
1511 PORT_DIPSETTING( 0x02, "Easy" )
1512 PORT_DIPSETTING( 0x03, "Medium" )
1513 PORT_DIPSETTING( 0x01, "Hard" )
1514 PORT_DIPSETTING( 0x00, "Hardest" )
1515 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
1516 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
1517 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1518 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
1519 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1520 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1521 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
1522 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
1523 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1524 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
1525 PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
1526 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1527 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
1528 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1529 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1530 PORT_DIPNAME( 0x80, 0x80, "Allow Continue" )
1531 PORT_DIPSETTING( 0x00, DEF_STR( No ) )
1532 PORT_DIPSETTING( 0x80, DEF_STR( Yes ) )
1533
1534 PORT_START /* IN0 */
1535 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
1536 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
1537 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
1538 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
1539 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
1540 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
1541 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1542 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
1543
1544 PORT_START /* IN1 */
1545 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_PLAYER2 )
1546 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER2 )
1547 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_PLAYER2 )
1548 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_PLAYER2 )
1549 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
1550 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
1551 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1552 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
1553
1554 PORT_START /* IN2 */
1555 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )
1556 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
1557 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
1558 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
1559 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
1560 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
1561 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1562 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1563 INPUT_PORTS_END
1564
1565
1566 static struct GfxLayout arknoid2_charlayout =
1567 {
1568 16,16,
1569 4096,
1570 4,
1571 { 3*4096*32*8, 2*4096*32*8, 1*4096*32*8, 0*4096*32*8 },
1572 { 0, 1, 2, 3, 4, 5, 6, 7,
1573 8*8+0,8*8+1,8*8+2,8*8+3,8*8+4,8*8+5,8*8+6,8*8+7},
1574 { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
1575 16*8, 17*8, 18*8, 19*8, 20*8, 21*8, 22*8, 23*8 },
1576 32*8
1577 };
1578
1579 static struct GfxLayout tnzs_charlayout =
1580 {
1581 16,16,
1582 8192,
1583 4,
1584 { 3*8192*32*8, 2*8192*32*8, 1*8192*32*8, 0*8192*32*8 },
1585 { 0, 1, 2, 3, 4, 5, 6, 7,
1586 8*8+0, 8*8+1, 8*8+2, 8*8+3, 8*8+4, 8*8+5, 8*8+6, 8*8+7 },
1587 { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
1588 16*8, 17*8, 18*8, 19*8, 20*8, 21*8, 22*8, 23*8 },
1589 32*8
1590 };
1591
1592 static struct GfxLayout insectx_charlayout =
1593 {
1594 16,16,
1595 8192,
1596 4,
1597 { 8, 0, 8192*64*8+8, 8192*64*8 },
1598 { 0, 1, 2, 3, 4, 5, 6, 7,
1599 8*16+0, 8*16+1, 8*16+2, 8*16+3, 8*16+4, 8*16+5, 8*16+6, 8*16+7 },
1600 { 0*16, 1*16, 2*16, 3*16, 4*16, 5*16, 6*16, 7*16,
1601 16*16, 17*16, 18*16, 19*16, 20*16, 21*16, 22*16, 23*16 },
1602 64*8
1603 };
1604
1605 static struct GfxDecodeInfo arknoid2_gfxdecodeinfo[] =
1606 {
1607 { REGION_GFX1, 0, &arknoid2_charlayout, 0, 32 },
1608 { -1 } /* end of array */
1609 };
1610
1611 static struct GfxDecodeInfo tnzs_gfxdecodeinfo[] =
1612 {
1613 { REGION_GFX1, 0, &tnzs_charlayout, 0, 32 },
1614 { -1 } /* end of array */
1615 };
1616
1617 static struct GfxDecodeInfo insectx_gfxdecodeinfo[] =
1618 {
1619 { REGION_GFX1, 0, &insectx_charlayout, 0, 32 },
1620 { -1 } /* end of array */
1621 };
1622
1623
1624
1625 static struct YM2203interface ym2203_interface =
1626 {
1627 1, /* 1 chip */
1628 3000000, /* 3 MHz ??? */
1629 { YM2203_VOL(30,30) },
1630 { input_port_0_r }, /* DSW1 connected to port A */
1631 { input_port_1_r }, /* DSW2 connected to port B */
1632 { 0 },
1633 { 0 }
1634 };
1635
1636
1637 /* handler called by the 2203 emulator when the internal timers cause an IRQ */
irqhandler(int irq)1638 static void irqhandler(int irq)
1639 {
1640 cpu_set_nmi_line(2,irq ? ASSERT_LINE : CLEAR_LINE);
1641 }
1642
1643 static struct YM2203interface ym2203b_interface =
1644 {
1645 1, /* 1 chip */
1646 3000000, /* 3 MHz ??? */
1647 { YM2203_VOL(100,100) },
1648 { 0 },
1649 { 0 },
1650 { 0 },
1651 { 0 },
1652 { irqhandler }
1653 };
1654
1655 static struct YM2203interface kageki_ym2203_interface =
1656 {
1657 1, /* 1 chip */
1658 3000000, /* 12000000/4 ??? */
1659 { YM2203_VOL(35, 15) },
1660 { kageki_csport_r },
1661 { 0 },
1662 { 0 },
1663 { kageki_csport_w },
1664 };
1665
1666 static struct Samplesinterface samples_interface =
1667 {
1668 1, /* 1 channel */
1669 100 /* volume */
1670 };
1671
1672 static struct CustomSound_interface custom_interface =
1673 {
1674 kageki_init_samples,
1675 0,
1676 0
1677 };
1678
1679
1680 static MACHINE_DRIVER_START( arknoid2 )
1681
1682 /* basic machine hardware */
1683 MDRV_CPU_ADD(Z80, 8000000) /* ?? Hz (only crystal is 12MHz) */
1684 /* 8MHz is wrong, but extrmatn doesn't work properly at 6MHz */
1685 MDRV_CPU_MEMORY(readmem,writemem)
1686 MDRV_CPU_VBLANK_INT(arknoid2_interrupt,1)
1687
1688 MDRV_CPU_ADD(Z80, 6000000) /* ?? Hz */
1689 MDRV_CPU_MEMORY(sub_readmem,sub_writemem)
1690 MDRV_CPU_VBLANK_INT(irq0_line_hold,1)
1691
1692 MDRV_FRAMES_PER_SECOND(60)
1693 MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
1694 MDRV_INTERLEAVE(100)
1695
1696 MDRV_MACHINE_INIT(tnzs)
1697
1698 /* video hardware */
1699 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
1700 MDRV_SCREEN_SIZE(32*8, 32*8)
1701 MDRV_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
1702 MDRV_GFXDECODE(arknoid2_gfxdecodeinfo)
1703 MDRV_PALETTE_LENGTH(512)
1704
1705 MDRV_PALETTE_INIT(arknoid2)
1706 MDRV_VIDEO_UPDATE(tnzs)
1707
1708 /* sound hardware */
1709 MDRV_SOUND_ADD(YM2203, ym2203_interface)
1710 MACHINE_DRIVER_END
1711
1712
1713 static MACHINE_DRIVER_START( drtoppel )
1714
1715 /* basic machine hardware */
1716 MDRV_CPU_ADD(Z80,12000000/2) /* 6.0 MHz ??? - Main board Crystal is 12MHz */
1717 MDRV_CPU_MEMORY(readmem,writemem)
1718 MDRV_CPU_VBLANK_INT(arknoid2_interrupt,1)
1719
1720 MDRV_CPU_ADD(Z80,12000000/2) /* 6.0 MHz ??? - Main board Crystal is 12MHz */
1721 MDRV_CPU_MEMORY(sub_readmem,sub_writemem)
1722 MDRV_CPU_VBLANK_INT(irq0_line_hold,1)
1723
1724 MDRV_FRAMES_PER_SECOND(60)
1725 MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
1726 MDRV_INTERLEAVE(100)
1727
1728 MDRV_MACHINE_INIT(tnzs)
1729
1730 /* video hardware */
1731 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
1732 MDRV_SCREEN_SIZE(32*8, 32*8)
1733 MDRV_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
1734 MDRV_GFXDECODE(tnzs_gfxdecodeinfo)
1735 MDRV_PALETTE_LENGTH(512)
1736
1737 MDRV_PALETTE_INIT(arknoid2)
1738 MDRV_VIDEO_UPDATE(tnzs)
1739
1740 /* sound hardware */
1741 MDRV_SOUND_ADD(YM2203, ym2203_interface)
1742 MACHINE_DRIVER_END
1743
1744
1745 static MACHINE_DRIVER_START( tnzs )
1746
1747 /* basic machine hardware */
1748 MDRV_CPU_ADD(Z80,12000000/2) /* 6.0 MHz ??? - Main board Crystal is 12MHz */
1749 MDRV_CPU_MEMORY(readmem,writemem)
1750 MDRV_CPU_VBLANK_INT(irq0_line_hold,1)
1751
1752 MDRV_CPU_ADD(Z80,12000000/2) /* 6.0 MHz ??? - Main board Crystal is 12MHz */
1753 MDRV_CPU_MEMORY(sub_readmem,sub_writemem)
1754 MDRV_CPU_VBLANK_INT(irq0_line_hold,1)
1755
1756 MDRV_CPU_ADD(I8X41,(12000000/2)/I8X41_CLOCK_DIVIDER) /* 400KHz ??? - Main board Crystal is 12MHz */
1757 MDRV_CPU_MEMORY(i8742_readmem,i8742_writemem)
1758 MDRV_CPU_PORTS(i8742_readport,i8742_writeport)
1759
1760 MDRV_FRAMES_PER_SECOND(60)
1761 MDRV_VBLANK_DURATION(DEFAULT_REAL_60HZ_VBLANK_DURATION)
1762 MDRV_INTERLEAVE(500) /* 500 CPU slices per frame - heavy sync required in order to*/
1763 /* avoid crashes/hangs -kal 14 jul 2002 */
1764 MDRV_MACHINE_INIT(tnzs)
1765
1766 /* video hardware */
1767 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
1768 MDRV_SCREEN_SIZE(32*8, 32*8)
1769 MDRV_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
1770 MDRV_GFXDECODE(tnzs_gfxdecodeinfo)
1771 MDRV_PALETTE_LENGTH(512)
1772
1773 MDRV_VIDEO_UPDATE(tnzs)
1774
1775 /* sound hardware */
1776 MDRV_SOUND_ADD(YM2203, ym2203_interface)
1777 MACHINE_DRIVER_END
1778
1779
1780 static MACHINE_DRIVER_START( tnzsb )
1781
1782 /* basic machine hardware */
1783 MDRV_CPU_ADD(Z80, 6000000) /* 6 MHz(?) */
1784 MDRV_CPU_MEMORY(readmem,writemem)
1785 MDRV_CPU_VBLANK_INT(irq0_line_hold,1)
1786
1787 MDRV_CPU_ADD(Z80, 6000000) /* 6 MHz(?) */
1788 MDRV_CPU_MEMORY(tnzsb_readmem1,tnzsb_writemem1)
1789 MDRV_CPU_VBLANK_INT(irq0_line_hold,1)
1790
1791 MDRV_CPU_ADD(Z80, 4000000) /* 4 MHz??? */
1792 MDRV_CPU_MEMORY(tnzsb_readmem2,tnzsb_writemem2)
1793 MDRV_CPU_PORTS(tnzsb_readport,tnzsb_writeport)
1794
1795 MDRV_FRAMES_PER_SECOND(60)
1796 MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
1797 MDRV_INTERLEAVE(200) /* 200 CPU slices per frame - an high value to ensure proper */
1798 /* synchronization of the CPUs */
1799 MDRV_MACHINE_INIT(tnzs)
1800
1801 /* video hardware */
1802 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
1803 MDRV_SCREEN_SIZE(32*8, 32*8)
1804 MDRV_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
1805 MDRV_GFXDECODE(tnzs_gfxdecodeinfo)
1806 MDRV_PALETTE_LENGTH(512)
1807
1808 MDRV_VIDEO_UPDATE(tnzs)
1809
1810 /* sound hardware */
1811 MDRV_SOUND_ADD(YM2203, ym2203b_interface)
1812 MACHINE_DRIVER_END
1813
1814
1815 static MACHINE_DRIVER_START( insectx )
1816
1817 /* basic machine hardware */
1818 MDRV_CPU_ADD(Z80, 6000000) /* 6 MHz(?) */
1819 MDRV_CPU_MEMORY(readmem,writemem)
1820 MDRV_CPU_VBLANK_INT(irq0_line_hold,1)
1821
1822 MDRV_CPU_ADD(Z80, 6000000) /* 6 MHz(?) */
1823 MDRV_CPU_MEMORY(sub_readmem,sub_writemem)
1824 MDRV_CPU_VBLANK_INT(irq0_line_hold,1)
1825
1826 MDRV_FRAMES_PER_SECOND(60)
1827 MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
1828 MDRV_INTERLEAVE(200) /* 200 CPU slices per frame - an high value to ensure proper */
1829 /* synchronization of the CPUs */
1830 MDRV_MACHINE_INIT(tnzs)
1831
1832 /* video hardware */
1833 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
1834 MDRV_SCREEN_SIZE(32*8, 32*8)
1835 MDRV_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
1836 MDRV_GFXDECODE(insectx_gfxdecodeinfo)
1837 MDRV_PALETTE_LENGTH(512)
1838
1839 MDRV_VIDEO_UPDATE(tnzs)
1840
1841 /* sound hardware */
1842 MDRV_SOUND_ADD(YM2203, ym2203_interface)
1843 MACHINE_DRIVER_END
1844
1845
1846 static MACHINE_DRIVER_START( kageki )
1847
1848 /* basic machine hardware */
1849 MDRV_CPU_ADD(Z80, 6000000) /* 12000000/2 ??? */
1850 MDRV_CPU_MEMORY(readmem,writemem)
1851 MDRV_CPU_VBLANK_INT(irq0_line_hold,1)
1852
1853 MDRV_CPU_ADD(Z80, 4000000) /* 12000000/3 ??? */
1854 MDRV_CPU_MEMORY(kageki_sub_readmem,kageki_sub_writemem)
1855 MDRV_CPU_VBLANK_INT(irq0_line_hold,1)
1856
1857 MDRV_FRAMES_PER_SECOND(60)
1858 MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
1859 MDRV_INTERLEAVE(200) /* 200 CPU slices per frame - an high value to ensure proper */
1860 /* synchronization of the CPUs */
1861 MDRV_MACHINE_INIT(tnzs)
1862
1863 /* video hardware */
1864 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
1865 MDRV_SCREEN_SIZE(32*8, 32*8)
1866 MDRV_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
1867 MDRV_GFXDECODE(tnzs_gfxdecodeinfo)
1868 MDRV_PALETTE_LENGTH(512)
1869
1870 MDRV_VIDEO_UPDATE(tnzs)
1871
1872 /* sound hardware */
1873 MDRV_SOUND_ADD(YM2203, kageki_ym2203_interface)
1874 MDRV_SOUND_ADD(SAMPLES, samples_interface)
1875 MDRV_SOUND_ADD(CUSTOM, custom_interface)
1876 MACHINE_DRIVER_END
1877
1878
1879
1880 /***************************************************************************
1881
1882 Game driver(s)
1883
1884 ***************************************************************************/
1885
1886 ROM_START( plumppop )
1887 ROM_REGION( 0x30000, REGION_CPU1, 0 ) /* 64k + bankswitch areas for the first CPU */
1888 ROM_LOAD( "a98-09.bin", 0x00000, 0x08000, CRC(107f9e06) SHA1(0aa7f32721c3cab96eccc7c831b9f57877c4e1dc) )
1889 ROM_CONTINUE( 0x18000, 0x08000 ) /* banked at 8000-bfff */
1890 ROM_LOAD( "a98-10.bin", 0x20000, 0x10000, CRC(df6e6af2) SHA1(792f97f587e84cdd67f0d1efe1fd13ea904d7e20) ) /* banked at 8000-bfff */
1891
1892 ROM_REGION( 0x18000, REGION_CPU2, 0 ) /* 64k for the second CPU */
1893 ROM_LOAD( "a98-11.bin", 0x00000, 0x08000, CRC(bc56775c) SHA1(0c22c22c0e9d7ec0e34f8ab4bfe61068f65e8759) )
1894 ROM_CONTINUE( 0x10000, 0x08000 ) /* banked at 8000-9fff */
1895
1896 ROM_REGION( 0x1000, REGION_CPU3, 0 ) /* M-Chip (i8742 internal ROM) */
1897 ROM_LOAD( "plmp8742.bin", 0x0000, 0x0800, NO_DUMP )
1898
1899 ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
1900 ROM_LOAD( "a98-01.bin", 0x00000, 0x10000, CRC(f3033dca) SHA1(130744998f0531a82de2814231dddea3ad710f60) )
1901 ROM_RELOAD( 0x10000, 0x10000 )
1902 ROM_LOAD( "a98-02.bin", 0x20000, 0x10000, CRC(f2d17b0c) SHA1(418c8e383b8d4d54d723ae3512829a95e6897ee1) )
1903 ROM_RELOAD( 0x30000, 0x10000 )
1904 ROM_LOAD( "a98-03.bin", 0x40000, 0x10000, CRC(1a519b0a) SHA1(9217c6bf564ccd4a44f9cf2045102e667dc0b036) )
1905 ROM_RELOAD( 0x40000, 0x10000 )
1906 ROM_LOAD( "a98-04.bin", 0x60000, 0x10000, CRC(b64501a1) SHA1(6d96172b7d7d2276787013fe6b47bb7fef0a4e36) )
1907 ROM_RELOAD( 0x70000, 0x10000 )
1908 ROM_LOAD( "a98-05.bin", 0x80000, 0x10000, CRC(45c36963) SHA1(2f23bff22e218f542c50bf7e4ae8ab6db93180b0) )
1909 ROM_RELOAD( 0x90000, 0x10000 )
1910 ROM_LOAD( "a98-06.bin", 0xa0000, 0x10000, CRC(e075341b) SHA1(b5e68b5da7933c7eff21fa832e089edcbb49cdb4) )
1911 ROM_RELOAD( 0xb0000, 0x10000 )
1912 ROM_LOAD( "a98-07.bin", 0xc0000, 0x10000, CRC(8e16cd81) SHA1(6bc9dc8e29197b75c3c4ac4f066037bb9b8cebb4) )
1913 ROM_RELOAD( 0xd0000, 0x10000 )
1914 ROM_LOAD( "a98-08.bin", 0xe0000, 0x10000, CRC(bfa7609a) SHA1(0b9aa89b5954334f40dda1f14b1691852c74fc37) )
1915 ROM_RELOAD( 0xf0000, 0x10000 )
1916
1917 ROM_REGION( 0x0400, REGION_PROMS, 0 ) /* color proms */
1918 ROM_LOAD( "a98-13.bpr", 0x0000, 0x200, CRC(7cde2da5) SHA1(0cccfc35fb716ebb4cffa85c75681f33ca80a56e) ) /* hi bytes */
1919 ROM_LOAD( "a98-12.bpr", 0x0200, 0x200, CRC(90dc9da7) SHA1(f719dead7f4597e5ee6f1103599505b98cb58299) ) /* lo bytes */
1920 ROM_END
1921
1922 ROM_START( extrmatn )
1923 ROM_REGION( 0x30000, REGION_CPU1, 0 ) /* Region 0 - main cpu */
1924 ROM_LOAD( "b06-20.bin", 0x00000, 0x08000, CRC(04e3fc1f) SHA1(b1cf2f79f43fa33d6175368c897f84ec6aa6e746) )
1925 ROM_CONTINUE( 0x18000, 0x08000 ) /* banked at 8000-bfff */
1926 ROM_LOAD( "b06-21.bin", 0x20000, 0x10000, CRC(1614d6a2) SHA1(f23d465af231ab5653c55748f686d8f25f52394b) ) /* banked at 8000-bfff */
1927
1928 ROM_REGION( 0x18000, REGION_CPU2, 0 ) /* Region 2 - sound cpu */
1929 ROM_LOAD( "b06-06.bin", 0x00000, 0x08000, CRC(744f2c84) SHA1(7565c1594c2a3bae1ae45afcbf93363fe2b12d58) )
1930 ROM_CONTINUE( 0x10000, 0x08000 ) /* banked at 8000-9fff */
1931
1932 ROM_REGION( 0x1000, REGION_CPU3, 0 ) /* M-Chip (i8742 internal ROM) */
1933 ROM_LOAD( "extr8742.bin", 0x0000, 0x0800, NO_DUMP )
1934
1935 ROM_REGION( 0x80000, REGION_GFX1, ROMREGION_DISPOSE )
1936 ROM_LOAD( "b06-01.bin", 0x00000, 0x20000, CRC(d2afbf7e) SHA1(28b4cf94798f049a9f8375464741dbef208d7290) )
1937 ROM_LOAD( "b06-02.bin", 0x20000, 0x20000, CRC(e0c2757a) SHA1(3c89044caa28b10b4d1bef1515881810c23d312a) )
1938 ROM_LOAD( "b06-03.bin", 0x40000, 0x20000, CRC(ee80ab9d) SHA1(f4e4833cadff7d856b5a8075a61d902427653e16) )
1939 ROM_LOAD( "b06-04.bin", 0x60000, 0x20000, CRC(3697ace4) SHA1(6d6e4e64147365bcfcf74a84eb7ae84dffedd304) )
1940
1941 ROM_REGION( 0x0400, REGION_PROMS, 0 )
1942 ROM_LOAD( "b06-09.bin", 0x00000, 0x200, CRC(f388b361) SHA1(f00db6ad6994cfe9b7ad76e30b7049b11f8c16e4) ) /* hi bytes */
1943 ROM_LOAD( "b06-08.bin", 0x00200, 0x200, CRC(10c9aac3) SHA1(09d6f791dea358e78099af7a370b00b8504ffc97) ) /* lo bytes */
1944 ROM_END
1945
1946 ROM_START( arknoid2 )
1947 ROM_REGION( 0x30000, REGION_CPU1, 0 ) /* Region 0 - main cpu */
1948 ROM_LOAD( "b08_05.11c", 0x00000, 0x08000, CRC(136edf9d) SHA1(f632321650897eee585511a84f451a205d1f7704) )
1949 ROM_CONTINUE( 0x18000, 0x08000 ) /* banked at 8000-bfff */
1950 /* 20000-2ffff empty */
1951
1952 ROM_REGION( 0x18000, REGION_CPU2, 0 ) /* Region 2 - sound cpu */
1953 ROM_LOAD( "b08_13.3e", 0x00000, 0x08000, CRC(e8035ef1) SHA1(9a54e952cff0036c4b6affd9ffb1097cdccbe255) )
1954 ROM_CONTINUE( 0x10000, 0x08000 ) /* banked at 8000-9fff */
1955
1956 ROM_REGION( 0x1000, REGION_CPU3, 0 ) /* M-Chip (i8742 internal ROM) */
1957 ROM_LOAD( "ark28742.bin", 0x0000, 0x0800, NO_DUMP )
1958
1959 ROM_REGION( 0x80000, REGION_GFX1, ROMREGION_DISPOSE )
1960 ROM_LOAD( "b08-01.13a", 0x00000, 0x20000, CRC(2ccc86b4) SHA1(eced1d7e687db0331507726946b6a19a690a7604) )
1961 ROM_LOAD( "b08-02.10a", 0x20000, 0x20000, CRC(056a985f) SHA1(6333b71c631d3307929aae633760870451830e10) )
1962 ROM_LOAD( "b08-03.7a", 0x40000, 0x20000, CRC(274a795f) SHA1(49353590e1a418843f57c715185e407a20021936) )
1963 ROM_LOAD( "b08-04.4a", 0x60000, 0x20000, CRC(9754f703) SHA1(0018ebf7da3f501345f3f5085d98d7614f8ce1b6) )
1964
1965 ROM_REGION( 0x0400, REGION_PROMS, 0 )
1966 ROM_LOAD( "b08-08.15f", 0x00000, 0x200, CRC(a4f7ebd9) SHA1(094eb63c18898c6ee8d722492bdfd28091c61773) ) /* hi bytes */
1967 ROM_LOAD( "b08-07.16f", 0x00200, 0x200, CRC(ea34d9f7) SHA1(9a46edc64f961bd96908419cabd92445d300fc19) ) /* lo bytes */
1968 ROM_END
1969
1970 ROM_START( arknid2u )
1971 ROM_REGION( 0x30000, REGION_CPU1, 0 ) /* Region 0 - main cpu */
1972 ROM_LOAD( "b08_11.11c", 0x00000, 0x08000, CRC(99555231) SHA1(2798f3f5b3f1fa27598fe7a6e95c75d9142c8d34) )
1973 ROM_CONTINUE( 0x18000, 0x08000 ) /* banked at 8000-bfff */
1974 /* 20000-2ffff empty */
1975
1976 ROM_REGION( 0x18000, REGION_CPU2, 0 ) /* Region 2 - sound cpu */
1977 ROM_LOAD( "b08_12.3e", 0x00000, 0x08000, CRC(dc84e27d) SHA1(d549d8c9fbec0521517f0c5f5cee763e27d48633) )
1978 ROM_CONTINUE( 0x10000, 0x08000 ) /* banked at 8000-9fff */
1979
1980 ROM_REGION( 0x1000, REGION_CPU3, 0 ) /* M-Chip (i8742 internal ROM) */
1981 ROM_LOAD( "ark28742.bin", 0x0000, 0x0800, NO_DUMP )
1982
1983 ROM_REGION( 0x80000, REGION_GFX1, ROMREGION_DISPOSE )
1984 ROM_LOAD( "b08-01.13a", 0x00000, 0x20000, CRC(2ccc86b4) SHA1(eced1d7e687db0331507726946b6a19a690a7604) )
1985 ROM_LOAD( "b08-02.10a", 0x20000, 0x20000, CRC(056a985f) SHA1(6333b71c631d3307929aae633760870451830e10) )
1986 ROM_LOAD( "b08-03.7a", 0x40000, 0x20000, CRC(274a795f) SHA1(49353590e1a418843f57c715185e407a20021936) )
1987 ROM_LOAD( "b08-04.4a", 0x60000, 0x20000, CRC(9754f703) SHA1(0018ebf7da3f501345f3f5085d98d7614f8ce1b6) )
1988
1989 ROM_REGION( 0x0400, REGION_PROMS, 0 )
1990 ROM_LOAD( "b08-08.15f", 0x00000, 0x200, CRC(a4f7ebd9) SHA1(094eb63c18898c6ee8d722492bdfd28091c61773) ) /* hi bytes */
1991 ROM_LOAD( "b08-07.16f", 0x00200, 0x200, CRC(ea34d9f7) SHA1(9a46edc64f961bd96908419cabd92445d300fc19) ) /* lo bytes */
1992 ROM_END
1993
1994 ROM_START( arknid2j )
1995 ROM_REGION( 0x30000, REGION_CPU1, 0 ) /* Region 0 - main cpu */
1996 ROM_LOAD( "b08_05.11c", 0x00000, 0x08000, CRC(136edf9d) SHA1(f632321650897eee585511a84f451a205d1f7704) )
1997 ROM_CONTINUE( 0x18000, 0x08000 ) /* banked at 8000-bfff */
1998 /* 20000-2ffff empty */
1999
2000 ROM_REGION( 0x18000, REGION_CPU2, 0 ) /* Region 2 - sound cpu */
2001 ROM_LOAD( "b08_06.3e", 0x00000, 0x08000, CRC(adfcd40c) SHA1(f91299407ed21e2dd244c9b1a315b27ed32f5514) )
2002 ROM_CONTINUE( 0x10000, 0x08000 ) /* banked at 8000-9fff */
2003
2004 ROM_REGION( 0x1000, REGION_CPU3, 0 ) /* M-Chip (i8742 internal ROM) */
2005 ROM_LOAD( "ark28742.bin", 0x0000, 0x0800, NO_DUMP )
2006
2007 ROM_REGION( 0x80000, REGION_GFX1, ROMREGION_DISPOSE )
2008 ROM_LOAD( "b08-01.13a", 0x00000, 0x20000, CRC(2ccc86b4) SHA1(eced1d7e687db0331507726946b6a19a690a7604) )
2009 ROM_LOAD( "b08-02.10a", 0x20000, 0x20000, CRC(056a985f) SHA1(6333b71c631d3307929aae633760870451830e10) )
2010 ROM_LOAD( "b08-03.7a", 0x40000, 0x20000, CRC(274a795f) SHA1(49353590e1a418843f57c715185e407a20021936) )
2011 ROM_LOAD( "b08-04.4a", 0x60000, 0x20000, CRC(9754f703) SHA1(0018ebf7da3f501345f3f5085d98d7614f8ce1b6) )
2012
2013 ROM_REGION( 0x0400, REGION_PROMS, 0 )
2014 ROM_LOAD( "b08-08.15f", 0x00000, 0x200, CRC(a4f7ebd9) SHA1(094eb63c18898c6ee8d722492bdfd28091c61773) ) /* hi bytes */
2015 ROM_LOAD( "b08-07.16f", 0x00200, 0x200, CRC(ea34d9f7) SHA1(9a46edc64f961bd96908419cabd92445d300fc19) ) /* lo bytes */
2016 ROM_END
2017
2018 ROM_START( drtoppel )
2019 ROM_REGION( 0x30000, REGION_CPU1, 0 ) /* 64k + bankswitch areas for the first CPU */
2020 ROM_LOAD( "b19-09.bin", 0x00000, 0x08000, CRC(3e654f82) SHA1(d9e351d82546b08eb7887ea1d976fa97a259db6e) )
2021 ROM_CONTINUE( 0x18000, 0x08000 ) /* banked at 8000-bfff */
2022 ROM_LOAD( "b19-10.bin", 0x20000, 0x10000, CRC(7e72fd25) SHA1(6035e4db75e6dc57b13bb6e92217d1c2d0ffdfd2) ) /* banked at 8000-bfff */
2023
2024 ROM_REGION( 0x18000, REGION_CPU2, 0 ) /* 64k for the second CPU */
2025 ROM_LOAD( "b19-11w", 0x00000, 0x08000, CRC(37a0d3fb) SHA1(f65fb9382af5f5b09725c39b660c5138b3912f53) )
2026 ROM_CONTINUE( 0x10000, 0x08000 ) /* banked at 8000-9fff */
2027
2028 ROM_REGION( 0x1000, REGION_CPU3, 0 ) /* M-Chip (i8742 internal ROM) */
2029 ROM_LOAD( "drt8742.bin", 0x0000, 0x0800, NO_DUMP )
2030
2031 ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
2032 ROM_LOAD( "b19-01.bin", 0x00000, 0x20000, CRC(a7e8a0c1) SHA1(a2f017ae5b6472d4202f126d0247b3fe4b1321d1) )
2033 ROM_LOAD( "b19-02.bin", 0x20000, 0x20000, CRC(790ae654) SHA1(5fd6b89918e1539e00c918959b96d2a9394c8abe) )
2034 ROM_LOAD( "b19-03.bin", 0x40000, 0x20000, CRC(495c4c5a) SHA1(a23b512cda4c0c535df5508a52faebe401c1797d) )
2035 ROM_LOAD( "b19-04.bin", 0x60000, 0x20000, CRC(647007a0) SHA1(10ec35a15091967038bb26fb116c47d730f69edc) )
2036 ROM_LOAD( "b19-05.bin", 0x80000, 0x20000, CRC(49f2b1a5) SHA1(5e98bb421afaa02471ad02213ea6ca23ff2f0e27) )
2037 ROM_LOAD( "b19-06.bin", 0xa0000, 0x20000, CRC(2d39f1d0) SHA1(2aa89a5cc7f026c8db9922b183319ff66ac4a071) )
2038 ROM_LOAD( "b19-07.bin", 0xc0000, 0x20000, CRC(8bb06f41) SHA1(a0c182d473317f2cdb31bdf39a2593c032002305) )
2039 ROM_LOAD( "b19-08.bin", 0xe0000, 0x20000, CRC(3584b491) SHA1(d0aca90708be241bbd3a1097220a85083337a4bc) )
2040
2041 ROM_REGION( 0x0400, REGION_PROMS, 0 ) /* color proms */
2042 ROM_LOAD( "b19-13.bin", 0x0000, 0x200, CRC(6a547980) SHA1(c82f8dfad028565b4b4e5be1167f2f290c929090) ) /* hi bytes */
2043 ROM_LOAD( "b19-12.bin", 0x0200, 0x200, CRC(5754e9d8) SHA1(8c7d29e22c90b1f72929b95675dc15e431aae044) ) /* lo bytes */
2044 ROM_END
2045
2046 ROM_START( drtopplu )
2047 ROM_REGION( 0x30000, REGION_CPU1, 0 ) /* 64k + bankswitch areas for the first CPU */
2048 ROM_LOAD( "b19-09.bin", 0x00000, 0x08000, CRC(3e654f82) SHA1(d9e351d82546b08eb7887ea1d976fa97a259db6e) )
2049 ROM_CONTINUE( 0x18000, 0x08000 ) /* banked at 8000-bfff */
2050 ROM_LOAD( "b19-10.bin", 0x20000, 0x10000, CRC(7e72fd25) SHA1(6035e4db75e6dc57b13bb6e92217d1c2d0ffdfd2) ) /* banked at 8000-bfff */
2051
2052 ROM_REGION( 0x18000, REGION_CPU2, 0 ) /* 64k for the second CPU */
2053 ROM_LOAD( "b19-11u", 0x00000, 0x08000, CRC(05565b22) SHA1(d1aa47b438d3b44c5177337809e38b50f6445c36) )
2054 ROM_CONTINUE( 0x10000, 0x08000 ) /* banked at 8000-9fff */
2055
2056 ROM_REGION( 0x1000, REGION_CPU3, 0 ) /* M-Chip (i8742 internal ROM) */
2057 ROM_LOAD( "drt8742.bin", 0x0000, 0x0800, NO_DUMP )
2058
2059 ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
2060 ROM_LOAD( "b19-01.bin", 0x00000, 0x20000, CRC(a7e8a0c1) SHA1(a2f017ae5b6472d4202f126d0247b3fe4b1321d1) )
2061 ROM_LOAD( "b19-02.bin", 0x20000, 0x20000, CRC(790ae654) SHA1(5fd6b89918e1539e00c918959b96d2a9394c8abe) )
2062 ROM_LOAD( "b19-03.bin", 0x40000, 0x20000, CRC(495c4c5a) SHA1(a23b512cda4c0c535df5508a52faebe401c1797d) )
2063 ROM_LOAD( "b19-04.bin", 0x60000, 0x20000, CRC(647007a0) SHA1(10ec35a15091967038bb26fb116c47d730f69edc) )
2064 ROM_LOAD( "b19-05.bin", 0x80000, 0x20000, CRC(49f2b1a5) SHA1(5e98bb421afaa02471ad02213ea6ca23ff2f0e27) )
2065 ROM_LOAD( "b19-06.bin", 0xa0000, 0x20000, CRC(2d39f1d0) SHA1(2aa89a5cc7f026c8db9922b183319ff66ac4a071) )
2066 ROM_LOAD( "b19-07.bin", 0xc0000, 0x20000, CRC(8bb06f41) SHA1(a0c182d473317f2cdb31bdf39a2593c032002305) )
2067 ROM_LOAD( "b19-08.bin", 0xe0000, 0x20000, CRC(3584b491) SHA1(d0aca90708be241bbd3a1097220a85083337a4bc) )
2068
2069 ROM_REGION( 0x0400, REGION_PROMS, 0 ) /* color proms */
2070 ROM_LOAD( "b19-13.bin", 0x0000, 0x200, CRC(6a547980) SHA1(c82f8dfad028565b4b4e5be1167f2f290c929090) ) /* hi bytes */
2071 ROM_LOAD( "b19-12.bin", 0x0200, 0x200, CRC(5754e9d8) SHA1(8c7d29e22c90b1f72929b95675dc15e431aae044) ) /* lo bytes */
2072 ROM_END
2073
2074 ROM_START( drtopplj )
2075 ROM_REGION( 0x30000, REGION_CPU1, 0 ) /* 64k + bankswitch areas for the first CPU */
2076 ROM_LOAD( "b19-09.bin", 0x00000, 0x08000, CRC(3e654f82) SHA1(d9e351d82546b08eb7887ea1d976fa97a259db6e) )
2077 ROM_CONTINUE( 0x18000, 0x08000 ) /* banked at 8000-bfff */
2078 ROM_LOAD( "b19-10.bin", 0x20000, 0x10000, CRC(7e72fd25) SHA1(6035e4db75e6dc57b13bb6e92217d1c2d0ffdfd2) ) /* banked at 8000-bfff */
2079
2080 ROM_REGION( 0x18000, REGION_CPU2, 0 ) /* 64k for the second CPU */
2081 ROM_LOAD( "b19-11j", 0x00000, 0x08000, CRC(524dc249) SHA1(158b2de0fcd17ad16ba72bb24888122bf704e216) )
2082 ROM_CONTINUE( 0x10000, 0x08000 ) /* banked at 8000-9fff */
2083
2084 ROM_REGION( 0x1000, REGION_CPU3, 0 ) /* M-Chip (i8742 internal ROM) */
2085 ROM_LOAD( "drt8742.bin", 0x0000, 0x0800, NO_DUMP )
2086
2087 ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
2088 ROM_LOAD( "b19-01.bin", 0x00000, 0x20000, CRC(a7e8a0c1) SHA1(a2f017ae5b6472d4202f126d0247b3fe4b1321d1) )
2089 ROM_LOAD( "b19-02.bin", 0x20000, 0x20000, CRC(790ae654) SHA1(5fd6b89918e1539e00c918959b96d2a9394c8abe) )
2090 ROM_LOAD( "b19-03.bin", 0x40000, 0x20000, CRC(495c4c5a) SHA1(a23b512cda4c0c535df5508a52faebe401c1797d) )
2091 ROM_LOAD( "b19-04.bin", 0x60000, 0x20000, CRC(647007a0) SHA1(10ec35a15091967038bb26fb116c47d730f69edc) )
2092 ROM_LOAD( "b19-05.bin", 0x80000, 0x20000, CRC(49f2b1a5) SHA1(5e98bb421afaa02471ad02213ea6ca23ff2f0e27) )
2093 ROM_LOAD( "b19-06.bin", 0xa0000, 0x20000, CRC(2d39f1d0) SHA1(2aa89a5cc7f026c8db9922b183319ff66ac4a071) )
2094 ROM_LOAD( "b19-07.bin", 0xc0000, 0x20000, CRC(8bb06f41) SHA1(a0c182d473317f2cdb31bdf39a2593c032002305) )
2095 ROM_LOAD( "b19-08.bin", 0xe0000, 0x20000, CRC(3584b491) SHA1(d0aca90708be241bbd3a1097220a85083337a4bc) )
2096
2097 ROM_REGION( 0x0400, REGION_PROMS, 0 ) /* color proms */
2098 ROM_LOAD( "b19-13.bin", 0x0000, 0x200, CRC(6a547980) SHA1(c82f8dfad028565b4b4e5be1167f2f290c929090) ) /* hi bytes */
2099 ROM_LOAD( "b19-12.bin", 0x0200, 0x200, CRC(5754e9d8) SHA1(8c7d29e22c90b1f72929b95675dc15e431aae044) ) /* lo bytes */
2100 ROM_END
2101
2102 ROM_START( kageki )
2103 ROM_REGION( 0x30000, REGION_CPU1, 0 )
2104 ROM_LOAD( "b35-16.11c", 0x00000, 0x08000, CRC(a4e6fd58) SHA1(7cfe5b3fa6c88cdab45719f5b58541270825ad30) ) /* US ver */
2105 ROM_CONTINUE( 0x18000, 0x08000 )
2106 ROM_LOAD( "b35-10.9c", 0x20000, 0x10000, CRC(b150457d) SHA1(a58e46e7dfdc93c2cc7c04d623d7754f85ba693b) )
2107
2108 ROM_REGION( 0x18000, REGION_CPU2, 0 )
2109 ROM_LOAD( "b35-17.43e", 0x00000, 0x08000, CRC(fdd9c246) SHA1(ac7a59ed19d0d81748cabd8b77a6ba3937e3cc99) ) /* US ver */
2110 ROM_CONTINUE( 0x10000, 0x08000 )
2111
2112 ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
2113 ROM_LOAD( "b35-01.13a", 0x00000, 0x20000, CRC(01d83a69) SHA1(92a84329306b58a45f7bb443a8642eeaeb04d553) )
2114 ROM_LOAD( "b35-02.12a", 0x20000, 0x20000, CRC(d8af47ac) SHA1(2ef9ca991bf55ed6c12bf3a7dc4aa904d7749d5c) )
2115 ROM_LOAD( "b35-03.10a", 0x40000, 0x20000, CRC(3cb68797) SHA1(e7669b1a9a26dede560cc87695004d29510bc1f5) )
2116 ROM_LOAD( "b35-04.8a", 0x60000, 0x20000, CRC(71c03f91) SHA1(edce6e5a52b0c83c1c3c6bf9bc6b7957f7941521) )
2117 ROM_LOAD( "b35-05.7a", 0x80000, 0x20000, CRC(a4e20c08) SHA1(5d1d23d1410fea8650b18c595b0170a17e5d89a6) )
2118 ROM_LOAD( "b35-06.5a", 0xa0000, 0x20000, CRC(3f8ab658) SHA1(44de7ee2bdb89bc520ed9bc812c26789c3f31411) )
2119 ROM_LOAD( "b35-07.4a", 0xc0000, 0x20000, CRC(1b4af049) SHA1(09783816d5076219d241538e2711402eb8c4cd03) )
2120 ROM_LOAD( "b35-08.2a", 0xe0000, 0x20000, CRC(deb2268c) SHA1(318bf3da6cbe20758397d5f78caf3cda02f322d7) )
2121
2122 ROM_REGION( 0x10000, REGION_SOUND1, 0 ) /* samples */
2123 ROM_LOAD( "b35-15.98g", 0x00000, 0x10000, CRC(e6212a0f) SHA1(43891f4fd141b00ed458be47a107a2550a0534c2) ) /* US ver */
2124 ROM_END
2125
2126 ROM_START( kagekij )
2127 ROM_REGION( 0x30000, REGION_CPU1, 0 )
2128 ROM_LOAD( "b35-09j.11c", 0x00000, 0x08000, CRC(829637d5) SHA1(0239ae925968336a90cbe16e23519773b6f2f2ac) ) /* JP ver */
2129 ROM_CONTINUE( 0x18000, 0x08000 )
2130 ROM_LOAD( "b35-10.9c", 0x20000, 0x10000, CRC(b150457d) SHA1(a58e46e7dfdc93c2cc7c04d623d7754f85ba693b) )
2131
2132 ROM_REGION( 0x18000, REGION_CPU2, 0 )
2133 ROM_LOAD( "b35-11j.43e", 0x00000, 0x08000, CRC(64d093fc) SHA1(3ca3f69d8946c453c0edb8586b92e2948a2d0b6c) ) /* JP ver */
2134 ROM_CONTINUE( 0x10000, 0x08000 )
2135
2136 ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
2137 ROM_LOAD( "b35-01.13a", 0x00000, 0x20000, CRC(01d83a69) SHA1(92a84329306b58a45f7bb443a8642eeaeb04d553) )
2138 ROM_LOAD( "b35-02.12a", 0x20000, 0x20000, CRC(d8af47ac) SHA1(2ef9ca991bf55ed6c12bf3a7dc4aa904d7749d5c) )
2139 ROM_LOAD( "b35-03.10a", 0x40000, 0x20000, CRC(3cb68797) SHA1(e7669b1a9a26dede560cc87695004d29510bc1f5) )
2140 ROM_LOAD( "b35-04.8a", 0x60000, 0x20000, CRC(71c03f91) SHA1(edce6e5a52b0c83c1c3c6bf9bc6b7957f7941521) )
2141 ROM_LOAD( "b35-05.7a", 0x80000, 0x20000, CRC(a4e20c08) SHA1(5d1d23d1410fea8650b18c595b0170a17e5d89a6) )
2142 ROM_LOAD( "b35-06.5a", 0xa0000, 0x20000, CRC(3f8ab658) SHA1(44de7ee2bdb89bc520ed9bc812c26789c3f31411) )
2143 ROM_LOAD( "b35-07.4a", 0xc0000, 0x20000, CRC(1b4af049) SHA1(09783816d5076219d241538e2711402eb8c4cd03) )
2144 ROM_LOAD( "b35-08.2a", 0xe0000, 0x20000, CRC(deb2268c) SHA1(318bf3da6cbe20758397d5f78caf3cda02f322d7) )
2145
2146 ROM_REGION( 0x10000, REGION_SOUND1, 0 ) /* samples */
2147 ROM_LOAD( "b35-12j.98g", 0x00000, 0x10000, CRC(184409f1) SHA1(711bdd499670e86630ebb6820262b1d8d651c987) ) /* JP ver */
2148 ROM_END
2149
2150 ROM_START( chukatai )
2151 ROM_REGION( 0x30000, REGION_CPU1, 0 ) /* 64k + bankswitch areas for the first CPU */
2152 ROM_LOAD( "b44-10", 0x00000, 0x08000, CRC(8c69e008) SHA1(7825965f517f3562a508345b7c0d32b8a57bd38a) )
2153 ROM_CONTINUE( 0x18000, 0x08000 ) /* banked at 8000-bfff */
2154 ROM_LOAD( "b44-11", 0x20000, 0x10000, CRC(32484094) SHA1(f320fea2910816b5085ca9aa37e30af665fb6be1) ) /* banked at 8000-bfff */
2155
2156 ROM_REGION( 0x18000, REGION_CPU2, 0 ) /* 64k for the second CPU */
2157 ROM_LOAD( "b44-12w", 0x00000, 0x08000, CRC(e80ecdca) SHA1(cd96403ca97f18f630118dcb3dc2179c01147213) )
2158 ROM_CONTINUE( 0x10000, 0x08000 ) /* banked at 8000-9fff */
2159
2160 ROM_REGION( 0x1000, REGION_CPU3, 0 ) /* M-Chip (i8742 internal ROM) */
2161 ROM_LOAD( "b44-8742.mcu", 0x0000, 0x0800, CRC(7dff3f9f) SHA1(bbf4e036d025fe8179b053d639f9b8ad401e6e68) )
2162
2163 ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
2164 ROM_LOAD( "b44-01.a13", 0x00000, 0x20000, CRC(aae7b3d5) SHA1(52809ea22d98811ece2fb27e80db6ddf4fbacb07) )
2165 ROM_LOAD( "b44-02.a12", 0x20000, 0x20000, CRC(7f0b9568) SHA1(415d2638d1b0eb36b2e2f63219cbc0dbebe02dc6) )
2166 ROM_LOAD( "b44-03.a10", 0x40000, 0x20000, CRC(5a54a3b9) SHA1(6b219f1c3570f16eb4a06221d7e527c735437bac) )
2167 ROM_LOAD( "b44-04.a08", 0x60000, 0x20000, CRC(3c5f544b) SHA1(d3b0ee18f1027483a36ef02757b62f42a086a8e2) )
2168 ROM_LOAD( "b44-05.a07", 0x80000, 0x20000, CRC(d1b7e314) SHA1(8b4181caa32955b4274614a4238bb24d67ecb729) )
2169 ROM_LOAD( "b44-06.a05", 0xa0000, 0x20000, CRC(269978a8) SHA1(aef7b8d3d00dcc4201e0a1e28026f6f1bdafd0b7) )
2170 ROM_LOAD( "b44-07.a04", 0xc0000, 0x20000, CRC(3e0e737e) SHA1(f8d62c7b69c79da9df7ef5ce454060d3645e5884) )
2171 ROM_LOAD( "b44-08.a02", 0xe0000, 0x20000, CRC(6cb1e8fc) SHA1(4ab0c2cce1de2616044a9bfb9bf17f95a49baffd) )
2172 ROM_END
2173
2174 ROM_START( chukatau )
2175 ROM_REGION( 0x30000, REGION_CPU1, 0 ) /* 64k + bankswitch areas for the first CPU */
2176 ROM_LOAD( "b44-10", 0x00000, 0x08000, CRC(8c69e008) SHA1(7825965f517f3562a508345b7c0d32b8a57bd38a) )
2177 ROM_CONTINUE( 0x18000, 0x08000 ) /* banked at 8000-bfff */
2178 ROM_LOAD( "b44-11", 0x20000, 0x10000, CRC(32484094) SHA1(f320fea2910816b5085ca9aa37e30af665fb6be1) ) /* banked at 8000-bfff */
2179
2180 ROM_REGION( 0x18000, REGION_CPU2, 0 ) /* 64k for the second CPU */
2181 ROM_LOAD( "b44-12u", 0x00000, 0x08000, CRC(9f09fd5c) SHA1(ae92f2e893e1e666dcabbd793f1a778c5e3d7bab) )
2182 ROM_CONTINUE( 0x10000, 0x08000 ) /* banked at 8000-9fff */
2183
2184 ROM_REGION( 0x1000, REGION_CPU3, 0 ) /* M-Chip (i8742 internal ROM) */
2185 ROM_LOAD( "b44-8742.mcu", 0x0000, 0x0800, CRC(7dff3f9f) SHA1(bbf4e036d025fe8179b053d639f9b8ad401e6e68) )
2186
2187 ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
2188 ROM_LOAD( "b44-01.a13", 0x00000, 0x20000, CRC(aae7b3d5) SHA1(52809ea22d98811ece2fb27e80db6ddf4fbacb07) )
2189 ROM_LOAD( "b44-02.a12", 0x20000, 0x20000, CRC(7f0b9568) SHA1(415d2638d1b0eb36b2e2f63219cbc0dbebe02dc6) )
2190 ROM_LOAD( "b44-03.a10", 0x40000, 0x20000, CRC(5a54a3b9) SHA1(6b219f1c3570f16eb4a06221d7e527c735437bac) )
2191 ROM_LOAD( "b44-04.a08", 0x60000, 0x20000, CRC(3c5f544b) SHA1(d3b0ee18f1027483a36ef02757b62f42a086a8e2) )
2192 ROM_LOAD( "b44-05.a07", 0x80000, 0x20000, CRC(d1b7e314) SHA1(8b4181caa32955b4274614a4238bb24d67ecb729) )
2193 ROM_LOAD( "b44-06.a05", 0xa0000, 0x20000, CRC(269978a8) SHA1(aef7b8d3d00dcc4201e0a1e28026f6f1bdafd0b7) )
2194 ROM_LOAD( "b44-07.a04", 0xc0000, 0x20000, CRC(3e0e737e) SHA1(f8d62c7b69c79da9df7ef5ce454060d3645e5884) )
2195 ROM_LOAD( "b44-08.a02", 0xe0000, 0x20000, CRC(6cb1e8fc) SHA1(4ab0c2cce1de2616044a9bfb9bf17f95a49baffd) )
2196 ROM_END
2197
2198 ROM_START( chukataj )
2199 ROM_REGION( 0x30000, REGION_CPU1, 0 ) /* 64k + bankswitch areas for the first CPU */
2200 ROM_LOAD( "b44-10", 0x00000, 0x08000, CRC(8c69e008) SHA1(7825965f517f3562a508345b7c0d32b8a57bd38a) )
2201 ROM_CONTINUE( 0x18000, 0x08000 ) /* banked at 8000-bfff */
2202 ROM_LOAD( "b44-11", 0x20000, 0x10000, CRC(32484094) SHA1(f320fea2910816b5085ca9aa37e30af665fb6be1) ) /* banked at 8000-bfff */
2203
2204 ROM_REGION( 0x18000, REGION_CPU2, 0 ) /* 64k for the second CPU */
2205 ROM_LOAD( "b44-12j", 0x00000, 0x08000, CRC(0600ace6) SHA1(3d5767b91ea63128bfbff3527ddcf90fcf43af2e) )
2206 ROM_CONTINUE( 0x10000, 0x08000 ) /* banked at 8000-9fff */
2207
2208 ROM_REGION( 0x1000, REGION_CPU3, 0 ) /* M-Chip (i8742 internal ROM) */
2209 ROM_LOAD( "b44-8742.mcu", 0x0000, 0x0800, CRC(7dff3f9f) SHA1(bbf4e036d025fe8179b053d639f9b8ad401e6e68) )
2210
2211 ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
2212 ROM_LOAD( "b44-01.a13", 0x00000, 0x20000, CRC(aae7b3d5) SHA1(52809ea22d98811ece2fb27e80db6ddf4fbacb07) )
2213 ROM_LOAD( "b44-02.a12", 0x20000, 0x20000, CRC(7f0b9568) SHA1(415d2638d1b0eb36b2e2f63219cbc0dbebe02dc6) )
2214 ROM_LOAD( "b44-03.a10", 0x40000, 0x20000, CRC(5a54a3b9) SHA1(6b219f1c3570f16eb4a06221d7e527c735437bac) )
2215 ROM_LOAD( "b44-04.a08", 0x60000, 0x20000, CRC(3c5f544b) SHA1(d3b0ee18f1027483a36ef02757b62f42a086a8e2) )
2216 ROM_LOAD( "b44-05.a07", 0x80000, 0x20000, CRC(d1b7e314) SHA1(8b4181caa32955b4274614a4238bb24d67ecb729) )
2217 ROM_LOAD( "b44-06.a05", 0xa0000, 0x20000, CRC(269978a8) SHA1(aef7b8d3d00dcc4201e0a1e28026f6f1bdafd0b7) )
2218 ROM_LOAD( "b44-07.a04", 0xc0000, 0x20000, CRC(3e0e737e) SHA1(f8d62c7b69c79da9df7ef5ce454060d3645e5884) )
2219 ROM_LOAD( "b44-08.a02", 0xe0000, 0x20000, CRC(6cb1e8fc) SHA1(4ab0c2cce1de2616044a9bfb9bf17f95a49baffd) )
2220 ROM_END
2221
2222 ROM_START( tnzs )
2223 ROM_REGION( 0x30000, REGION_CPU1, 0 ) /* 64k + bankswitch areas for the first CPU */
2224 ROM_LOAD( "b53_10.32", 0x00000, 0x08000, CRC(a73745c6) SHA1(73eb38e75e08312d752332f988dc655084b4a86d) )
2225 ROM_CONTINUE( 0x18000, 0x18000 ) /* banked at 8000-bfff */
2226
2227 ROM_REGION( 0x18000, REGION_CPU2, 0 ) /* 64k for the second CPU */
2228 ROM_LOAD( "b53_11.38", 0x00000, 0x08000, CRC(9784d443) SHA1(bc3647aac9974031dbe4898417fbaa99841f9548) )
2229 ROM_CONTINUE( 0x10000, 0x08000 ) /* banked at 8000-9fff */
2230
2231 ROM_REGION( 0x1000, REGION_CPU3, 0 ) /* M-Chip (i8742 internal ROM) */
2232 ROM_LOAD( "tnzs8742.u46", 0x0000, 0x0800, CRC(a4bfce19) SHA1(9340862d5bdc1ad4799dc92cae9bce1428b47478) )
2233
2234 ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
2235 /* ROMs taken from another set (the ones from this set were read incorrectly) */
2236 ROM_LOAD( "b53-08.8", 0x00000, 0x20000, CRC(c3519c2a) SHA1(30fe7946fbc95ab6b3ccb6944fb24bf47bf3d743) )
2237 ROM_LOAD( "b53-07.7", 0x20000, 0x20000, CRC(2bf199e8) SHA1(4ed73e4f00ae2f5f4028a0ea5ae3cd238863a370) )
2238 ROM_LOAD( "b53-06.6", 0x40000, 0x20000, CRC(92f35ed9) SHA1(5fdd8d6ddbb7be9887af3c8dea9ad3b58c4e86f9) )
2239 ROM_LOAD( "b53-05.5", 0x60000, 0x20000, CRC(edbb9581) SHA1(539396a01ca0b69455f000d446759b232530b542) )
2240 ROM_LOAD( "b53-04.4", 0x80000, 0x20000, CRC(59d2aef6) SHA1(b657b7603c3eb5f169000d38497ebb93f26f7832) )
2241 ROM_LOAD( "b53-03.3", 0xa0000, 0x20000, CRC(74acfb9b) SHA1(90b544ed7ede7565660bdd13c94c15c54423cda9) )
2242 ROM_LOAD( "b53-02.2", 0xc0000, 0x20000, CRC(095d0dc0) SHA1(ced2937d0594fa00ae344a4e3a3cba23772dc160) )
2243 ROM_LOAD( "b53-01.1", 0xe0000, 0x20000, CRC(9800c54d) SHA1(761647177d621ac2cdd8b009876eed35809f3c92) )
2244 ROM_END
2245
2246 ROM_START( tnzsb )
2247 ROM_REGION( 0x30000, REGION_CPU1, 0 ) /* 64k + bankswitch areas for the first CPU */
2248 ROM_LOAD( "nzsb5324.bin", 0x00000, 0x08000, CRC(d66824c6) SHA1(fd381ac0dc52ce670c3fde320ea60a209e288a52) )
2249 ROM_CONTINUE( 0x18000, 0x18000 ) /* banked at 8000-bfff */
2250
2251 ROM_REGION( 0x18000, REGION_CPU2, 0 ) /* 64k for the second CPU */
2252 ROM_LOAD( "nzsb5325.bin", 0x00000, 0x08000, CRC(d6ac4e71) SHA1(f3e71624a8a5e4e4c8a6aa01711ed26bdd5abf5a) )
2253 ROM_CONTINUE( 0x10000, 0x08000 ) /* banked at 8000-9fff */
2254
2255 ROM_REGION( 0x10000, REGION_CPU3, 0 ) /* 64k for the third CPU */
2256 ROM_LOAD( "nzsb5326.bin", 0x00000, 0x10000, CRC(cfd5649c) SHA1(4f6afccd535d39b41661dc3ccd17af125bfac015) )
2257
2258 ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
2259 /* ROMs taken from another set (the ones from this set were read incorrectly) */
2260 ROM_LOAD( "b53-08.8", 0x00000, 0x20000, CRC(c3519c2a) SHA1(30fe7946fbc95ab6b3ccb6944fb24bf47bf3d743) )
2261 ROM_LOAD( "b53-07.7", 0x20000, 0x20000, CRC(2bf199e8) SHA1(4ed73e4f00ae2f5f4028a0ea5ae3cd238863a370) )
2262 ROM_LOAD( "b53-06.6", 0x40000, 0x20000, CRC(92f35ed9) SHA1(5fdd8d6ddbb7be9887af3c8dea9ad3b58c4e86f9) )
2263 ROM_LOAD( "b53-05.5", 0x60000, 0x20000, CRC(edbb9581) SHA1(539396a01ca0b69455f000d446759b232530b542) )
2264 ROM_LOAD( "b53-04.4", 0x80000, 0x20000, CRC(59d2aef6) SHA1(b657b7603c3eb5f169000d38497ebb93f26f7832) )
2265 ROM_LOAD( "b53-03.3", 0xa0000, 0x20000, CRC(74acfb9b) SHA1(90b544ed7ede7565660bdd13c94c15c54423cda9) )
2266 ROM_LOAD( "b53-02.2", 0xc0000, 0x20000, CRC(095d0dc0) SHA1(ced2937d0594fa00ae344a4e3a3cba23772dc160) )
2267 ROM_LOAD( "b53-01.1", 0xe0000, 0x20000, CRC(9800c54d) SHA1(761647177d621ac2cdd8b009876eed35809f3c92) )
2268 ROM_END
2269
2270 ROM_START( tnzs2 )
2271 ROM_REGION( 0x30000, REGION_CPU1, 0 ) /* 64k + bankswitch areas for the first CPU */
2272 ROM_LOAD( "ns_c-11.rom", 0x00000, 0x08000, CRC(3c1dae7b) SHA1(0004fccc171714c80565326f8690f9662c5b75d9) )
2273 ROM_CONTINUE( 0x18000, 0x18000 ) /* banked at 8000-bfff */
2274
2275 ROM_REGION( 0x18000, REGION_CPU2, 0 ) /* 64k for the second CPU */
2276 ROM_LOAD( "ns_e-3.rom", 0x00000, 0x08000, CRC(c7662e96) SHA1(be28298bfde4e3867cfe75633ffb0f8611dbbd8b) )
2277 ROM_CONTINUE( 0x10000, 0x08000 )
2278
2279 ROM_REGION( 0x1000, REGION_CPU3, 0 ) /* M-Chip (i8742 internal ROM) */
2280 ROM_LOAD( "tnzs8742.u46", 0x0000, 0x0800, CRC(a4bfce19) SHA1(9340862d5bdc1ad4799dc92cae9bce1428b47478) )
2281
2282 ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
2283 ROM_LOAD( "ns_a13.rom", 0x00000, 0x20000, CRC(7e0bd5bb) SHA1(95dfb00ec915778e02d8bfa996735ab817191adc) )
2284 ROM_LOAD( "ns_a12.rom", 0x20000, 0x20000, CRC(95880726) SHA1(f4fdedd23e80a6ccf32f737ab4bc57f9fc0925be) )
2285 ROM_LOAD( "ns_a10.rom", 0x40000, 0x20000, CRC(2bc4c053) SHA1(cd7668a7733e5e80c2c566d0cf63c4310e5743b4) )
2286 ROM_LOAD( "ns_a08.rom", 0x60000, 0x20000, CRC(8ff8d88c) SHA1(31977e39ad048a077e9b5bd712ff66b14a466d27) )
2287 ROM_LOAD( "ns_a07.rom", 0x80000, 0x20000, CRC(291bcaca) SHA1(4f659a0cd2ff6b4ec04ab95ee8a670222c402c2b) )
2288 ROM_LOAD( "ns_a05.rom", 0xa0000, 0x20000, CRC(6e762e20) SHA1(66731fe4053b9c09bc9c95d10aba212db08b4636) )
2289 ROM_LOAD( "ns_a04.rom", 0xc0000, 0x20000, CRC(e1fd1b9d) SHA1(6027491b927c2ab9c77fbf8895da1abcfbe32d62) )
2290 ROM_LOAD( "ns_a02.rom", 0xe0000, 0x20000, CRC(2ab06bda) SHA1(2b208b564e55c258665e1f66b26fe14a6c68eb96) )
2291 ROM_END
2292
2293 ROM_START( insectx )
2294 ROM_REGION( 0x30000, REGION_CPU1, 0 ) /* 64k + bankswitch areas for the first CPU */
2295 ROM_LOAD( "insector.u32", 0x00000, 0x08000, CRC(18eef387) SHA1(b22633930d39be1e72fbd5b080972122da3cb3ef) )
2296 ROM_CONTINUE( 0x18000, 0x18000 ) /* banked at 8000-bfff */
2297
2298 ROM_REGION( 0x18000, REGION_CPU2, 0 ) /* 64k for the second CPU */
2299 ROM_LOAD( "insector.u38", 0x00000, 0x08000, CRC(324b28c9) SHA1(db77a4ac60196d0f0f35dbc5c951ec29d6392463) )
2300 ROM_CONTINUE( 0x10000, 0x08000 ) /* banked at 8000-9fff */
2301
2302 ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
2303 ROM_LOAD( "insector.r15", 0x00000, 0x80000, CRC(d00294b1) SHA1(f43a4f7d13193ddbbcdef71a5085c1db0fc062d4) )
2304 ROM_LOAD( "insector.r16", 0x80000, 0x80000, CRC(db5a7434) SHA1(71fac872b19a13a7ad25c8ad895c322ec9573fdc) )
2305 ROM_END
2306
2307
2308 /* ( YEAR NAME PARENT MACHINE INPUT INIT MONITOR COMPANY FULLNAME FLAGS ) */
2309 GAME( 1987, plumppop, 0, drtoppel, plumppop, drtoppel, ROT0, "Taito Corporation", "Plump Pop (Japan)" )
2310 GAME( 1987, extrmatn, 0, arknoid2, extrmatn, extrmatn, ROT270, "[Taito] World Games", "Extermination (US)" )
2311 GAME( 1987, arknoid2, 0, arknoid2, arknoid2, arknoid2, ROT270, "Taito Corporation Japan", "Arkanoid - Revenge of DOH (World)" )
2312 GAME( 1987, arknid2u, arknoid2, arknoid2, arknid2u, arknoid2, ROT270, "Taito America Corporation (Romstar license)", "Arkanoid - Revenge of DOH (US)" )
2313 GAME( 1987, arknid2j, arknoid2, arknoid2, arknid2u, arknoid2, ROT270, "Taito Corporation", "Arkanoid - Revenge of DOH (Japan)" )
2314 GAME( 1987, drtoppel, 0, drtoppel, drtoppel, drtoppel, ROT90, "Taito Corporation Japan", "Dr. Toppel's Adventure (World)" )
2315 GAME( 1987, drtopplu, drtoppel, drtoppel, drtopplu, drtoppel, ROT90, "Taito America Corporation", "Dr. Toppel's Adventure (US)" )
2316 GAME( 1987, drtopplj, drtoppel, drtoppel, drtopplu, drtoppel, ROT90, "Taito Corporation", "Dr. Toppel's Tankentai (Japan)" )
2317 GAME( 1988, kageki, 0, kageki, kageki, kageki, ROT90, "Taito America Corporation (Romstar license)", "Kageki (US)" )
2318 GAME( 1988, kagekij, kageki, kageki, kageki, kageki, ROT90, "Taito Corporation", "Kageki (Japan)" )
2319 GAME( 1988, chukatai, 0, tnzs, chukatai, chukatai, ROT0, "Taito Corporation Japan", "Chuka Taisen (World)" )
2320 GAME( 1988, chukatau, chukatai, tnzs, chukatau, chukatai, ROT0, "Taito America Corporation", "Chuka Taisen (US)" )
2321 GAME( 1988, chukataj, chukatai, tnzs, chukatau, chukatai, ROT0, "Taito Corporation", "Chuka Taisen (Japan)" )
2322 GAME( 1988, tnzs, 0, tnzs, tnzs, tnzs, ROT0, "Taito Corporation", "The NewZealand Story (Japan)" )
2323 GAME( 1988, tnzsb, tnzs, tnzsb, tnzsb, tnzsb, ROT0, "bootleg", "The NewZealand Story (World, bootleg)" )
2324 GAME( 1988, tnzs2, tnzs, tnzs, tnzs2, tnzs, ROT0, "Taito Corporation Japan", "The NewZealand Story 2 (World)" )
2325 GAME( 1989, insectx, 0, insectx, insectx, insectx, ROT0, "Taito Corporation Japan", "Insector X (World)" )
2326