1 /***************************************************************************
2
3 Epos games
4
5 driver by Zsolt Vasvari
6
7
8 Notes:
9
10 - To walk in IGMO, hold down button 2.
11 - Super Glob seems like a later revision of The Glob, the most obvious
12 difference being an updated service mode.
13 - These games don't have cocktail mode.
14 - The divisor 4 was derived using the timing loop used to split the screen
15 in the middle. This loop takes roughly 24200 cycles, giving
16 2500 + (24200 - 2500) * 2 * 60 = 2754000 = 2.75MHz for the CPU speed,
17 assuming 60 fps and a 2500 cycle VBLANK period.
18 This should be easy to check since the schematics are available, .
19 - I think theglob2 is earlier than theglob. They only differ in one routine,
20 but it appears to be a bug fix. Also, theglob3 appears to be even older.
21
22 To Do:
23
24 - Super Blob uses a busy loop during the color test to split the screen
25 between the two palettes. This effect is not emulated, but since both
26 halfs of the palette are identical, this is not an issue. See $039c.
27 The other games have a different color test, not using the busy loop.
28
29 ***************************************************************************/
30
31 #include "driver.h"
32 #include "vidhrdw/generic.h"
33 #include "machine/8255ppi.h"
34 #include "epos.h"
35
36
37 static int counter = 0;
38
39 MACHINE_INIT( dealer );
40
WRITE_HANDLER(dealer_decrypt_rom)41 WRITE_HANDLER( dealer_decrypt_rom )
42 {
43 unsigned char *RAM = memory_region(REGION_CPU1);
44
45 if (offset & 0x04)
46 {
47 counter = counter + 1;
48 if (counter < 0)
49 counter = 0x0F;
50 }
51 else
52 {
53 counter = (counter - 1) & 0x0F;
54 }
55
56 /* log_cb(RETRO_LOG_DEBUG, LOGPRE "PC %08x: ctr=%04x\n",activecpu_get_pc(),counter);*/
57
58 switch(counter)
59 {
60
61 case 0x00: cpu_setbank(1, &RAM[0x10000]); break;
62 case 0x01: cpu_setbank(1, &RAM[0x20000]); break;
63 case 0x02: cpu_setbank(1, &RAM[0x30000]); break;
64 case 0x03: cpu_setbank(1, &RAM[0x40000]); break;
65 default:
66 log_cb(RETRO_LOG_DEBUG, LOGPRE "Invalid counter = %02X\n",counter);
67 break;
68 }
69 }
70
71
72 /*************************************
73 *
74 * Main CPU memory handlers
75 *
76 *************************************/
77
MEMORY_READ_START(readmem)78 static MEMORY_READ_START( readmem )
79 { 0x0000, 0x77ff, MRA_ROM },
80 { 0x7800, 0xffff, MRA_RAM },
81 MEMORY_END
82
83
84 static MEMORY_WRITE_START( writemem )
85 { 0x0000, 0x77ff, MWA_ROM },
86 { 0x7800, 0x7fff, MWA_RAM },
87 { 0x8000, 0xffff, epos_videoram_w, &videoram, &videoram_size },
88 MEMORY_END
89
90
91 static MEMORY_READ_START( dealer_readmem )
92 { 0x0000, 0x6fff, MRA_BANK1 },
93 { 0x7000, 0xffff, MRA_RAM },
94 MEMORY_END
95
96 static MEMORY_WRITE_START( dealer_writemem )
97 { 0x0000, 0x6fff, MWA_ROM },
98 { 0x7000, 0x7fff, MWA_RAM },
99 { 0x8000, 0xffff, epos_videoram_w, &videoram, &videoram_size },
100 MEMORY_END
101
102 /*************************************
103 *
104 * Main CPU port handlers
105 *
106 *************************************/
107
108 static PORT_READ_START( readport )
109 { 0x00, 0x00, input_port_0_r },
110 { 0x01, 0x01, input_port_1_r },
111 { 0x02, 0x02, input_port_2_r },
112 { 0x03, 0x03, input_port_3_r },
113 PORT_END
114
115
116 static PORT_WRITE_START( writeport )
117 { 0x00, 0x00, watchdog_reset_w },
118 { 0x01, 0x01, epos_port_1_w },
119 { 0x02, 0x02, AY8910_write_port_0_w },
120 { 0x06, 0x06, AY8910_control_port_0_w },
121 PORT_END
122
123
124 static PORT_READ_START( dealer_readport )
125 { 0x10, 0x13, ppi8255_0_r },
126 { 0x38, 0x38, input_port_0_r },
127 PORT_END
128
129 static PORT_WRITE_START( dealer_writeport )
130 { 0x10, 0x13, ppi8255_0_w },
131 { 0x20, 0x24, dealer_decrypt_rom },
132 /* { 0x40, 0x40, watchdog_reset_w },*/
133 PORT_END
134
135 static ppi8255_interface ppi8255_intf =
136 {
137 1, /* 1 chip */
138 { input_port_2_r }, /* Port A read */
139 { NULL }, /* Port B read */
140 { NULL }, /* Port C read */
141 { NULL }, /* Port A write */
142 { NULL }, /* Port B write */
143 { NULL }, /* Port C write */
144 };
145
146 /*************************************
147 *
148 * Port definitions
149 *
150 *************************************/
151
152 /* I think the upper two bits of port 1 are used as a simple form of protection,
153 so that ROMs couldn't be simply swapped. Each game checks these bits and halts
154 the processor if an unexpected value is read. */
155
156 INPUT_PORTS_START( eeekk )
157 PORT_START /* IN0 */
158 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Coinage ) )
159 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
160 PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
161 PORT_DIPNAME( 0x50, 0x00, DEF_STR( Lives ) )
162 PORT_DIPSETTING( 0x00, "3" )
163 PORT_DIPSETTING( 0x10, "4" )
164 PORT_DIPSETTING( 0x40, "5" )
165 PORT_DIPSETTING( 0x50, "6" )
166 PORT_DIPNAME( 0x26, 0x04, DEF_STR( Difficulty ) )
167 PORT_DIPSETTING( 0x00, "1 (Easy)" )
168 PORT_DIPSETTING( 0x02, "2" )
169 PORT_DIPSETTING( 0x20, "3" )
170 PORT_DIPSETTING( 0x22, "4" )
171 PORT_DIPSETTING( 0x04, "5" )
172 PORT_DIPSETTING( 0x06, "6" )
173 PORT_DIPSETTING( 0x24, "7" )
174 PORT_DIPSETTING( 0x26, "8 (Hard)" )
175 PORT_DIPNAME( 0x08, 0x08, "Extra Life Range" ) /* exact points value varies by 10000 for every level of difficulty chosen via the dips above */
176 PORT_DIPSETTING( 0x08, "100000 - 170000 points" )
177 PORT_DIPSETTING( 0x00, "20000 - 90000 points" )
178 PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) )
179 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
180 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
181
182 PORT_START /* IN1 */
183 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
184 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
185 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
186 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
187 PORT_BITX(0x10, IP_ACTIVE_LOW, IPT_SERVICE, DEF_STR( Service_Mode ), KEYCODE_F2, IP_JOY_NONE )
188 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
189 PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* this has to be LO */
190 PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* this has to be LO */
191
192 PORT_START /* IN2 */
193 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
194 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
195 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 )
196 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 )
197 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
198 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
199 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
200 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
201
202 PORT_START /* IN3 */
203 PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNKNOWN )
204 INPUT_PORTS_END
205
206
207 INPUT_PORTS_START( megadon )
208 PORT_START /* IN0 */
209 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Coinage ) )
210 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
211 PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
212 PORT_DIPNAME( 0x02, 0x00, "Fuel Consumption" )
213 PORT_DIPSETTING( 0x00, "Slow" )
214 PORT_DIPSETTING( 0x02, "Fast" )
215 PORT_DIPNAME( 0x04, 0x00, "Rotation" )
216 PORT_DIPSETTING( 0x04, "Slow" )
217 PORT_DIPSETTING( 0x00, "Fast" )
218 PORT_DIPNAME( 0x08, 0x08, "ERG" )
219 PORT_DIPSETTING( 0x08, "Easy" )
220 PORT_DIPSETTING( 0x00, "Hard" )
221 PORT_DIPNAME( 0x20, 0x20, "Enemy Fire Rate" )
222 PORT_DIPSETTING( 0x20, "Slow" )
223 PORT_DIPSETTING( 0x00, "Fast" )
224 PORT_DIPNAME( 0x50, 0x00, DEF_STR( Lives ) )
225 PORT_DIPSETTING( 0x00, "3" )
226 PORT_DIPSETTING( 0x10, "4" )
227 PORT_DIPSETTING( 0x40, "5" )
228 PORT_DIPSETTING( 0x50, "6" )
229 PORT_DIPNAME( 0x80, 0x00, "Game Mode" )
230 PORT_DIPSETTING( 0x00, "Arcade" )
231 PORT_DIPSETTING( 0x80, "Contest" )
232
233 PORT_START /* IN1 */
234 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
235 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
236 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
237 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
238 PORT_BITX(0x10, IP_ACTIVE_LOW, IPT_SERVICE, DEF_STR( Service_Mode ), KEYCODE_F2, IP_JOY_NONE )
239 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
240 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SPECIAL ) /* this has to be HI */
241 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SPECIAL ) /* this has to be HI */
242
243 PORT_START /* IN2 */
244 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
245 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
246 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 )
247 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 )
248 PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNKNOWN )
249
250 PORT_START /* IN3 */
251 PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNKNOWN )
252 INPUT_PORTS_END
253
254
255 INPUT_PORTS_START( suprglob )
256 PORT_START /* IN0 */
257 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Coinage ) )
258 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
259 PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
260 PORT_DIPNAME( 0x26, 0x00, DEF_STR( Difficulty ) )
261 PORT_DIPSETTING( 0x00, "1" )
262 PORT_DIPSETTING( 0x02, "2" )
263 PORT_DIPSETTING( 0x20, "3" )
264 PORT_DIPSETTING( 0x22, "4" )
265 PORT_DIPSETTING( 0x04, "5" )
266 PORT_DIPSETTING( 0x06, "6" )
267 PORT_DIPSETTING( 0x24, "7" )
268 PORT_DIPSETTING( 0x26, "8" )
269 PORT_DIPNAME( 0x08, 0x00, DEF_STR( Bonus_Life ) )
270 PORT_DIPSETTING( 0x00, "10000 + Difficulty * 10000" )
271 PORT_DIPSETTING( 0x08, "90000 + Difficulty * 10000" )
272 PORT_DIPNAME( 0x50, 0x00, DEF_STR( Lives ) )
273 PORT_DIPSETTING( 0x00, "3" )
274 PORT_DIPSETTING( 0x10, "4" )
275 PORT_DIPSETTING( 0x40, "5" )
276 PORT_DIPSETTING( 0x50, "6" )
277 PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) )
278 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
279 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
280
281 PORT_START /* IN1 */
282 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
283 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
284 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
285 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
286 PORT_BITX(0x10, IP_ACTIVE_LOW, IPT_SERVICE, DEF_STR( Service_Mode ), KEYCODE_F2, IP_JOY_NONE )
287 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
288 PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* this has to be LO */
289 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SPECIAL ) /* this has to be HI */
290
291 PORT_START /* IN2 */
292 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
293 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
294 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 )
295 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 )
296 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
297 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
298 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
299 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
300
301 PORT_START /* IN3 */
302 PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNKNOWN )
303 INPUT_PORTS_END
304
305
306 INPUT_PORTS_START( igmo )
307 PORT_START /* IN0 */
308 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Coinage ) )
309 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
310 PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
311 PORT_DIPNAME( 0x22, 0x00, DEF_STR( Bonus_Life ) )
312 PORT_DIPSETTING( 0x00, "20000" )
313 PORT_DIPSETTING( 0x02, "40000" )
314 PORT_DIPSETTING( 0x20, "60000" )
315 PORT_DIPSETTING( 0x22, "80000" )
316 PORT_DIPNAME( 0x8c, 0x00, DEF_STR( Difficulty ) )
317 PORT_DIPSETTING( 0x00, "1" )
318 PORT_DIPSETTING( 0x04, "2" )
319 PORT_DIPSETTING( 0x08, "3" )
320 PORT_DIPSETTING( 0x0c, "4" )
321 PORT_DIPSETTING( 0x80, "5" )
322 PORT_DIPSETTING( 0x84, "6" )
323 PORT_DIPSETTING( 0x88, "7" )
324 PORT_DIPSETTING( 0x8c, "8" )
325 PORT_DIPNAME( 0x50, 0x00, DEF_STR( Lives ) )
326 PORT_DIPSETTING( 0x00, "3" )
327 PORT_DIPSETTING( 0x10, "4" )
328 PORT_DIPSETTING( 0x40, "5" )
329 PORT_DIPSETTING( 0x50, "6" )
330
331 PORT_START /* IN1 */
332 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
333 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
334 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
335 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
336 PORT_BITX(0x10, IP_ACTIVE_LOW, IPT_SERVICE, DEF_STR( Service_Mode ), KEYCODE_F2, IP_JOY_NONE )
337 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
338 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SPECIAL ) /* this has to be HI */
339 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SPECIAL ) /* this has to be HI */
340
341 PORT_START /* IN2 */
342 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
343 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
344 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 )
345 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 )
346 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
347 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
348 PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNKNOWN )
349
350 PORT_START /* IN3 */
351 PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNKNOWN )
352 INPUT_PORTS_END
353
354
355 INPUT_PORTS_START( dealer )
356 PORT_START /* IN0 */
357 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Demo_Sounds ) )
358 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
359 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
360 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Free_Play ) )
361 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
362 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
363 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unused ) )
364 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
365 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
366 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unused ) )
367 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
368 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
369 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unused ) )
370 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
371 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
372 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unused ) )
373 PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
374 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
375 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Cabinet ) )
376 PORT_DIPSETTING( 0x40, DEF_STR( Upright ) )
377 PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
378 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Flip_Screen ) )
379 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
380 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
381
382 PORT_START /* IN1 */
383 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
384 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
385 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
386 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
387 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
388 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
389 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
390 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
391
392 PORT_START /* IN2 */
393 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) /*cancel*/
394 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) /*draw*/
395 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) /*stand*/
396 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON4 )
397 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON5 ) /*play*/
398 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON6 )
399 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON7 ) /*coin in*/
400 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON8 )
401 INPUT_PORTS_END
402
403
404 /*************************************
405 *
406 * Sound interfaces
407 *
408 *************************************/
409
410 static struct AY8910interface ay8912_interface =
411 {
412 1, /* 1 chip */
413 11000000/4, /* 2.75 MHz */
414 { 50 },
415 { 0 },
416 { 0 },
417 { 0 },
418 { 0 }
419 };
420
421
422
423 /*************************************
424 *
425 * Machine drivers
426 *
427 *************************************/
428
429 static MACHINE_DRIVER_START( epos )
430
431 /* basic machine hardware */
432 MDRV_CPU_ADD(Z80, 11000000/4) /* 2.75 MHz (see notes) */
MDRV_CPU_MEMORY(readmem,writemem)433 MDRV_CPU_MEMORY(readmem,writemem)
434 MDRV_CPU_PORTS(readport,writeport)
435 MDRV_CPU_VBLANK_INT(irq0_line_hold,1)
436
437 MDRV_FRAMES_PER_SECOND(60)
438 MDRV_VBLANK_DURATION(DEFAULT_REAL_60HZ_VBLANK_DURATION)
439
440 /* video hardware */
441 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
442 MDRV_SCREEN_SIZE(272, 241)
443 MDRV_VISIBLE_AREA(0, 271, 0, 235)
444 MDRV_PALETTE_LENGTH(32)
445
446 MDRV_PALETTE_INIT(epos)
447 MDRV_VIDEO_START(generic_bitmapped)
448 MDRV_VIDEO_UPDATE(epos)
449
450 /* sound hardware */
451 MDRV_SOUND_ADD(AY8910, ay8912_interface)
452 MACHINE_DRIVER_END
453
454
455 static MACHINE_DRIVER_START( dealer )
456 /* basic machine hardware */
457 MDRV_CPU_ADD(Z80, 11000000/4) /* 2.75 MHz (see notes) */
458 MDRV_CPU_MEMORY(dealer_readmem,dealer_writemem)
459 MDRV_CPU_PORTS(dealer_readport,dealer_writeport)
460 MDRV_CPU_VBLANK_INT(irq0_line_hold,1)
461
462 MDRV_FRAMES_PER_SECOND(60)
463 MDRV_VBLANK_DURATION(DEFAULT_REAL_60HZ_VBLANK_DURATION)
464
465 /* video hardware */
466 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
467 MDRV_SCREEN_SIZE(272, 241)
468 MDRV_VISIBLE_AREA(0, 271, 0, 235)
469 MDRV_PALETTE_LENGTH(32)
470
471 MDRV_PALETTE_INIT(epos)
472 MDRV_VIDEO_START(generic_bitmapped)
473 MDRV_VIDEO_UPDATE(epos)
474 MDRV_MACHINE_INIT(dealer)
475
476 /* sound hardware */
477 MDRV_SOUND_ADD(AY8910, ay8912_interface)
478 MACHINE_DRIVER_END
479
480
481 /*************************************
482 *
483 * ROM definitions
484 *
485 *************************************/
486
487 ROM_START( megadon )
488 ROM_REGION( 0x10000, REGION_CPU1, 0 ) /* 64k for code */
489 ROM_LOAD( "2732u10b.bin", 0x0000, 0x1000, CRC(af8fbe80) SHA1(2d7857616462112fe17343a9357ee51d8f965a0f) )
490 ROM_LOAD( "2732u09b.bin", 0x1000, 0x1000, CRC(097d1e73) SHA1(b6141155b2c63c33a367dd18fe53ff9f01b99380) )
491 ROM_LOAD( "2732u08b.bin", 0x2000, 0x1000, CRC(526784da) SHA1(7d9f43dc6975a018bec95982029ce7ac9f675869) )
492 ROM_LOAD( "2732u07b.bin", 0x3000, 0x1000, CRC(5b060910) SHA1(98a719bf0ffe8010437565de681aaefa647d9a6c) )
493 ROM_LOAD( "2732u06b.bin", 0x4000, 0x1000, CRC(8ac8af6d) SHA1(53c123f0e9f0443737c39c01dbdb685189cffa92) )
494 ROM_LOAD( "2732u05b.bin", 0x5000, 0x1000, CRC(052bb603) SHA1(eb74a9563f44cca50dc2c475e4a376ed14e4f56f) )
495 ROM_LOAD( "2732u04b.bin", 0x6000, 0x1000, CRC(9b8b7e92) SHA1(051ad9a8ba51740a865e3c95a738658b30bbbe60) )
496 ROM_LOAD( "2716u11b.bin", 0x7000, 0x0800, CRC(599b8b61) SHA1(e687c6f475a0fead3e47f05b1d1b3b29cf4a83a1) )
497
498 ROM_REGION( 0x0020, REGION_PROMS, 0 )
499 ROM_LOAD( "74s288.bin", 0x0000, 0x0020, CRC(c779ea99) SHA1(7702ae3684579950b36274ea91d4267c96faeeb8) )
500 ROM_END
501
502
503 ROM_START( catapult )
504 ROM_REGION( 0x10000, REGION_CPU1, 0 ) /* 64k for code */
505 ROM_LOAD( "co3223.u10", 0x0000, 0x1000, CRC(50abcfd2) SHA1(13ce04addc7bcaa1ec6659da26b1c13ed9dc28f9) )
506 ROM_LOAD( "co3223.u09", 0x1000, 0x1000, CRC(fd5a9a1c) SHA1(512374e8450459537ba2cc41e7d0178052445316) )
507 ROM_LOAD( "co3223.u08", 0x2000, 0x1000, BAD_DUMP CRC(4bfc36f3) SHA1(b916805eed40cfeff0c1b0cb3cdcbcc6e362a236) ) /* BADADDR xxxx-xxxxxxx */
508 ROM_LOAD( "co3223.u07", 0x3000, 0x1000, CRC(4113bb99) SHA1(3cebb874dae211d75082209e913d4afa4f621de1) )
509 ROM_LOAD( "co3223.u06", 0x4000, 0x1000, CRC(966bb9f5) SHA1(1a217c6f7a88c58e0deae0290bc5ddd2789d18eb) )
510 ROM_LOAD( "co3223.u05", 0x5000, 0x1000, CRC(65f9fb9a) SHA1(63b616a736d9e39a8f2f76889fd7c5fe4128a966) )
511 ROM_LOAD( "co3223.u04", 0x6000, 0x1000, CRC(648453bc) SHA1(8e4538aedad4d32bd046aad474dbcc689ee8fe53) )
512 ROM_LOAD( "co3223.u11", 0x7000, 0x0800, CRC(08fb8c28) SHA1(0b08cc2727a54e0ad7472234be0f637b46bc3253) )
513
514 ROM_REGION( 0x0020, REGION_PROMS, 0 )
515 ROM_LOAD( "co3223.u66", 0x0000, 0x0020, CRC(e7de76a7) SHA1(101ce85459a59c0d01ce3ea96480f1f8413a788e) )
516 ROM_END
517
518
519 ROM_START( eeekk )
520 ROM_REGION( 0x10000, REGION_CPU1, 0 )
521 ROM_LOAD( "u10_e12063.u10", 0x0000, 0x1000, CRC(edd05de2) SHA1(25dfa7ad2e29b1ca9ce9bb36bf1a573baabb4d5b) )
522 ROM_LOAD( "u9_e12063.u9", 0x1000, 0x1000, CRC(6f57114a) SHA1(417b910a4343da026426b4cfd0a83b9142c87353) )
523 ROM_LOAD( "u8_e12063.u8", 0x2000, 0x1000, CRC(bcb0ebbd) SHA1(a2a00dedee12d6006817021e98fb44b2339127a0) )
524 ROM_LOAD( "u7_e12063.u7", 0x3000, 0x1000, CRC(a0df8f77) SHA1(ee2afed25ab32bf09b14e8638d03b6e2f8e6b337) )
525 ROM_LOAD( "u6_e12063.u6", 0x4000, 0x1000, CRC(61953b0a) SHA1(67bcb4286e39cdda20684a4f580392468b08800e) )
526 ROM_LOAD( "u5_e12063.u5", 0x5000, 0x1000, CRC(4c22c6d9) SHA1(94a8fc951994746f8ccfb77d80f8b98fde8a6f33) )
527 ROM_LOAD( "u4_e12063.u4", 0x6000, 0x1000, CRC(3d341208) SHA1(bc4d2567df2779d97e718376c4bf682ba459c01e) )
528 ROM_LOAD( "u11_e12063.u11", 0x7000, 0x0800, CRC(417faff0) SHA1(7965155ee32694ea9a10245db73d8beef229408c) )
529
530 ROM_REGION( 0x0020, REGION_PROMS, 0 )
531 ROM_LOAD( "74s288.u66", 0x0000, 0x0020, CRC(f2078c38) SHA1(7bfd49932a6fd8840514b7af93a64cedb248122d) )
532 ROM_END
533
534
535 ROM_START( suprglob )
536 ROM_REGION( 0x10000, REGION_CPU1, 0 ) /* 64k for code */
537 ROM_LOAD( "u10", 0x0000, 0x1000, CRC(c0141324) SHA1(a54bd71da233eb22f45da630693fddd5a0bcf25b) )
538 ROM_LOAD( "u9", 0x1000, 0x1000, CRC(58be8128) SHA1(534f0a093b3ff577a2a5461498bc11ce14dc6d97) )
539 ROM_LOAD( "u8", 0x2000, 0x1000, CRC(6d088c16) SHA1(0929ea1b58eab997b5d9c9642f8b47557a4045f1) )
540 ROM_LOAD( "u7", 0x3000, 0x1000, CRC(b2768203) SHA1(9de52f4dbe6a46ea1b9b7f9cf70378211d372353) )
541 ROM_LOAD( "u6", 0x4000, 0x1000, CRC(976c8f46) SHA1(120c76eff8c04ccb5ad945c4333e8c9de0cbc3af) )
542 ROM_LOAD( "u5", 0x5000, 0x1000, CRC(340f5290) SHA1(2e5fa0c41d1626e5a435f2c55eec0bcdcb004223) )
543 ROM_LOAD( "u4", 0x6000, 0x1000, CRC(173bd589) SHA1(25690a0c3cd0e017f8d220d8fbf2eaeb86f05fc5) )
544 ROM_LOAD( "u11", 0x7000, 0x0800, CRC(d45b740d) SHA1(54c15f378b6d91ea1aba0a51921178bb15854079) )
545
546 ROM_REGION( 0x0020, REGION_PROMS, 0 )
547 ROM_LOAD( "82s123.u66", 0x0000, 0x0020, CRC(f4f6ddc5) SHA1(cab915acbefb5f451f538dd538bf9b3dd14bb1f5) )
548 ROM_END
549
550
551 ROM_START( theglob )
552 ROM_REGION( 0x10000, REGION_CPU1, 0 ) /* 64k for code */
553 ROM_LOAD( "globu10.bin", 0x0000, 0x1000, CRC(08fdb495) SHA1(739efa676b5a3df36a6061382aeb8c2d495ba23f) )
554 ROM_LOAD( "globu9.bin", 0x1000, 0x1000, CRC(827cd56c) SHA1(3aedc1cefb463cf6b31befb33e50c832dc2e3941) )
555 ROM_LOAD( "globu8.bin", 0x2000, 0x1000, CRC(d1219966) SHA1(571349f9c978fdcf826a0c66c3fb11a9e27b240a) )
556 ROM_LOAD( "globu7.bin", 0x3000, 0x1000, CRC(b1649da7) SHA1(1509d48a72e545195e45d1170cdb113c6aecc8d9) )
557 ROM_LOAD( "globu6.bin", 0x4000, 0x1000, CRC(b3457e67) SHA1(1347bdf085ad69879f9a9e7e4ed1ca4869e8e8cd) )
558 ROM_LOAD( "globu5.bin", 0x5000, 0x1000, CRC(89d582cd) SHA1(f331c7a2fce606153992abb312c5406251a7fb3b) )
559 ROM_LOAD( "globu4.bin", 0x6000, 0x1000, CRC(7ee9fdeb) SHA1(a8e0dd5d1cdcff132edc0eb182b66656ce244fa1) )
560 ROM_LOAD( "globu11.bin", 0x7000, 0x0800, CRC(9e05dee3) SHA1(751799b23f0e664f59d3785b438ec3ae9f5bab2c) )
561
562 ROM_REGION( 0x0020, REGION_PROMS, 0 )
563 ROM_LOAD( "82s123.u66", 0x0000, 0x0020, CRC(f4f6ddc5) SHA1(cab915acbefb5f451f538dd538bf9b3dd14bb1f5) )
564 ROM_END
565
566
567 ROM_START( theglob2 )
568 ROM_REGION( 0x10000, REGION_CPU1, 0 ) /* 64k for code */
569 ROM_LOAD( "611293.u10", 0x0000, 0x1000, CRC(870af7ce) SHA1(f901619663313a72997f30ccecdeac8294fe200e) )
570 ROM_LOAD( "611293.u9", 0x1000, 0x1000, CRC(a3679782) SHA1(fbc26ae98e2bf10272d61159b084d78a6f410374) )
571 ROM_LOAD( "611293.u8", 0x2000, 0x1000, CRC(67499d1a) SHA1(dce7041df5ed1847e0ffc82672d09e00b16de3a9) )
572 ROM_LOAD( "611293.u7", 0x3000, 0x1000, CRC(55e53aac) SHA1(20a428db287e8b7fb55cb9fe1a1ed0196481114c) )
573 ROM_LOAD( "611293.u6", 0x4000, 0x1000, CRC(c64ad743) SHA1(572ff6acb9b2281581974646e96699d7d2388aff) )
574 ROM_LOAD( "611293.u5", 0x5000, 0x1000, CRC(f93c3203) SHA1(8cb88b5202e99d206eccf7d25e168cf23acee19b) )
575 ROM_LOAD( "611293.u4", 0x6000, 0x1000, CRC(ceea0018) SHA1(511430539429ef0e5368f7b605f2e680ca9038bc) )
576 ROM_LOAD( "611293.u11", 0x7000, 0x0800, CRC(6ac83f9b) SHA1(b1e8482ec04107f0e595a714b7c0f70571aca6e5) )
577
578 ROM_REGION( 0x0020, REGION_PROMS, 0 )
579 ROM_LOAD( "82s123.u66", 0x0000, 0x0020, CRC(f4f6ddc5) SHA1(cab915acbefb5f451f538dd538bf9b3dd14bb1f5) )
580 ROM_END
581
582
583 ROM_START( theglob3 )
584 ROM_REGION( 0x10000, REGION_CPU1, 0 ) /* 64k for code */
585 ROM_LOAD( "theglob3.u10", 0x0000, 0x1000, CRC(969cfaf6) SHA1(b63226b8694640d6452bca12755780d1b52d1d3c) )
586 ROM_LOAD( "theglob3.u9", 0x1000, 0x1000, CRC(8e6c010a) SHA1(ec9627742ce52eb29bbafc9d0555d16ac7146f2e) )
587 ROM_LOAD( "theglob3.u8", 0x2000, 0x1000, CRC(1c1ca5c8) SHA1(6e5f9d7f9f016a72003433375c806c5f921ed423) )
588 ROM_LOAD( "theglob3.u7", 0x3000, 0x1000, CRC(a54b9d22) SHA1(3db96d1f55642ecf1ebc76387cac76e8f9721919) )
589 ROM_LOAD( "theglob3.u6", 0x4000, 0x1000, CRC(5a6f82a9) SHA1(ea92ad949373e8b1f06c65f243ceedad2fdcd934) )
590 ROM_LOAD( "theglob3.u5", 0x5000, 0x1000, CRC(72f935db) SHA1(d7023cf5f16a77a42590a9c97c2690ac0e3d282a) )
591 ROM_LOAD( "theglob3.u4", 0x6000, 0x1000, CRC(81db53ad) SHA1(a1e4aa8e08ca0f585b3638a3849a465977d44af0) )
592 ROM_LOAD( "theglob3.u11", 0x7000, 0x0800, CRC(0e2e6359) SHA1(f231637ad4c997406989cf5a701d26c95e69171e) )
593
594 ROM_REGION( 0x0020, REGION_PROMS, 0 )
595 ROM_LOAD( "82s123.u66", 0x0000, 0x0020, CRC(f4f6ddc5) SHA1(cab915acbefb5f451f538dd538bf9b3dd14bb1f5) )
596 ROM_END
597
598
599 ROM_START( igmo )
600 ROM_REGION( 0x10000, REGION_CPU1, 0 ) /* 64k for code */
601 ROM_LOAD( "igmo-u10.732", 0x0000, 0x1000, CRC(a9f691a4) SHA1(e3f2dc41bd8760fc52e99b7e9faa12c7cf51ffe0) )
602 ROM_LOAD( "igmo-u9.732", 0x1000, 0x1000, CRC(3c133c97) SHA1(002b5aff6b947b6a9cbabeed5be798c1ddf2bda1) )
603 ROM_LOAD( "igmo-u8.732", 0x2000, 0x1000, CRC(5692f8d8) SHA1(6ab50775dff49330a85fbfb2d4d4c3a2e54df3d1) )
604 ROM_LOAD( "igmo-u7.732", 0x3000, 0x1000, CRC(630ae2ed) SHA1(0c293b6192e703b16ed20c277c706ae90773f477) )
605 ROM_LOAD( "igmo-u6.732", 0x4000, 0x1000, CRC(d3f20e1d) SHA1(c0e0b542ac020adc085ec90c2462c6544098447e) )
606 ROM_LOAD( "igmo-u5.732", 0x5000, 0x1000, CRC(e26bb391) SHA1(ba0e44c02fbb36e18e0d779d46bb992e6aba6cf1) )
607 ROM_LOAD( "igmo-u4.732", 0x6000, 0x1000, CRC(762a4417) SHA1(7fed5221950e3e1ce41c0b4ded44597a242a0177) )
608 ROM_LOAD( "igmo-u11.716", 0x7000, 0x0800, CRC(8c675837) SHA1(2725729693960b53ea01ebffa0a81df2cd425890) )
609
610 ROM_REGION( 0x0020, REGION_PROMS, 0 )
611 ROM_LOAD( "82s123.u66", 0x0000, 0x0020, CRC(1ba03ffe) SHA1(f5692c06ae6d20c010430c8d08f5c60e78d36dc9) )
612 ROM_END
613
614
615 ROM_START( dealer )
616 ROM_REGION( 0x50000, REGION_CPU1, 0 )
617 ROM_LOAD( "u1.bin", 0x0000, 0x2000, CRC(e06f3563) SHA1(0d58cd1f2e1ca89adb9c64d7dd520bb1f2d50f1a) )
618 ROM_LOAD( "u2.bin", 0x2000, 0x2000, CRC(726bbbd6) SHA1(3538f3d655899c2a0f984c43fb7545ea4be1b231) )
619 ROM_LOAD( "u3.bin", 0x4000, 0x2000, CRC(ab721455) SHA1(a477da0590e0431172baae972e765473e19dcbff) )
620 ROM_LOAD( "u4.bin", 0x6000, 0x2000, BAD_DUMP CRC(ddb903e4) SHA1(4c06a2048b1c6989c363b110a17c33180025b9c8) )
621
622 ROM_REGION( 0x0020, REGION_PROMS, 0 )
623 ROM_LOAD( "82s123.u66", 0x0000, 0x0020, NO_DUMP ) /* missing */
624 ROM_END
625
626 MACHINE_INIT( dealer )
627 {
628 cpu_setbank(1, memory_region(REGION_CPU1) + 0x10000);
629
630 ppi8255_init(&ppi8255_intf);
631 }
632
DRIVER_INIT(dealer)633 DRIVER_INIT( dealer )
634 {
635 unsigned char *ROM = memory_region(REGION_CPU1);
636 int A;
637 int oldbyte,newbyte;
638
639 /* Key 1 */
640 for (A = 0;A < 0x7000;A++)
641 {
642 oldbyte = ROM[A];
643
644 newbyte = 0;
645 newbyte += ((oldbyte & 0x01 ) ^ 0x01) * 0x10;
646 newbyte += ((oldbyte & 0x02 ) ^ 0x00) * 0x01;
647 newbyte += ((oldbyte & 0x04 ) ^ 0x04) * 0x20;
648 newbyte += ((oldbyte & 0x08 ) ^ 0x08) / 0x08;
649 newbyte += ((oldbyte & 0x10 ) ^ 0x10) * 0x02;
650 newbyte += ((oldbyte & 0x20 ) ^ 0x20) / 0x04;
651 newbyte += ((oldbyte & 0x40 ) ^ 0x00) * 0x01;
652 newbyte += ((oldbyte & 0x80 ) ^ 0x80) / 0x20;
653
654 ROM[A + 0x10000] = newbyte;
655 }
656
657 /* Key 2 */
658 for (A = 0;A < 0x7000;A++)
659 {
660 oldbyte = ROM[A+0x10000];
661
662 newbyte = 0;
663 newbyte += ((oldbyte & 0x01 ) ^ 0x00) * 0x01;
664 newbyte += ((oldbyte & 0x02 ) ^ 0x00) * 0x01;
665 newbyte += ((oldbyte & 0x04 ) ^ 0x00) * 0x01;
666 newbyte += ((oldbyte & 0x08 ) ^ 0x00) * 0x01;
667 newbyte += ((oldbyte & 0x10 ) ^ 0x00) * 0x02;
668 newbyte += ((oldbyte & 0x20 ) ^ 0x00) * 0x02;
669 newbyte += ((oldbyte & 0x40 ) ^ 0x00) / 0x04;
670 newbyte += ((oldbyte & 0x80 ) ^ 0x00) * 0x01;
671
672 ROM[A + 0x20000 ] = newbyte;
673 }
674
675 /* Key 3 */
676 for (A = 0;A < 0x7000;A++)
677 {
678 oldbyte = ROM[A+0x10000];
679
680 newbyte = 0;
681 newbyte += ((oldbyte & 0x01 ) ^ 0x01) * 0x04;
682 newbyte += ((oldbyte & 0x02 ) ^ 0x00) / 0x02;
683 newbyte += ((oldbyte & 0x04 ) ^ 0x00) / 0x02;
684 newbyte += ((oldbyte & 0x08 ) ^ 0x00) * 0x01;
685 newbyte += ((oldbyte & 0x10 ) ^ 0x00) * 0x01;
686 newbyte += ((oldbyte & 0x20 ) ^ 0x00) * 0x01;
687 newbyte += ((oldbyte & 0x40 ) ^ 0x00) * 0x01;
688 newbyte += ((oldbyte & 0x80 ) ^ 0x00) * 0x01;
689
690 ROM[A + 0x30000 ] = newbyte;
691 }
692
693 /* Key 4 */
694 for (A = 0;A < 0x7000;A++)
695 {
696
697 /* there is not enough data to determine the last key.
698 the code in question is this:
699
700 55 = 32 ld (793e),a
701 2f59 5c 3e
702 2f5a 79 78
703
704 2f5b 55 32 ld (79xx),a
705 2f5c f7 53 or D2 or F3
706 2f5d 79 78
707
708 2f5e 55 32 ld (79xx),a
709 2f5f cd 1B 56 77 9A BB F6
710 79 78
711 It writes data to be read later.
712 I don't know the lsb of the writes. I do know:
713 if 2f5c = 53 then 2f5f = 9A or BB or F6
714 d2 1B 77 BB
715 f3 1B 56 9A
716
717 Someone will have to check the code to see what it's looking for.
718 As usual I've had to make some assumptions so I can't guarantee 100% accuracy
719 Dave
720 */
721
722 oldbyte = ROM[A+0x10000];
723
724 newbyte = 0;
725 #if 1
726 /*53:9a*/
727 newbyte += ((oldbyte & 0x01 ) ^ 0x01) * 0x04;
728 newbyte += ((oldbyte & 0x02 ) ^ 0x00) / 0x02;
729 newbyte += ((oldbyte & 0x04 ) ^ 0x00) / 0x02;
730 newbyte += ((oldbyte & 0x08 ) ^ 0x00) * 0x01;
731 newbyte += ((oldbyte & 0x10 ) ^ 0x10) * 0x08;
732 newbyte += ((oldbyte & 0x20 ) ^ 0x00) * 0x02;
733 newbyte += ((oldbyte & 0x40 ) ^ 0x00) / 0x04;
734 newbyte += ((oldbyte & 0x80 ) ^ 0x80) / 0x04;
735 #endif
736
737 #if 0
738 /*53:bb*/
739 newbyte += ((oldbyte & 0x01 ) ^ 0x01) * 0x04;
740 newbyte += ((oldbyte & 0x02 ) ^ 0x02) * 0x10;
741 newbyte += ((oldbyte & 0x04 ) ^ 0x00) / 0x02;
742 newbyte += ((oldbyte & 0x08 ) ^ 0x00) * 0x01;
743 newbyte += ((oldbyte & 0x10 ) ^ 0x10) * 0x08;
744 newbyte += ((oldbyte & 0x20 ) ^ 0x00) * 0x02;
745 newbyte += ((oldbyte & 0x40 ) ^ 0x00) / 0x04;
746 newbyte += ((oldbyte & 0x80 ) ^ 0x00) / 0x80;
747 #endif
748
749 #if 0
750 /*f3:9a*/
751 newbyte += ((oldbyte & 0x01 ) ^ 0x01) * 0x04;
752 newbyte += ((oldbyte & 0x02 ) ^ 0x00) / 0x02;
753 newbyte += ((oldbyte & 0x04 ) ^ 0x00) / 0x02;
754 newbyte += ((oldbyte & 0x08 ) ^ 0x00) * 0x01;
755 newbyte += ((oldbyte & 0x10 ) ^ 0x00) * 0x02;
756 newbyte += ((oldbyte & 0x20 ) ^ 0x00) * 0x02;
757 newbyte += ((oldbyte & 0x40 ) ^ 0x00) / 0x04;
758 newbyte += ((oldbyte & 0x80 ) ^ 0x00) * 0x01;
759 #endif
760
761 #if 0
762 /*f3:1b*/
763 newbyte += ((oldbyte & 0x01 ) ^ 0x01) * 0x04;
764 newbyte += ((oldbyte & 0x02 ) ^ 0x00) * 0x40;
765 newbyte += ((oldbyte & 0x04 ) ^ 0x00) / 0x02;
766 newbyte += ((oldbyte & 0x08 ) ^ 0x00) * 0x01;
767 newbyte += ((oldbyte & 0x10 ) ^ 0x00) * 0x02;
768 newbyte += ((oldbyte & 0x20 ) ^ 0x00) * 0x02;
769 newbyte += ((oldbyte & 0x40 ) ^ 0x00) / 0x04;
770 newbyte += ((oldbyte & 0x80 ) ^ 0x00) / 0x80;
771 #endif
772
773 #if 0
774 /*d2:1b*/
775 newbyte += ((oldbyte & 0x01 ) ^ 0x01) * 0x04;
776 newbyte += ((oldbyte & 0x02 ) ^ 0x00) * 0x40;
777 newbyte += ((oldbyte & 0x04 ) ^ 0x00) / 0x02;
778 newbyte += ((oldbyte & 0x08 ) ^ 0x00) * 0x01;
779 newbyte += ((oldbyte & 0x10 ) ^ 0x10) / 0x10;
780 newbyte += ((oldbyte & 0x20 ) ^ 0x00) * 0x02;
781 newbyte += ((oldbyte & 0x40 ) ^ 0x00) / 0x04;
782 newbyte += ((oldbyte & 0x80 ) ^ 0x80) / 0x04;
783 #endif
784
785 ROM[A + 0x40000 ] = newbyte;
786 }
787 }
788
789 /*************************************
790 *
791 * Game drivers
792 *
793 *************************************/
794
795 /* Epos Tristar 8000 */
796
797 GAME ( 1982, megadon, 0, epos, megadon, 0, ROT270, "Epos Corporation (Photar Industries license)", "Megadon" )
798 GAMEX( 1982, catapult, 0, epos, igmo, 0, ROT270, "Epos Corporation", "Catapult", GAME_NOT_WORKING) /* bad rom, hold f2 for test mode */
799 GAME ( 1983, eeekk, 0, epos, eeekk, 0, ROT270, "Epos Corporation", "Eeekk!" )
800 GAME ( 1983, suprglob, 0, epos, suprglob, 0, ROT270, "Epos Corporation", "Super Glob" )
801 GAME ( 1983, theglob, suprglob, epos, suprglob, 0, ROT270, "Epos Corporation", "The Glob" )
802 GAME ( 1983, theglob2, suprglob, epos, suprglob, 0, ROT270, "Epos Corporation", "The Glob (earlier)" )
803 GAME ( 1983, theglob3, suprglob, epos, suprglob, 0, ROT270, "Epos Corporation", "The Glob (set 3)" )
804 GAME ( 1984, igmo, 0, epos, igmo, 0, ROT270, "Epos Corporation", "IGMO" )
805
806 /* Epos Tristar 9000 */
807
808 GAMEX( 19??, dealer, 0, dealer, dealer, dealer, ROT270, "Epos Corporation", "The Dealer", GAME_NOT_WORKING)
809