1 /***************************************************************************
2
3 Fire Trap memory map
4
5 driver by Nicola Salmoria
6
7 Z80:
8 0000-7fff ROM
9 8000-bfff Banked ROM (4 banks)
10 c000-cfff RAM
11 d000-d7ff bg #1 video/color RAM (alternating pages 0x100 long)
12 d000-dfff bg #2 video/color RAM (alternating pages 0x100 long)
13 e000-e3ff fg video RAM
14 e400-e7ff fg color RAM
15 e800-e97f sprites RAM
16
17 memory mapped ports:
18 read:
19 f010 IN0
20 f011 IN1
21 f012 IN2
22 f013 DSW0
23 f014 DSW1
24 f015 from pin 10 of 8751 controller
25 f016 from port #1 of 8751 controller
26
27 write:
28 f000 IRQ acknowledge
29 f001 sound command (also causes NMI on sound CPU)
30 f002 ROM bank selection
31 f003 flip screen
32 f004 NMI disable
33 f005 to port #2 of 8751 controller (signal on P3.2)
34 f008-f009 bg #1 x scroll
35 f00a-f00b bg #1 y scroll
36 f00c-f00d bg #2 x scroll
37 f00e-f00f bg #2 y scroll
38
39 interrupts:
40 VBlank triggers NMI.
41 the 8751 triggers IRQ
42
43 6502:
44 0000-07ff RAM
45 4000-7fff Banked ROM (2 banks)
46 8000-ffff ROM
47
48 read:
49 3400 command from the main cpu
50
51 write:
52 1000-1001 YM3526
53 2000 ADPCM data for the MSM5205 chip
54 2400 bit 0 = to sound chip MSM5205 (1 = play sample); bit 1 = IRQ enable
55 2800 ROM bank select
56
57 ***************************************************************************/
58
59 #include "driver.h"
60 #include "vidhrdw/generic.h"
61 #include "cpu/m6502/m6502.h"
62
63
64
65 extern unsigned char *firetrap_bg1videoram;
66 extern unsigned char *firetrap_bg2videoram;
67 extern unsigned char *firetrap_fgvideoram;
68
69 WRITE_HANDLER( firetrap_fgvideoram_w );
70 WRITE_HANDLER( firetrap_bg1videoram_w );
71 WRITE_HANDLER( firetrap_bg2videoram_w );
72 WRITE_HANDLER( firetrap_bg1_scrollx_w );
73 WRITE_HANDLER( firetrap_bg1_scrolly_w );
74 WRITE_HANDLER( firetrap_bg2_scrollx_w );
75 WRITE_HANDLER( firetrap_bg2_scrolly_w );
76 VIDEO_START( firetrap );
77 PALETTE_INIT( firetrap );
78 VIDEO_UPDATE( firetrap );
79
80
81 static int firetrap_irq_enable = 0;
82 static int firetrap_nmi_enable;
83
WRITE_HANDLER(firetrap_nmi_disable_w)84 static WRITE_HANDLER( firetrap_nmi_disable_w )
85 {
86 firetrap_nmi_enable=~data & 1;
87 }
88
WRITE_HANDLER(firetrap_bankselect_w)89 static WRITE_HANDLER( firetrap_bankselect_w )
90 {
91 int bankaddress;
92 unsigned char *RAM = memory_region(REGION_CPU1);
93
94 bankaddress = 0x10000 + (data & 0x03) * 0x4000;
95 cpu_setbank(1,&RAM[bankaddress]);
96 }
97
READ_HANDLER(firetrap_8751_bootleg_r)98 static READ_HANDLER( firetrap_8751_bootleg_r )
99 {
100 /* Check for coin insertion */
101 /* the following only works in the bootleg version, which doesn't have an */
102 /* 8751 - the real thing is much more complicated than that. */
103 if ((readinputport(2) & 0x70) != 0x70) return 0xff;
104 return 0;
105 }
106
107 static int i8751_return,i8751_current_command;
108
MACHINE_INIT(firetrap)109 static MACHINE_INIT( firetrap )
110 {
111 i8751_current_command=0;
112 }
113
READ_HANDLER(firetrap_8751_r)114 static READ_HANDLER( firetrap_8751_r )
115 {
116 /*logerror("PC:%04x read from 8751\n",activecpu_get_pc());*/
117 return i8751_return;
118 }
119
WRITE_HANDLER(firetrap_8751_w)120 static WRITE_HANDLER( firetrap_8751_w )
121 {
122 static int i8751_init_ptr=0;
123 static const data8_t i8751_init_data[]={
124 0xf5,0xd5,0xdd,0x21,0x05,0xc1,0x87,0x5f,0x87,0x83,0x5f,0x16,0x00,0xdd,0x19,0xd1,
125 0xf1,0xc9,0xf5,0xd5,0xfd,0x21,0x2f,0xc1,0x87,0x5f,0x16,0x00,0xfd,0x19,0xd1,0xf1,
126 0xc9,0xe3,0xd5,0xc5,0xf5,0xdd,0xe5,0xfd,0xe5,0xe9,0xe1,0xfd,0xe1,0xdd,0xe1,0xf1,
127 0xc1,0xd1,0xe3,0xc9,0xf5,0xc5,0xe5,0xdd,0xe5,0xc5,0x78,0xe6,0x0f,0x47,0x79,0x48,
128 0x06,0x00,0xdd,0x21,0x00,0xd0,0xdd,0x09,0xe6,0x0f,0x6f,0x26,0x00,0x29,0x29,0x29,
129 0x29,0xeb,0xdd,0x19,0xc1,0x78,0xe6,0xf0,0x28,0x05,0x11,0x00,0x02,0xdd,0x19,0x79,
130 0xe6,0xf0,0x28,0x05,0x11,0x00,0x04,0xdd,0x19,0xdd,0x5e,0x00,0x01,0x00,0x01,0xdd,
131 0x09,0xdd,0x56,0x00,0xdd,0xe1,0xe1,0xc1,0xf1,0xc9,0xf5,0x3e,0x01,0x32,0x04,0xf0,
132 0xf1,0xc9,0xf5,0x3e,0x00,0x32,0x04,0xf0,0xf1,0xc9,0xf5,0xd5,0xdd,0x21,0x05,0xc1,
133 0x87,0x5f,0x87,0x83,0x5f,0x16,0x00,0xdd,0x19,0xd1,0xf1,0xc9,0xf5,0xd5,0xfd,0x21,
134 0x2f,0xc1,0x87,0x5f,0x16,0x00,0xfd,0x19,0xd1,0xf1,0xc9,0xe3,0xd5,0xc5,0xf5,0xdd,
135 0xe5,0xfd,0xe5,0xe9,0xe1,0xfd,0xe1,0xdd,0xe1,0xf1,0xc1,0xd1,0xe3,0xc9,0xf5,0xc5,
136 0xe5,0xdd,0xe5,0xc5,0x78,0xe6,0x0f,0x47,0x79,0x48,0x06,0x00,0xdd,0x21,0x00,0xd0,
137 0xdd,0x09,0xe6,0x0f,0x6f,0x26,0x00,0x29,0x29,0x29,0x29,0xeb,0xdd,0x19,0xc1,0x78,
138 0xe6,0xf0,0x28,0x05,0x11,0x00,0x02,0xdd,0x19,0x79,0xe6,0xf0,0x28,0x05,0x11,0x00,
139 0x04,0xdd,0x19,0xdd,0x5e,0x00,0x01,0x00,0x01,0xdd,0x09,0xdd,0x56,0x00,0xdd,0x00
140 };
141 static const int i8751_coin_data[]={ 0x00, 0xb7 };
142 static const int i8751_36_data[]={ 0x00, 0xbc };
143
144 /* End of command - important to note, as coin input is supressed while commands are pending */
145 if (data==0x26) {
146 i8751_current_command=0;
147 i8751_return=0xff; /* This value is XOR'd and must equal 0 */
148 cpu_set_irq_line_and_vector(0,0,HOLD_LINE,0xff);
149 return;
150 }
151
152 /* Init sequence command */
153 else if (data==0x13) {
154 if (!i8751_current_command)
155 i8751_init_ptr=0;
156 i8751_return=i8751_init_data[i8751_init_ptr++];
157 }
158
159 /* Used to calculate a jump address when coins are inserted */
160 else if (data==0xbd) {
161 if (!i8751_current_command)
162 i8751_init_ptr=0;
163 i8751_return=i8751_coin_data[i8751_init_ptr++];
164 }
165
166 else if (data==0x36) {
167 if (!i8751_current_command)
168 i8751_init_ptr=0;
169 i8751_return=i8751_36_data[i8751_init_ptr++];
170 }
171
172 /* Static value commands */
173 else if (data==0x14)
174 i8751_return=1;
175 else if (data==0x02)
176 i8751_return=0;
177 else if (data==0x72)
178 i8751_return=3;
179 else if (data==0x69)
180 i8751_return=2;
181 else if (data==0xcb)
182 i8751_return=0;
183 else if (data==0x49)
184 i8751_return=1;
185 else if (data==0x17)
186 i8751_return=2;
187 else if (data==0x88)
188 i8751_return=3;
189 else {
190 i8751_return=0xff;
191 log_cb(RETRO_LOG_DEBUG, LOGPRE "%04x: Unknown i8751 command %02x!\n",activecpu_get_pc(),data);
192 }
193
194 /* Signal main cpu task is complete */
195 cpu_set_irq_line_and_vector(0,0,HOLD_LINE,0xff);
196 i8751_current_command=data;
197 }
198
WRITE_HANDLER(firetrap_sound_command_w)199 static WRITE_HANDLER( firetrap_sound_command_w )
200 {
201 soundlatch_w(offset,data);
202 cpu_set_irq_line(1,IRQ_LINE_NMI,PULSE_LINE);
203 }
204
WRITE_HANDLER(firetrap_sound_2400_w)205 static WRITE_HANDLER( firetrap_sound_2400_w )
206 {
207 MSM5205_reset_w(offset,~data & 0x01);
208 firetrap_irq_enable = data & 0x02;
209 }
210
WRITE_HANDLER(firetrap_sound_bankselect_w)211 static WRITE_HANDLER( firetrap_sound_bankselect_w )
212 {
213 int bankaddress;
214 unsigned char *RAM = memory_region(REGION_CPU2);
215
216 bankaddress = 0x10000 + (data & 0x01) * 0x4000;
217 cpu_setbank(2,&RAM[bankaddress]);
218 }
219
220 static int msm5205next;
221
firetrap_adpcm_int(int data)222 static void firetrap_adpcm_int (int data)
223 {
224 static int toggle=0;
225
226 MSM5205_data_w (0,msm5205next>>4);
227 msm5205next<<=4;
228
229 toggle ^= 1;
230 if (firetrap_irq_enable && toggle)
231 cpu_set_irq_line (1, M6502_IRQ_LINE, HOLD_LINE);
232 }
233
WRITE_HANDLER(firetrap_adpcm_data_w)234 static WRITE_HANDLER( firetrap_adpcm_data_w )
235 {
236 msm5205next = data;
237 }
238
WRITE_HANDLER(flip_screen_w)239 static WRITE_HANDLER( flip_screen_w )
240 {
241 flip_screen_set(data);
242 }
243
244
MEMORY_READ_START(readmem)245 static MEMORY_READ_START( readmem )
246 { 0x0000, 0x7fff, MRA_ROM },
247 { 0x8000, 0xbfff, MRA_BANK1 },
248 { 0xc000, 0xe97f, MRA_RAM },
249 { 0xf010, 0xf010, input_port_0_r },
250 { 0xf011, 0xf011, input_port_1_r },
251 { 0xf012, 0xf012, input_port_2_r },
252 { 0xf013, 0xf013, input_port_3_r },
253 { 0xf014, 0xf014, input_port_4_r },
254 { 0xf016, 0xf016, firetrap_8751_r },
255 MEMORY_END
256
257 static MEMORY_WRITE_START( writemem )
258 { 0x0000, 0xbfff, MWA_ROM },
259 { 0xc000, 0xcfff, MWA_RAM },
260 { 0xd000, 0xd7ff, firetrap_bg1videoram_w, &firetrap_bg1videoram },
261 { 0xd800, 0xdfff, firetrap_bg2videoram_w, &firetrap_bg2videoram },
262 { 0xe000, 0xe7ff, firetrap_fgvideoram_w, &firetrap_fgvideoram },
263 { 0xe800, 0xe97f, MWA_RAM, &spriteram, &spriteram_size },
264 { 0xf000, 0xf000, MWA_NOP }, /* IRQ acknowledge */
265 { 0xf001, 0xf001, firetrap_sound_command_w },
266 { 0xf002, 0xf002, firetrap_bankselect_w },
267 { 0xf003, 0xf003, flip_screen_w },
268 { 0xf004, 0xf004, firetrap_nmi_disable_w },
269 { 0xf005, 0xf005, firetrap_8751_w },
270 { 0xf008, 0xf009, firetrap_bg1_scrollx_w },
271 { 0xf00a, 0xf00b, firetrap_bg1_scrolly_w },
272 { 0xf00c, 0xf00d, firetrap_bg2_scrollx_w },
273 { 0xf00e, 0xf00f, firetrap_bg2_scrolly_w },
274 MEMORY_END
275
276 static MEMORY_READ_START( readmem_bootleg )
277 { 0x0000, 0x7fff, MRA_ROM },
278 { 0x8000, 0xbfff, MRA_BANK1 },
279 { 0xc000, 0xe97f, MRA_RAM },
280 { 0xf010, 0xf010, input_port_0_r },
281 { 0xf011, 0xf011, input_port_1_r },
282 { 0xf012, 0xf012, input_port_2_r },
283 { 0xf013, 0xf013, input_port_3_r },
284 { 0xf014, 0xf014, input_port_4_r },
285 { 0xf016, 0xf016, firetrap_8751_bootleg_r },
286 { 0xf800, 0xf8ff, MRA_ROM }, /* extra ROM in the bootleg with unprotection code */
287 MEMORY_END
288
289 static MEMORY_WRITE_START( writemem_bootleg )
290 { 0x0000, 0xbfff, MWA_ROM },
291 { 0xc000, 0xcfff, MWA_RAM },
292 { 0xd000, 0xd7ff, firetrap_bg1videoram_w, &firetrap_bg1videoram },
293 { 0xd800, 0xdfff, firetrap_bg2videoram_w, &firetrap_bg2videoram },
294 { 0xe000, 0xe7ff, firetrap_fgvideoram_w, &firetrap_fgvideoram },
295 { 0xe800, 0xe97f, MWA_RAM, &spriteram, &spriteram_size },
296 { 0xf000, 0xf000, MWA_NOP }, /* IRQ acknowledge */
297 { 0xf001, 0xf001, firetrap_sound_command_w },
298 { 0xf002, 0xf002, firetrap_bankselect_w },
299 { 0xf003, 0xf003, flip_screen_w },
300 { 0xf004, 0xf004, firetrap_nmi_disable_w },
301 { 0xf005, 0xf005, MWA_NOP },
302 { 0xf008, 0xf009, firetrap_bg1_scrollx_w },
303 { 0xf00a, 0xf00b, firetrap_bg1_scrolly_w },
304 { 0xf00c, 0xf00d, firetrap_bg2_scrollx_w },
305 { 0xf00e, 0xf00f, firetrap_bg2_scrolly_w },
306 { 0xf800, 0xf8ff, MWA_ROM }, /* extra ROM in the bootleg with unprotection code */
307 MEMORY_END
308
309 static MEMORY_READ_START( sound_readmem )
310 { 0x0000, 0x07ff, MRA_RAM },
311 { 0x3400, 0x3400, soundlatch_r },
312 { 0x4000, 0x7fff, MRA_BANK2 },
313 { 0x8000, 0xffff, MRA_ROM },
314 MEMORY_END
315
316 static MEMORY_WRITE_START( sound_writemem )
317 { 0x0000, 0x07ff, MWA_RAM },
318 { 0x1000, 0x1000, YM3526_control_port_0_w },
319 { 0x1001, 0x1001, YM3526_write_port_0_w },
320 { 0x2000, 0x2000, firetrap_adpcm_data_w }, /* ADPCM data for the MSM5205 chip */
321 { 0x2400, 0x2400, firetrap_sound_2400_w },
322 { 0x2800, 0x2800, firetrap_sound_bankselect_w },
323 { 0x4000, 0xffff, MWA_ROM },
324 MEMORY_END
325
326
327
328 INPUT_PORTS_START( firetrap )
329 PORT_START /* IN0 */
330 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_UP | IPF_4WAY )
331 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_DOWN | IPF_4WAY )
332 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_LEFT | IPF_4WAY )
333 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_RIGHT | IPF_4WAY )
334 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_UP | IPF_4WAY )
335 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_DOWN | IPF_4WAY )
336 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_LEFT | IPF_4WAY )
337 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_RIGHT | IPF_4WAY )
338
339 PORT_START /* IN1 */
340 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_UP | IPF_4WAY | IPF_COCKTAIL )
341 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_DOWN | IPF_4WAY | IPF_COCKTAIL )
342 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_LEFT | IPF_4WAY | IPF_COCKTAIL )
343 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_RIGHT | IPF_4WAY | IPF_COCKTAIL )
344 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_UP | IPF_4WAY | IPF_COCKTAIL )
345 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_DOWN | IPF_4WAY | IPF_COCKTAIL )
346 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_LEFT | IPF_4WAY | IPF_COCKTAIL )
347 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_RIGHT | IPF_4WAY | IPF_COCKTAIL )
348
349 PORT_START /* IN2 */
350 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
351 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START1 )
352 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_COCKTAIL )
353 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
354 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
355 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
356 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
357 PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_VBLANK )
358
359 PORT_START /* DSW0 */
360 PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) )
361 /* PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )*/
362 /* PORT_DIPSETTING( 0x01, DEF_STR( 1C_1C ) )*/
363 /* PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C ) )*/
364 PORT_DIPSETTING( 0x07, DEF_STR( 1C_1C ) )
365 PORT_DIPSETTING( 0x06, DEF_STR( 1C_2C ) )
366 PORT_DIPSETTING( 0x05, DEF_STR( 1C_3C ) )
367 PORT_DIPSETTING( 0x03, DEF_STR( 1C_4C ) )
368 PORT_DIPSETTING( 0x04, DEF_STR( 1C_6C ) )
369 PORT_DIPNAME( 0x18, 0x18, DEF_STR( Coin_B ) )
370 PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
371 PORT_DIPSETTING( 0x08, DEF_STR( 3C_1C ) )
372 PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
373 PORT_DIPSETTING( 0x18, DEF_STR( 1C_1C ) )
374 PORT_DIPNAME( 0x20, 0x00, DEF_STR( Cabinet ) )
375 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
376 PORT_DIPSETTING( 0x20, DEF_STR( Cocktail ) )
377 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Demo_Sounds ) )
378 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
379 PORT_DIPSETTING( 0x40, DEF_STR( On ) )
380 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Flip_Screen ) )
381 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
382 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
383
384 PORT_START /* DSW1 */
385 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
386 PORT_DIPSETTING( 0x02, "Easy" )
387 PORT_DIPSETTING( 0x03, "Normal" )
388 PORT_DIPSETTING( 0x01, "Hard" )
389 PORT_DIPSETTING( 0x00, "Hardest" )
390 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Lives ) )
391 PORT_DIPSETTING( 0x00, "1" )
392 PORT_DIPSETTING( 0x0c, "3" )
393 PORT_DIPSETTING( 0x08, "4" )
394 PORT_DIPSETTING( 0x04, "5" )
395 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Bonus_Life ) )
396 PORT_DIPSETTING( 0x30, "50000 70000" )
397 PORT_DIPSETTING( 0x20, "60000 80000" )
398 PORT_DIPSETTING( 0x10, "80000 100000" )
399 PORT_DIPSETTING( 0x00, "50000" )
400 PORT_DIPNAME( 0x40, 0x40, "Allow Continue" )
401 PORT_DIPSETTING( 0x00, DEF_STR( No ) )
402 PORT_DIPSETTING( 0x40, DEF_STR( Yes ) )
403 PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
404
405 PORT_START /* Connected to i8751 directly */
406 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
407 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
408 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
409 INPUT_PORTS_END
410
411 INPUT_PORTS_START( firetpbl )
412 PORT_START /* IN0 */
413 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_UP | IPF_4WAY )
414 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_DOWN | IPF_4WAY )
415 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_LEFT | IPF_4WAY )
416 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_RIGHT | IPF_4WAY )
417 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_UP | IPF_4WAY )
418 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_DOWN | IPF_4WAY )
419 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_LEFT | IPF_4WAY )
420 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_RIGHT | IPF_4WAY )
421
422 PORT_START /* IN1 */
423 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_UP | IPF_4WAY | IPF_COCKTAIL )
424 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_DOWN | IPF_4WAY | IPF_COCKTAIL )
425 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_LEFT | IPF_4WAY | IPF_COCKTAIL )
426 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_RIGHT | IPF_4WAY | IPF_COCKTAIL )
427 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_UP | IPF_4WAY | IPF_COCKTAIL )
428 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_DOWN | IPF_4WAY | IPF_COCKTAIL )
429 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_LEFT | IPF_4WAY | IPF_COCKTAIL )
430 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_RIGHT | IPF_4WAY | IPF_COCKTAIL )
431
432 PORT_START /* IN2 */
433 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
434 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START1 )
435 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_COCKTAIL )
436 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
437 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN3 ) /* bootleg only */
438 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 ) /* bootleg only */
439 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 ) /* bootleg only */
440 PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_VBLANK )
441
442 PORT_START /* DSW0 */
443 PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) )
444 /* PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )*/
445 /* PORT_DIPSETTING( 0x01, DEF_STR( 1C_1C ) )*/
446 /* PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C ) )*/
447 PORT_DIPSETTING( 0x07, DEF_STR( 1C_1C ) )
448 PORT_DIPSETTING( 0x06, DEF_STR( 1C_2C ) )
449 PORT_DIPSETTING( 0x05, DEF_STR( 1C_3C ) )
450 PORT_DIPSETTING( 0x03, DEF_STR( 1C_4C ) )
451 PORT_DIPSETTING( 0x04, DEF_STR( 1C_6C ) )
452 PORT_DIPNAME( 0x18, 0x18, DEF_STR( Coin_B ) )
453 PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
454 PORT_DIPSETTING( 0x08, DEF_STR( 3C_1C ) )
455 PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
456 PORT_DIPSETTING( 0x18, DEF_STR( 1C_1C ) )
457 PORT_DIPNAME( 0x20, 0x00, DEF_STR( Cabinet ) )
458 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
459 PORT_DIPSETTING( 0x20, DEF_STR( Cocktail ) )
460 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Demo_Sounds ) )
461 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
462 PORT_DIPSETTING( 0x40, DEF_STR( On ) )
463 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Flip_Screen ) )
464 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
465 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
466
467 PORT_START /* DSW1 */
468 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
469 PORT_DIPSETTING( 0x02, "Easy" )
470 PORT_DIPSETTING( 0x03, "Normal" )
471 PORT_DIPSETTING( 0x01, "Hard" )
472 PORT_DIPSETTING( 0x00, "Hardest" )
473 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Lives ) )
474 PORT_DIPSETTING( 0x00, "1" )
475 PORT_DIPSETTING( 0x0c, "3" )
476 PORT_DIPSETTING( 0x08, "4" )
477 PORT_DIPSETTING( 0x04, "5" )
478 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Bonus_Life ) )
479 PORT_DIPSETTING( 0x30, "50000 70000" )
480 PORT_DIPSETTING( 0x20, "60000 80000" )
481 PORT_DIPSETTING( 0x10, "80000 100000" )
482 PORT_DIPSETTING( 0x00, "50000" )
483 PORT_DIPNAME( 0x40, 0x40, "Allow Continue" )
484 PORT_DIPSETTING( 0x00, DEF_STR( No ) )
485 PORT_DIPSETTING( 0x40, DEF_STR( Yes ) )
486 PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
487 INPUT_PORTS_END
488
489
490 static struct GfxLayout charlayout =
491 {
492 8,8,
493 RGN_FRAC(1,2),
494 2,
495 { 0, 4 },
496 { 3, 2, 1, 0, RGN_FRAC(1,2)+3, RGN_FRAC(1,2)+2, RGN_FRAC(1,2)+1, RGN_FRAC(1,2)+0 },
497 { 7*8, 6*8, 5*8, 4*8, 3*8, 2*8, 1*8, 0*8 },
498 8*8
499 };
500 static struct GfxLayout tilelayout =
501 {
502 16,16,
503 RGN_FRAC(1,4),
504 4,
505 { 0, 4, RGN_FRAC(1,2)+0, RGN_FRAC(1,2)+4 },
506 { 3, 2, 1, 0, RGN_FRAC(1,4)+3, RGN_FRAC(1,4)+2, RGN_FRAC(1,4)+1, RGN_FRAC(1,4)+0,
507 16*8+3, 16*8+2, 16*8+1, 16*8+0, RGN_FRAC(1,4)+16*8+3, RGN_FRAC(1,4)+16*8+2, RGN_FRAC(1,4)+16*8+1, RGN_FRAC(1,4)+16*8+0 },
508 { 15*8, 14*8, 13*8, 12*8, 11*8, 10*8, 9*8, 8*8,
509 7*8, 6*8, 5*8, 4*8, 3*8, 2*8, 1*8, 0*8 },
510 32*8
511 };
512 static struct GfxLayout spritelayout =
513 {
514 16,16,
515 RGN_FRAC(1,4),
516 4,
517 { RGN_FRAC(0,4), RGN_FRAC(1,4), RGN_FRAC(2,4), RGN_FRAC(3,4) },
518 { 7, 6, 5, 4, 3, 2, 1, 0,
519 16*8+7, 16*8+6, 16*8+5, 16*8+4, 16*8+3, 16*8+2, 16*8+1, 16*8+0 },
520 { 15*8, 14*8, 13*8, 12*8, 11*8, 10*8, 9*8, 8*8,
521 7*8, 6*8, 5*8, 4*8, 3*8, 2*8, 1*8, 0*8 },
522 32*8
523 };
524
525 static struct GfxDecodeInfo gfxdecodeinfo[] =
526 {
527 { REGION_GFX1, 0, &charlayout, 0x00, 16 }, /* colors 0x00-0x3f */
528 { REGION_GFX2, 0, &tilelayout, 0x80, 4 }, /* colors 0x80-0xbf */
529 { REGION_GFX3, 0, &tilelayout, 0xc0, 4 }, /* colors 0xc0-0xff */
530 { REGION_GFX4, 0, &spritelayout, 0x40, 4 }, /* colors 0x40-0x7f */
531 { -1 } /* end of array */
532 };
533
534
535
536 static struct YM3526interface ym3526_interface =
537 {
538 1, /* 1 chip */
539 3000000, /* 3.000000 MHz ? */
540 { 100 } /* volume */
541 };
542
543 static struct MSM5205interface msm5205_interface =
544 {
545 1, /* 1 chip */
546 384000, /* 384KHz ? */
547 { firetrap_adpcm_int },/* interrupt function */
548 { MSM5205_S48_4B}, /* 8KHz ? */
549 { 30 }
550 };
551
INTERRUPT_GEN(firetrap)552 static INTERRUPT_GEN( firetrap )
553 {
554 static int latch=0;
555 static int coin_command_pending=0;
556
557 /* Check for coin IRQ */
558 if (cpu_getiloops()) {
559 if ((readinputport(5) & 0x7) != 0x7 && !latch) {
560 coin_command_pending=~readinputport(5);
561 latch=1;
562 }
563 if ((readinputport(5) & 0x7) == 0x7)
564 latch=0;
565
566 /* Make sure coin IRQ's aren't generated when another command is pending, the main cpu
567 definitely doesn't expect them as it locks out the coin routine */
568 if (coin_command_pending && !i8751_current_command) {
569 i8751_return=coin_command_pending;
570 cpu_set_irq_line_and_vector(0,0,HOLD_LINE,0xff);
571 coin_command_pending=0;
572 }
573 }
574
575 if (firetrap_nmi_enable && !cpu_getiloops())
576 cpu_set_irq_line (0, IRQ_LINE_NMI, PULSE_LINE);
577 }
578
INTERRUPT_GEN(bootleg)579 static INTERRUPT_GEN( bootleg )
580 {
581 if (firetrap_nmi_enable)
582 cpu_set_irq_line (0, IRQ_LINE_NMI, PULSE_LINE);
583 }
584
585 static MACHINE_DRIVER_START( firetrap )
586
587 /* basic machine hardware */
588 MDRV_CPU_ADD(Z80, 6000000) /* 6 MHz */
589 MDRV_CPU_MEMORY(readmem,writemem)
590 MDRV_CPU_VBLANK_INT(firetrap,2)
591
592 MDRV_CPU_ADD(M6502,3072000/2)
593 MDRV_CPU_FLAGS(CPU_AUDIO_CPU) /* 1.536 MHz? */
594 MDRV_CPU_MEMORY(sound_readmem,sound_writemem)
595 /* IRQs are caused by the ADPCM chip */
596 /* NMIs are caused by the main CPU */
597 MDRV_FRAMES_PER_SECOND(60)
598 MDRV_VBLANK_DURATION(DEFAULT_REAL_60HZ_VBLANK_DURATION)
599 MDRV_MACHINE_INIT(firetrap)
600
601 /* video hardware */
602 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
603 MDRV_SCREEN_SIZE(32*8, 32*8)
604 MDRV_VISIBLE_AREA(0*8, 32*8-1, 1*8, 31*8-1)
605 MDRV_GFXDECODE(gfxdecodeinfo)
606 MDRV_PALETTE_LENGTH(256)
607
608 MDRV_PALETTE_INIT(firetrap)
609 MDRV_VIDEO_START(firetrap)
610 MDRV_VIDEO_UPDATE(firetrap)
611
612 /* sound hardware */
613 MDRV_SOUND_ADD(YM3526, ym3526_interface)
614 MDRV_SOUND_ADD(MSM5205, msm5205_interface)
615 MACHINE_DRIVER_END
616
617 static MACHINE_DRIVER_START( firetpbl )
618
619 /* basic machine hardware */
620 MDRV_CPU_ADD(Z80, 6000000) /* 6 MHz */
621 MDRV_CPU_MEMORY(readmem_bootleg,writemem_bootleg)
622 MDRV_CPU_VBLANK_INT(bootleg,1)
623
624 MDRV_CPU_ADD(M6502,3072000/2)
625 MDRV_CPU_FLAGS(CPU_AUDIO_CPU) /* 1.536 MHz? */
626 MDRV_CPU_MEMORY(sound_readmem,sound_writemem)
627 /* IRQs are caused by the ADPCM chip */
628 /* NMIs are caused by the main CPU */
629 MDRV_FRAMES_PER_SECOND(60)
630 MDRV_VBLANK_DURATION(DEFAULT_REAL_60HZ_VBLANK_DURATION)
631
632 /* video hardware */
633 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
634 MDRV_SCREEN_SIZE(32*8, 32*8)
635 MDRV_VISIBLE_AREA(0*8, 32*8-1, 1*8, 31*8-1)
636 MDRV_GFXDECODE(gfxdecodeinfo)
637 MDRV_PALETTE_LENGTH(256)
638
639 MDRV_PALETTE_INIT(firetrap)
640 MDRV_VIDEO_START(firetrap)
641 MDRV_VIDEO_UPDATE(firetrap)
642
643 /* sound hardware */
644 MDRV_SOUND_ADD(YM3526, ym3526_interface)
645 MDRV_SOUND_ADD(MSM5205, msm5205_interface)
646 MACHINE_DRIVER_END
647
648
649
650 /***************************************************************************
651
652 Game driver(s)
653
654 ***************************************************************************/
655
656 ROM_START( firetrap )
657 ROM_REGION( 0x20000, REGION_CPU1, 0 ) /* 64k for code + 64k for banked ROMs */
658 ROM_LOAD( "di02.bin", 0x00000, 0x8000, CRC(3d1e4bf7) SHA1(ee903b469619f49edb1727fb545c9a6085f50746) )
659 ROM_LOAD( "di01.bin", 0x10000, 0x8000, CRC(9bbae38b) SHA1(dc1d3ed5da71bfb104fd54fc70c56833f31d281f) )
660 ROM_LOAD( "di00.bin", 0x18000, 0x8000, CRC(d0dad7de) SHA1(8783ebf6ddfef32f6036913d403f76c1545b813d) )
661
662 ROM_REGION( 0x18000, REGION_CPU2, 0 ) /* 64k for the sound CPU + 32k for banked ROMs */
663 ROM_LOAD( "di17.bin", 0x08000, 0x8000, CRC(8605f6b9) SHA1(4fba88f34afd91d2cbc578b3b70f5399b8844390) )
664 ROM_LOAD( "di18.bin", 0x10000, 0x8000, CRC(49508c93) SHA1(3812b0b1a33a1506d2896d2b676ed6aabb29dac0) )
665
666 /* there's also a protected 8751 microcontroller with ROM onboard */
667
668 ROM_REGION( 0x02000, REGION_GFX1, ROMREGION_DISPOSE ) /* characters */
669 ROM_LOAD( "di03.bin", 0x00000, 0x2000, CRC(46721930) SHA1(a605fe993166e95c1602a35b548649ceae77bff2) )
670
671 ROM_REGION( 0x20000, REGION_GFX2, ROMREGION_DISPOSE ) /* tiles */
672 ROM_LOAD( "di06.bin", 0x00000, 0x2000, CRC(441d9154) SHA1(340804e82d4aba8e9fcdd08cce0cfecefd2f77a9) )
673 ROM_CONTINUE( 0x08000, 0x2000 )
674 ROM_CONTINUE( 0x02000, 0x2000 )
675 ROM_CONTINUE( 0x0a000, 0x2000 )
676 ROM_LOAD( "di04.bin", 0x04000, 0x2000, CRC(8e6e7eec) SHA1(9cff147702620987346449e2f83ef9b2efef7798) )
677 ROM_CONTINUE( 0x0c000, 0x2000 )
678 ROM_CONTINUE( 0x06000, 0x2000 )
679 ROM_CONTINUE( 0x0e000, 0x2000 )
680 ROM_LOAD( "di07.bin", 0x10000, 0x2000, CRC(ef0a7e23) SHA1(7c67ac27e6bde0f4943e8bed9898e730ae7ddd75) )
681 ROM_CONTINUE( 0x18000, 0x2000 )
682 ROM_CONTINUE( 0x12000, 0x2000 )
683 ROM_CONTINUE( 0x1a000, 0x2000 )
684 ROM_LOAD( "di05.bin", 0x14000, 0x2000, CRC(ec080082) SHA1(3b034496bfa2aba9ed58ceba670d0364a9c2211d) )
685 ROM_CONTINUE( 0x1c000, 0x2000 )
686 ROM_CONTINUE( 0x16000, 0x2000 )
687 ROM_CONTINUE( 0x1e000, 0x2000 )
688
689 ROM_REGION( 0x20000, REGION_GFX3, ROMREGION_DISPOSE )
690 ROM_LOAD( "di09.bin", 0x00000, 0x2000, CRC(d11e28e8) SHA1(3e91764f74d551e0984bac92daeab4e094e8dc13) )
691 ROM_CONTINUE( 0x08000, 0x2000 )
692 ROM_CONTINUE( 0x02000, 0x2000 )
693 ROM_CONTINUE( 0x0a000, 0x2000 )
694 ROM_LOAD( "di08.bin", 0x04000, 0x2000, CRC(c32a21d8) SHA1(01898abf24aa40b13939afed96c990f430eb3bf1) )
695 ROM_CONTINUE( 0x0c000, 0x2000 )
696 ROM_CONTINUE( 0x06000, 0x2000 )
697 ROM_CONTINUE( 0x0e000, 0x2000 )
698 ROM_LOAD( "di11.bin", 0x10000, 0x2000, CRC(6424d5c3) SHA1(9ad6cfe6effca795709f90839a338f2a9148128f) )
699 ROM_CONTINUE( 0x18000, 0x2000 )
700 ROM_CONTINUE( 0x12000, 0x2000 )
701 ROM_CONTINUE( 0x1a000, 0x2000 )
702 ROM_LOAD( "di10.bin", 0x14000, 0x2000, CRC(9b89300a) SHA1(5575daa226188cb1ea7d7a23f4966252bfb748e0) )
703 ROM_CONTINUE( 0x1c000, 0x2000 )
704 ROM_CONTINUE( 0x16000, 0x2000 )
705 ROM_CONTINUE( 0x1e000, 0x2000 )
706
707 ROM_REGION( 0x20000, REGION_GFX4, ROMREGION_DISPOSE ) /* sprites */
708 ROM_LOAD( "di16.bin", 0x00000, 0x8000, CRC(0de055d7) SHA1(ef763237c317545520c659f438b572b11c342d5a) )
709 ROM_LOAD( "di13.bin", 0x08000, 0x8000, CRC(869219da) SHA1(9ab2439d6d1c62fce24c4f78ac7887f34c86cd75) )
710 ROM_LOAD( "di14.bin", 0x10000, 0x8000, CRC(6b65812e) SHA1(209e07b2fced6b033c6d5398a998374588a35f46) )
711 ROM_LOAD( "di15.bin", 0x18000, 0x8000, CRC(3e27f77d) SHA1(9ceccb1f56a8d0e05f6dea45d102690a1370624e) )
712
713 ROM_REGION( 0x0200, REGION_PROMS, 0 )
714 ROM_LOAD( "firetrap.3b", 0x0000, 0x0100, CRC(8bb45337) SHA1(deaf6ea53eb3955230db1fdcb870079758a0c996) ) /* palette red and green component */
715 ROM_LOAD( "firetrap.4b", 0x0100, 0x0100, CRC(d5abfc64) SHA1(6c808c1d6087804214dc29d35280f42382c40b18) ) /* palette blue component */
716 ROM_END
717
718 ROM_START( firetpbl )
719 ROM_REGION( 0x28000, REGION_CPU1, 0 ) /* 64k for code + 96k for banked ROMs */
720 ROM_LOAD( "ft0d.bin", 0x00000, 0x8000, CRC(793ef849) SHA1(5a2c587370733d43484ba0a38a357260cdde8357) )
721 ROM_LOAD( "ft0a.bin", 0x08000, 0x8000, CRC(613313ee) SHA1(54e386b2b1faada3441e3e0bb7822a63eab36930) ) /* unprotection code */
722 ROM_LOAD( "ft0c.bin", 0x10000, 0x8000, CRC(5c8a0562) SHA1(856766851faa4353445d944b7705e348fd1379e4) )
723 ROM_LOAD( "ft0b.bin", 0x18000, 0x8000, CRC(f2412fe8) SHA1(28a9143e36c31fe34f40888dc848aed3d572d801) )
724
725 ROM_REGION( 0x18000, REGION_CPU2, 0 ) /* 64k for the sound CPU + 32k for banked ROMs */
726 ROM_LOAD( "di17.bin", 0x08000, 0x8000, CRC(8605f6b9) SHA1(4fba88f34afd91d2cbc578b3b70f5399b8844390) )
727 ROM_LOAD( "di18.bin", 0x10000, 0x8000, CRC(49508c93) SHA1(3812b0b1a33a1506d2896d2b676ed6aabb29dac0) )
728
729 ROM_REGION( 0x02000, REGION_GFX1, ROMREGION_DISPOSE ) /* characters */
730 ROM_LOAD( "ft0e.bin", 0x00000, 0x2000, CRC(a584fc16) SHA1(6ac3692a14cb7c70799c23f8f6726fa5be1ac0d8) )
731
732 ROM_REGION( 0x20000, REGION_GFX2, ROMREGION_DISPOSE ) /* tiles */
733 ROM_LOAD( "di06.bin", 0x00000, 0x2000, CRC(441d9154) SHA1(340804e82d4aba8e9fcdd08cce0cfecefd2f77a9) )
734 ROM_CONTINUE( 0x08000, 0x2000 )
735 ROM_CONTINUE( 0x02000, 0x2000 )
736 ROM_CONTINUE( 0x0a000, 0x2000 )
737 ROM_LOAD( "di04.bin", 0x04000, 0x2000, CRC(8e6e7eec) SHA1(9cff147702620987346449e2f83ef9b2efef7798) )
738 ROM_CONTINUE( 0x0c000, 0x2000 )
739 ROM_CONTINUE( 0x06000, 0x2000 )
740 ROM_CONTINUE( 0x0e000, 0x2000 )
741 ROM_LOAD( "di07.bin", 0x10000, 0x2000, CRC(ef0a7e23) SHA1(7c67ac27e6bde0f4943e8bed9898e730ae7ddd75) )
742 ROM_CONTINUE( 0x18000, 0x2000 )
743 ROM_CONTINUE( 0x12000, 0x2000 )
744 ROM_CONTINUE( 0x1a000, 0x2000 )
745 ROM_LOAD( "di05.bin", 0x14000, 0x2000, CRC(ec080082) SHA1(3b034496bfa2aba9ed58ceba670d0364a9c2211d) )
746 ROM_CONTINUE( 0x1c000, 0x2000 )
747 ROM_CONTINUE( 0x16000, 0x2000 )
748 ROM_CONTINUE( 0x1e000, 0x2000 )
749
750 ROM_REGION( 0x20000, REGION_GFX3, ROMREGION_DISPOSE )
751 ROM_LOAD( "di09.bin", 0x00000, 0x2000, CRC(d11e28e8) SHA1(3e91764f74d551e0984bac92daeab4e094e8dc13) )
752 ROM_CONTINUE( 0x08000, 0x2000 )
753 ROM_CONTINUE( 0x02000, 0x2000 )
754 ROM_CONTINUE( 0x0a000, 0x2000 )
755 ROM_LOAD( "di08.bin", 0x04000, 0x2000, CRC(c32a21d8) SHA1(01898abf24aa40b13939afed96c990f430eb3bf1) )
756 ROM_CONTINUE( 0x0c000, 0x2000 )
757 ROM_CONTINUE( 0x06000, 0x2000 )
758 ROM_CONTINUE( 0x0e000, 0x2000 )
759 ROM_LOAD( "di11.bin", 0x10000, 0x2000, CRC(6424d5c3) SHA1(9ad6cfe6effca795709f90839a338f2a9148128f) )
760 ROM_CONTINUE( 0x18000, 0x2000 )
761 ROM_CONTINUE( 0x12000, 0x2000 )
762 ROM_CONTINUE( 0x1a000, 0x2000 )
763 ROM_LOAD( "di10.bin", 0x14000, 0x2000, CRC(9b89300a) SHA1(5575daa226188cb1ea7d7a23f4966252bfb748e0) )
764 ROM_CONTINUE( 0x1c000, 0x2000 )
765 ROM_CONTINUE( 0x16000, 0x2000 )
766 ROM_CONTINUE( 0x1e000, 0x2000 )
767
768 ROM_REGION( 0x20000, REGION_GFX4, ROMREGION_DISPOSE ) /* sprites */
769 ROM_LOAD( "di16.bin", 0x00000, 0x8000, CRC(0de055d7) SHA1(ef763237c317545520c659f438b572b11c342d5a) )
770 ROM_LOAD( "di13.bin", 0x08000, 0x8000, CRC(869219da) SHA1(9ab2439d6d1c62fce24c4f78ac7887f34c86cd75) )
771 ROM_LOAD( "di14.bin", 0x10000, 0x8000, CRC(6b65812e) SHA1(209e07b2fced6b033c6d5398a998374588a35f46) )
772 ROM_LOAD( "di15.bin", 0x18000, 0x8000, CRC(3e27f77d) SHA1(9ceccb1f56a8d0e05f6dea45d102690a1370624e) )
773
774 ROM_REGION( 0x0200, REGION_PROMS, 0 )
775 ROM_LOAD( "firetrap.3b", 0x0000, 0x0100, CRC(8bb45337) SHA1(deaf6ea53eb3955230db1fdcb870079758a0c996) ) /* palette red and green component */
776 ROM_LOAD( "firetrap.4b", 0x0100, 0x0100, CRC(d5abfc64) SHA1(6c808c1d6087804214dc29d35280f42382c40b18) ) /* palette blue component */
777 ROM_END
778
779
780
781 GAME( 1986, firetrap, 0, firetrap, firetrap, 0, ROT90, "Data East USA", "Fire Trap (US)" )
782 GAME( 1986, firetpbl, firetrap, firetpbl, firetpbl, 0, ROT90, "bootleg", "Fire Trap (Japan bootleg)" )
783